Technical Information Jumpers, Connectors and Memory MCG Series (6680-, 6675-, 6690-, 6695-xxx) System Host Board. Layout Diagram
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1 Technical Information Jumpers, Connectors and Memory MCG Series (6680-, 6675-, 6690-, 6695-xxx) System Host Board Layout Diagram Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 1
2 Jumpers & LEDs The setup of the configuration jumpers on the SHB is described below. An asterisk (*) indicates the default value of each jumper. NOTE: For two-position jumpers (3-post), "RIGHT" is toward the bracket end of the board; "LEFT" is toward the processor. JU8 Password Clear Install for one power-up cycle to reset the password to the default (null password). Remove for normal operation. * JU10/11 System Flash ROM Operational Modes The Flash ROM has two programmable sections: the Boot Block for "flashing" in the BIOS and the Main Block for the executable BIOS and PnP parameters. Normally only the Main Block is updated when a new BIOS is flashed into the system. JU10 JU11 All Blocks Write Enabled Remove * Remove * Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 2
3 JU12 Boot Block Write Protected Block 2-16 Write Protected Install Remove Remove Install CMOS Clear Install on the LEFT to clear. Install on the RIGHT to operate. * NOTE: To clear the CMOS, power down the system and install the jumper on the LEFT. Wait for at least two seconds, move the jumper back to the RIGHT and turn the power on. When AMIBIOS displays the "CMOS Settings Wrong" message, press F1 to go into the BIOS Setup Utility, where you may reenter your desired BIOS settings, load optimal defaults or load failsafe defaults. Jumpers & LEDs (continued) P1 Ethernet LEDs I/O bracket connector P1 consists of two RJ-45 network connectors for Ethernet LAN1 and LAN2. Each LAN interface connector has two LEDs that indicate activity status and Ethernet connection speed. Listed below are the possible LED conditions and status indications for LAN1 and LAN2: LED/Connector Activity LED Off On (flashing) Speed LED Off On RJ-45 Network Connectors Description Green LED which indicates network activity. This is the upper LED on the LAN connector (i.e., toward the memory sockets). No current network transmit or receive activity Indicates network transmit or receive activity. Green LED which identifies the connection speed. This is the lower LED on the LAN connector (i.e., toward the edge connectors). Indicates a valid link at 1000-Mb/s Indicates a valid link at 100-Mb/s. The RJ-45 network connector requires a Connectors category 5 (CAT5) unshielded twisted-pair (UTP) 2-pair cable for a 100-Mb/s network connection or a category 3 (CAT3) or higher UTP 2- pair cable for a 10-Mb/s network connection. A category 5e (CAT5e) or higher UTP 2-pair cable is recommended for a 1000-Mb/s (Gigabit) network connection. Backplane LAN LED The backplane LAN LED (LED11) is a green LED located near PCI Express edge connector C and directly above the lower left anchor of the MCH heat sink. This LED indicates the status of communication between the SHB and the backplane as shown below: LED Status Off On (flashing) On (solid) Description Indicates the LAN is inactive and link communications have not been established. Indicates that data is being transferred between the SHB and the backplane. Indicates the LAN has a valid link and is ready for data transfers. Power On LED The Power On LED (LED11) is a red LED located at the center bottom of the SHB and is used to indicate the presence of the VCC voltage needed by the MCXX s DDR memory. When the LED is on this indicates that VCC_DDR is present and at an acceptable level to drive the SHBs memory DIMMs. Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 3
4 POST Code LEDs As the POST (Power On Self Test) routines are performed during boot-up, test codes are displayed on Port 80 POST code LEDs 1 through 8, which are located in the center of the board to the right of the processor and are numbered from top (1) to bottom (8). Refer to the board layout diagram for the exact location of the POST code LEDs. These POST codes may be helpful as a diagnostic tool. Specific error codes are listed in Appendix A - BIOS Messages section of the MCXX Technical Reference Manual, along with a chart to interpret the LEDs into hexadecimal format. Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 4
5 Jumpers & LEDs (continued) CPU Throttling LED The CPU throttling LED (LED9), which is located in the upper left corner of the MCXX, indicates the status of CPU thermal shutdown, as shown below: LED Status Off On (flashing) On (solid) Description Indicates the CPU is operating within acceptable thermal levels. Indicates the CPU is throttling down to a lower operating speed due to rising CPU temperature. Indicates the CPU has reached the thermal shutdown threshold limit. The SHB is still operating, but a thermal shutdown may soon occur. NOTE: When a thermal shutdown occurs, the LED will stay on in systems using non- ATX/EPS power supplies. The CPU will cease functioning, but power will still be applied to the SHB. In systems with ATX/EPS power supplies, the LED will turn off when a thermal shutdown occurs because system power is removed via the ACPI soft control power signal S5. In this case, all SHB LEDs will turn off; however, stand-by power will still be present. Connectors NOTE: Pin 1 on the connectors is indicated by the square pad on the PCB. P2 - CPU Fan 2 3 pin single row header, Molex # V 3 FanTach P19 - CPU Fan 1 3 pin single row header, Molex # V 3 Fan Tach P20 - I/O Expansion Mezzanine Card Connector 76 pin controlled impedance connector, Samtec #MIS FD-K P5 - Speaker Port Connector 4 pin single row header, Amp # Speaker Data 2 Key 3 Gnd 4 +5V P10 - External Reset Connector 2 pin single row header, Amp # V 3 NC 5 NC 7 NC 9 NC 11 NC 13 ICH_SMI# 15 ICH_SIOPME# V_STANDBY 4 +5V_STANDBY 6 +5V_DUAL 8 +5V_DUAL 10 NC 12 NC 14 ICH_RCIN# 16 ICH_A20GATE 18 Gnd 19 L_FRAME# 20 L_AD3 1 External Reset In (Low Active) 2 Gnd 21 L_DRQ1# 23 L_DRQ0# 22 L_AD2 24 L_AD1 Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 5
6 Connectors (Continued) P11 - ATA/100 Hard Drive Connector 40 pin dual row header, Amp # SERIRQ 2 29 PCLK14SIO 26 L_AD0 28 Gnd 30 PCLK33LPC 3 32 Gnd 1 Reset 2 Gnd 33 SMBDATA_RESUME 34 IPMB_DAT 3 Data 7 4 Data 8 35 SMBCLK_RESUME 36 IPMB_CLK 5 Data 6 6 Data 9 37 SALRT#_RESUME 38 IPMB_ALRT# 7 Data 5 8 Data Gnd 40 Gnd 9 Data 4 10 Data EXP_CLK EXP_RESET# 11 Data 3 12 Data EXP_CLK100# 44 ICH_WAKE# 13 Data 2 14 Data Gnd 46 Gnd 15 Data 1 16 Data C_PE_TXP4 48 C_PE_RXP4 17 Data 0 18 Data C_PE_TXN4 50 C_PE_RXN4 19 Gnd 20 NC 5 52 Gnd 21 DRQ 0 22 Gnd 53 C_PE_TXP3 54 C_PE_RXP3 23 IOW 2 55 C_PE_TXN3 56 C_PE_RXN3 25 IOR 26 Gnd 5 58 Gnd 27 IORDY 28 SELPDP 59 C_PE_TXP2 60 C_PE_RXP2 29 DACK 0 30 Gnd 61 C_PE_TXN2 62 C_PE_RXN2 31 IRQ NC 63 Gnd 6 33 Add 1 34 PCBL DET* 65 C_PE_TXP1 66 C_PE_RXP1 35 Add 0 36 Add 2 67 C_PE_TXN1 68 C_PE_RXN1 37 CS 1P 38 CS 3P 69 Gnd 70 Gnd 39 IDEACTP 40 Gnd V 72 +5V * For ATA/66 and ATA/100 drives, which should be set for Cable Select for proper speed operation. If other Drives are detected, pin definition is Gnd V V 74 +5V 76 +5V P12 - Hard Drive LED Connector 4 pin single row header, Amp # P21 - Power Good LED 2 pin single row header, Amp # LED + 2 LED - 1 LED - 2 LED + 3 LED - 4 LED + P27 - SATA PORT 0 Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 6
7 Connectors (Continued) P15 - Video Interface Connector 15 pin HD15 connector, Kycon #K31X-E15S-N 1 Red 2 Green 6 Gnd 11 NC 12 EEDI 3 Blue 4 NC 8 Gnd 9 +5V 13 HSYNC 14 VSYNC P28 - SATA PORT1 5 Gnd 10 Gnd 15 EECS P16-10/100/1000Base-T Ethernet Connector - LAN1/LAN2 Dual RJ-45 connector, Pulse #JG0-0024NL Each individual RJ-45 connector is defined as follows: 1 TRP1+ 2 TRP1-3 TRP2+ 4 TRP3+ 5 TRP3-6 TRP2-7 TRP4+ 8 TRP4- P17 - Universal Serial Bus (USB) Connector 8 pin dual row header, Molex # (+5V fused with self-resetting fuses) P31 - SATA PORT2 P32 - SATA PORT3 1 +5V - USB2 2 +5V - USB3 3 USB2-4 USB3-5 USB2+ - USB2 6 USB3+ 8 Gnd - USB3 P34 - Chipset Fan 3 pin single row header, Molex # P17A - Universal Serial Bus(USB) Connector USB vertical connector, Molex # (+5V fused with self-resetting fuse) 1 +5V - USB V 3 FanTach Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 7
8 1 +5V - USB0 2 USB0-3 USB0+ - USB0 P35 - SATA PORT4 Connectors (Continued) P17B - Universal Serial Bus(USB) Connector USB vertical connector, Molex # (+5V fused with self-resetting fuses) P36 - SATA PORT5 1 +5V - USB1 2 USB1-3 USB1+ - USB1 Memory The four-channel Double Data Rate (DDR2) memory interface on the MCXT and MCXI SHBs supports up to 16GB of Fully Buffered DIMM (FB-DIMM) memory; the MCXT-E and MCXI-E models support up to 32GB of FB-DIMM memory. FB-DIMMs have "Advanced Memory Buffer" chips that provide enhanced signal integrity and improved error detection that help reduce soft memory errors. FB-DIMM memory technology improves overall system reliability by extending the current ECC capability to include protection of command and address data. FD-DIMMs feature automatic retries when a memory error is detected, which results in uninterrupted system operation in the event of transient errors. An MCX-series SHB uses industry standard 72-bit wide ECC gold finger FB-DIMM memory modules in four (MCXT/MCXI) or eight (MCXT-E/MCXI-E) 240-pin sockets. The FB-DIMMs must be PC or PC (DDR2-533 or DDR2-667) and comply with the JEDEC Rev. 2.0 specifications. The following dual-rank FB-DIMM sizes are supported: FB-DIMM Size DIMM Type ECC 512MB Registered 64M x 72 1GB Registered 128M x 72 2GB Registered 256M x 72 4GB Registered 512M x 72 Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 8
9 A minimum of one 512MB FB-DIMM is required and must be populated in DIMM socket BK0A. NOTE: With the bracket end of the board to the right, the four FB-DIMM sockets available on the MCXT and MCXI SHBs are numbered BK0A, BK1A, BK0B and BK1B, from top to bottom. On the extended-memory MCXT-E and MCXI-E SHBs, there are an additional four FB-DIMM sockets. The upper sockets are BK2A and BK2B, from left to right, and the lower sockets are BK3A and BK3B. These socket definitions are illustrated in the board layouts. All memory modules must have gold contacts. NOTE: To maximize memory interface speed and bandwidth, and to take full advantage of the four-channel memory interface of the SHB's memory controller hub, the FB-DIMMs in socket banks 0A and 1A must be identical with respect to manufacturing, speed, timing and organization. Likewise, FB-DIMMs used in sockets 0B and 1B must be identical. FB-DIMMs in socket banks contained within the same memory channel, i.e., 0A and 2A do not have to be identical. A minimum of one 512MB FB-DIMM is required and must be populated in DIMM socket BK0A. When using more that one FB-DIMM, you must populate the memory sockets in multiples of two in order to maximize the speed and performance of the memory interface. The following table explains the DDR2 FB-DIMM population rules: FB-DIMM POPULATION CONFIGURATION FB-DIMM Sockets (MCXT, MCXE) FB-DIMM Sockets (MCXT-E, MCXI-E) BANK 0A BANK 1A BANK 0B BANK 1B BANK 2A BANK 2B BANK 3A BANK 3B Single Module FB-DIMM Empty Empty Empty Empty Empty Empty Empty Two Modules FB-DIMM FB-DIMM Empty Empty Empty Empty Empty Empty Four Modules FB-DIMM FB-DIMM FB-DIMM FB-DIMM Empty Empty Empty Empty Six Modules FB-DIMM FB-DIMM FB-DIMM FB-DIMM FB-DIMM FB-DIMM Empty Empty Eight Module FB-DIMM FB-DIMM FB-DIMM FB-DIMM FB-DIMM FB-DIMM FB-DIMM FB-DIMM Trenton Support Center MCXX Technical Information -- Jumpers, Connectors and Memory 9
NOTE: For the three-position JU12 jumper, "RIGHT" is toward the I/O bracket side of the board; "LEFT" is toward the CPU1 DDR3 Memory sockets.
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