Smart Me for Smart Life, Smart Lifestyle Driving Internet of Things Revolution

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1 Smart Me for Smart Life, Smart Lifestyle Driving Internet of Things Revolution March 18, 2015 Weili Dai, President and Co-Founder Marvell Technology Group NASDAQ: MRVL

2 Our Vision Smart Me 2

3 Three Fundamental Technical Challenges Cost Power Size 3

4 Marvell Groundbreaking Solutions CPU L1 Cache L2 Cache L3 Cache DRAM SSD HDD FLC (Final-Level Cache) Redefine Main Memory Hierarchy MoChi (MOdular CHIp) Build Chips in Lego-like Format 4

5 Cost Performance Outdated Computing Architecture CPU CPU CPU CPU L1 Cache L1 Cache L2 Cache L1 Cache L2 Cache L3 Cache L1 Cache L2 Cache L3 Cache L4 DRAM DRAM (64~245KB) DRAM (2~6MB) DRAM (1~4GB) Out of Control DRAM (8~16GB) 1980 s 1990 s 2000 s 2010 s Decades 5

6 Clue on How to Solve DRAM Explosion Most processes are idle, yet in aggregate, take up a lot of DRAM space 6

7 Revolutionary FLC Memory Architecture CPU CPU CPU L1 Cache L2 Cache L3 Cache Now L1 Cache L2 Cache L3 Cache Future L1 Cache L2 Cache L3 Cache High Speed DRAM (128MB~1GB) HS-DRAM Stage 1 DRAM (8~16GB) DRAM or DDRAM Stage 2 Conventional SSD Final-Level Cache (FLC) Smaller, Faster, Lower-Power DRAM SSD Main Memory HDD HDD 7

8 FLC vs. Conventional Memory Hierarchy Final Level Cache (FLC) Conventional Main Memory (DRAM) 1 Cover only active portion of small # of working data sets (minimum: 1) 1 Total size has to cover all working data sets 2 Much Smaller DRAM (< 1/8) 3 Much Lower Power (< 1/4) 4 Higher Speed 5 Can be co-located next to CPU 6 Can be easily flushed out to SSD for complete power-down 7 Fast Wake-up 8

9 FLC Extends Battery Life Key Challenge for Wide Adoption: Very Short Battery Life Modern OS requirements for DRAM w/o FLC: 2~4GB w/ FLC: 0.5GB Energy required to retain DRAM states Battery capacity extremely limited ~ 10 Increase in Standby Time ~ 100 with MRAM FLC in the Future 9

10 FLC Saves Memory Cost ~1/10 capacity of main memory DRAM sufficient for DRAM FLC System cost savings from FLC architecture = Total DRAM market of ~ $44B 0.5 x 0.9 (assuming 50% FLC adoption) ~$20B Total potential annual savings for end users ~$40B Implications for Memory Industry With FLC, many new applications of DRAM will emerge Mainstream main memory will use Flash NAND (especially 3D) FLC will enable new memory technologies like RRAM 10

11 FLC Reduces Format Factor Half the operating power Half the battery size 10 standby battery life Half the cost 11

12 FLC Enables Future Supercomputing Smart Me Energy Efficient Data Center Large server room reduced to one cube FLC enables larger main memories (10 s of TB vs. 100 s of GB) 12

13 FLC Lowers IDC Energy Consumption IT infrastructure estimated to consume 10% of world energy Assume 50% of this energy use is from running and cooling computers/servers The FLC memory architecture potentially saves 50% of power consumption of computers That s a 2.5% decrease in world energy consumption! 13

14 MoChi (MOdular CHIp) Single-Die SoC MoChi Blocks (Conventional) (Concept like Lego ) 14

15 MoChi and Virtual SoC (VSoC ) MoChi Interconnect MoChi s (Access common resource such as DRAM) (Concept like Lego ) No Need to change existing software for single-chip SoC designers Virtual SoC offers convenience of 1 device & hides complexity 15

16 MoChi Interconnect MoChi Applications Example Smartphone 4/8 of 32b/64b Cores AP MoChi Module 2x2Gb Step- Pyramid DRAM (FLC) CPU GPU Application Processor MoChi LTE MODEM MoChi WiFi MoChi R9/R10/R11/R1216 1x1/2x n/ac MCM of AP MoChi and DRAM FLC next to reduces package pins, simplifying PCB design SSD (Main Memory) 8GB/16GB/32GB Product features are customizable by selecting different flavors of MoChi s 16

17 MoChi Interconnect MoChi Applications Example Laptop 8 of 64b Cores High-End AP MoChi Module WiFi MoChi 1x1/2x n/ac 4x2Gb Step- Pyramid DRAM (FLC) CPU GPU Application Processor MoChi SB MoChi LTE MODEM MoChi USB 3.0 PCIe SATA GE R9/R10/R11/R1216 MCM of AP MoChi and DRAM FLC next to reduces package pins, simplifying PCB design SSD (Main Memory) 8GB/16GB/32GB (Optional) South Bridge MoChi is added to high-end AP, MODEM, and WiFi MoChi s 17

18 Kinoma Open Source Announcement JS XS JavaScript Engine 18

19 Our Vision, Delivered CPU L1 Cache L2 Cache L3 Cache DRAM SSD HDD FLC (Final-Level Cache) MoChi (MOdular CHIp) Driving down Power, Cost and Size Enabling Smart Me 19

20

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