SH7080/SH7146/SH7125/SH7200 Series

Transcription

1 APPLICATION NOTE SH78/SH746/SH75/SH7 Series Introduction This application note discusses synchronous operation of the MTU and MTUS timers, Target Device Microcomputer: SH785 (R5F785) Operating frequency: Internal clock 8 MHz Bus clock 4 MHz Peripheral clock 4 MHz MTU clock 4 MHz MTUS clock 4 MHz C compiler: Ver of Renesas C compiler Contents. Specifications.... Description of Functions.... Description of Operation Description of Software Flowchart Website and Customer Support Center... REJ6B476-/Rev.. March 5 Page of 5

2 . Specifications SH78/SH746/SH75/SH7 Series () The MTU and the MTUS start counting simultaneously. () The MTU and the MTUS count upward using channel, and the counters are cleared on compare-match between TGRA_ and TGRA_S. () Toggle output synchronized with the compare-match period is output from the TIOCA and the TIOCAS pins. (4) The MTU and the MTUS perform counting with a 4-MHz clock. (5) By running the MTU and MTUS under the same conditions, the same waveforms are output by the two different modules. Note: Synchronous starting of counters is possible in all operating modes. Two synchronous PWM waveforms can be produced by using the MTU and MTUS in complementary PWM mode. TCNT_ TGRA_ MTU module channel H' TIOCA pin Synchronous start Synchronous operation Synchronous operation TCNT_S TGRA_S MTUS module channel H' TIOCAS pin Figure Synchronous Start of MTU and MTUS Timers REJ6B476-/Rev.. March 5 Page of 5

3 . Description of Functions SH78/SH746/SH75/SH7 Series In this sample task, counting operation is performed using channel of the MTU and the MTUS. The operating mode is normal mode. Synchronous starting of counters is possible on channels,,,, and 4 of the MTU and channels and 4 of the MTUS. Synchronous starting of counters is not possible on channel 5 of the MTU and MTUS. Figure shows a block diagram of a part of the functions used in this sample task, with an explanation of the function noted below. The MTUS has the same configurations and functions as the channels, 4 and 5 of the MTU. <MTU> Timer general register A_ (TGRA_) Comparator Match signal Output control Toggle output on the TIOCA pin Timer counter_ (TCNT_) Timer I/O control register (TIORL_) Set the corresponding bit Timer counter synchronous start register (TCSYSTR) Timer start register (TSTR) <MTUS> Set the corresponding bit Timer start register (TSTRS) Timer counter (TCNT_S) Timer I/O control register (TIORL_S) Comparator Match signal Output control Toggle output on the TIOCAS pin Timer general register A_ (TGRA_S) Note: The register names of the MTUS are distinguished from those of the MTU by appending the letter "S" to the end of the register name. Figure Block Diagram of MTU (ch) and MTUS (ch) REJ6B476-/Rev.. March 5 Page of 5

4 SH78/SH746/SH75/SH7 Series The timer counter_/s (TCNT_/S) is a 6-bit readable/writable counter. This counter cannot be accessed in 8- bit units and must be accessed in 6-bit units. The timer general register A_/S (TGRA_/S) is a 6-bit readable/writable register. TGRA_/S operates as a compare register that is always compared with TCNT_. The timer I/O control register L_/S (TIORL_/S) is a 6-bit readable/writable register. TIORL_/S sets the functions of the TGRA_/S and the TIOCA/AS pin. The timer start register/s (TSTR/S) is an 8-bit readable/writable register. TSTR/S starts/stops counting by TCNT_/S. The timer counter synchronous start register (TCSYSTR) is an 8-bit readable/writable register. TCSYSTR enables synchronous starting of the MTU and MTUS counters. When the bit in TCSYSTR for the counter to be started synchronously is set to, the corresponding bit in TSTR of the MTU or MTUS is set. The bit in TCSYSTR is automatically cleared after the relevant counter of the MTU or MTUS has been started. REJ6B476-/Rev.. March 5 Page 4 of 5

5 . Description of Operation Figure explains how the MTU and MTUS timers start synchronously. SH78/SH746/SH75/SH7 Series MPφ, MIφ H' TCSYSTR H' H' TSTR H' H'4 TSTRS H' H'4 TCNT_ H' H' H' TCNT_S H' H' H' Software processing Hardware processing Hardware processing Hardware processing Set any desired bit in TCSYSTR to. Set the start bit of the channel selected by TCSYSTR to. Clear TCSYSTR. Start counting. Notes:. The counter clock for TCNT_ is MPφ/ and that for TCNT_S is MIφ /.. The counters count the rising edges.. Since TCSYSTR is a register in the MTU module, it operates synchronously with MPφ. 4. To stop the timer, clear the corresponding bit in the TSTR register. Figure Synchronous Starting of MTU and MTUS Timers REJ6B476-/Rev.. March 5 Page 5 of 5

6 SH78/SH746/SH75/SH7 Series 4. Description of Software 4. Modules Table describes the module of this sample task. Table Description of Modules Module Name Label Name Functions Main routine main() Makes initial settings of the MTU and MTUS and starts the timer counters. 4. Internal Registers Table shows the registers used in this sample task. Note that the settings in the tables are the values used in this sample task, and are different from the initial values. Table Description of Internal Registers Register Bit Bit Name Function Setting FRQCR Frequency Control Register H'49 Specifies the ratios for dividing the output frequency of the PLL circuit to generate operating clocks. FRQCR = H'49 sets the division ratios as follows. Internal clock: Bus clock: / Peripheral clock: / MTUS clock: / MTU clock: / STBCR4 Standby Control Register 4 H'F 7 MSTP Module Stop Clock is supplied to MTUS when MSTP = b'. 6 MSTP Module Stop Clock is supplied to MTU when MSTP = b'. PECRL Port E Control Register L H' 5 Reserved 4 PEMD PEMD PEMD PE Mode Selects PE (general I/O) as the pin function when PEMD to PEMD = b'. Reserved PEMD PE Mode 9 PEMD Selects PE (general I/O) as the pin function when 8 PEMD PEMD to PEMD = b' REJ6B476-/Rev.. March 5 Page 6 of 5

7 SH78/SH746/SH75/SH7 Series Register Bit Bit Name Function Setting PECRL 7 Reserved PE9MD PE9MD PE9MD PE9 Mode Selects PE9 (general I/O) as the pin function when PE9MD to PE9MD = b'. Reserved PDCRH PE8MD PE8MD PE8MD PDMD PDMD PDMD PDMD PD9MD PD9MD PD8MD PD8MD PE8 Mode Selects TIOCA as the pin function when PE8MD to PE8MD = b'. Port D Control Register H4 Reserved PD Mode Selects TIOCAS as the pin function when PDMD and PDMD = b'. Reserved PD Mode Selects PD (general I/O) as the pin function when PDMD and PDMD = b'. Reserved PD9 Mode Selects PD9 (general I/O) as the pin function when PD9MD and PD9MD = b'. Reserved PD8 Mode Selects PD8 (general I/O) as the pin function when PD8MD and PD8MD = b'. H' REJ6B476-/Rev.. March 5 Page 7 of 5

8 SH78/SH746/SH75/SH7 Series Register Bit Bit Name Function Setting TSTR Timer Start Register H' 7 CTS4 Counter Start 4 When CTS4 = b', TCNT_4 stops counting. 6 CTS Counter Start When CTS = b', TCNT_ stops counting. 5 4 Reserved CTS Counter Start When CTS = b', TCNT_ stops counting. CTS Counter Start When CTS = b', TCNT_ stops counting. CTS Counter Start When CTS = b', TCNT_ stops counting. TCR_ Timer Control Register_ H' TMDR_ CCLR CCLR CCLR CKEG CKEG TPSC TPSC TPSC Counter Clear,, Clears TCNT_ on compare-match with TGRA_ when CCLR to CCLR = b'. Clock Edge, When CKEG and CKEG = b', TCNT_ counts rising edges of the internal clock. Timer Prescaler,, When TPSC to TPSC = b', the clock source for TCNT_ is MPφ/. Timer Mode Register_ 7 Reserved 6 Reserved 5 BFB Buffer Operation B When BFB = b', TGRB_ and TGRD_ operate normally. 4 BFA Buffer Operation A When BFA=b', TGRA_ and TGRC_ operate normally. MD Mode,,, MD When MD to MD = b', the MTU operates in MD normal operation mode. MD H' REJ6B476-/Rev.. March 5 Page 8 of 5

9 SH78/SH746/SH75/SH7 Series Register Bit Bit Name Function Setting TIORH_ Timer I/O Control Register H_ H'7 7 6 IOB IOB I/O control B to B When IOB to IOB = b', TGRB_ operates as an 5 IOB output compare register and the output on the TIOCB pin 4 IOB is held. TGRA_ IOA IOA IOA IOA I/O control A to A When IOA to IOA = b', TGRA_ operates as an output compare register and the TIOCA pin initially outputs high level and toggles the output on comparematch. Timer General Register A_ Sets the period of compare-match with TCNT_ H'A TCNT_ Timer Counter _ H' TSTRS Timer Start Register S H' 7 CTS4 Counter Start 4 When CTS4 = b', TCNT_4S stops counting 6 CTS Counter Start When CTS = b', TCNT_S stops counting. 5 4 Reserved TCR_S Timer Control Register_S H' CCLR CCLR CCLR CKEG CKEG TPSC TPSC TPSC Counter Clear,, Clears TCNT_S on compare match with TGRA_S when CCLR to CCLR = b'. Clock Edge, When CKEG and CKEG = b', TCNT_S counts rising edges of the internal clock. Timer Prescaler,, When TPSC to TPSC = b', the clock source for TCNT_S is MIφ/. REJ6B476-/Rev.. March 5 Page 9 of 5

10 SH78/SH746/SH75/SH7 Series Register Bit Bit Name Function Setting TMDR_S Timer Mode Register_S H' 7 Reserved 6 Reserved 5 BFB Buffer Operation B When BFB = b', TGRB_S and TGRD_S operate normally. 4 BFA Buffer Operation A When BFA=b', TGRA_S and TGRC_S operate normally. MD MD MD MD Mode,,, When MD to MD = b', the MTUS operates in normal mode. TIORH_S Timer I/O Control Register H_S H'7 TGRA_S IOB IOB IOB IOB IOA IOA IOA IOA I/O control B to B When IOB to IOB = b', MTUS_TGRB_ operates as an output compare register and the output on the TIOCB pin is held. I/O control A to A When IOA to IOA = b', TGRA_S operates as an output compare register and the TIOCA pin initially outputs high level and toggles the output on comparematch. Timer General Register A_S Sets the period of compare-match with TCNT_S H'A TCNT_S Timer Counter_S H' REJ6B476-/Rev.. March 5 Page of 5

11 SH78/SH746/SH75/SH7 Series Register Bit Bit Name Function Setting TCSYSTR Timer Counter Synchronous Start Register H' 7 SCH Synchronous Start When SCH = b', TCNT_ of MTU doesn't start synchronously. 6 SCH Synchronous Start When SCH = b', TCNT_ of MTU doesn't start synchronously. 5 SCH Synchronous Start When SCH = b', TCNT_ of MTU doesn't start synchronously. 4 SCH Synchronous Start When SCH = b', TCNT_ of MTU starts synchronously. SCH4 Synchronous Start 4 When SCH4 = b', TCNT_4 of MTU doesn't start synchronously. Reserved SCHS Synchronous Start S When SCHS = b', TCNT_ of MTUS starts synchronously SCH4S Synchronous Start 4S When SCH4S = b', TCNT_4 of MTUS doesn't start synchronously. REJ6B476-/Rev.. March 5 Page of 5

12 SH78/SH746/SH75/SH7 Series 5. Flowchart main() MTU settings Set the operating frequencies. Cancel standby mode of the modules for use. Stop the timer counter of the MTU. Set up the operation of TCNT_. Set the operating mode for channel. Set the function of TGR. Set the / period of toggle output. <<FRQCR setting>> Internal clock = 8 MHz, Bus clock = 4 MHz, Peripheral clock = 4 MHz, MTUS clock = 4 MHz, MTU clock = 4 MHz <<STBCR4 setting>> Cancel mode standby mode of the MTU and MTUS. <<TCR_ setting>> - Select counter clearing by TGRA_. - Select MPφ/ as the counter clock. <<TMDR_ setting>> Specify normal operation mode. <<TIORH_ setting>> Enable toggle output from the TIOCA pin on compare-match with TGRA_. Clear the counter. MTUS settings Stop the timer counter of the MTUS. Set up the operation of TCNT_S. Set the operating mode for channel (MTUS). Set the function of TGR. Set the / period of toggle output. <<TCR_S setting>> - Select counter clearing by TGRA_S. - Select MIφ/ as the counter clock. <<TMDR_S setting>> Specify normal operation mode. <<TIORH_S setting>> Enable toggle output from the TIOCAS pin on compare-match with TGRA_S. Clear the counter. Set the pin function controller (PFC). <<Settings of PECRL, PDCRH4, PEIORL, and PDIORH >> Select the pin functions of TIOCA and TIOCAS. Execute synchronous starting of the timers. <<TCSYSTR setting>> Start counting on channel of the MTU and MTUS. REJ6B476-/Rev.. March 5 Page of 5

13 6. Website and Customer Support Center SH78/SH746/SH75/SH7 Series Renesas Technology, Corp. Website: Customer Support Center: Please the following address for information on products of Renesas Technology, Corp. REJ6B476-/Rev.. March 5 Page of 5

14 Revision Record Description Rev. Date Page Summary. Mar.4.5 First edition issued SH78/SH746/SH75/SH7 Series REJ6B476-/Rev.. March 5 Page 4 of 5

15 SH78/SH746/SH75/SH7 Series Keep safety first in your circuit designs!. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any thirdparty's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page ( 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. REJ6B476-/Rev.. March 5 Page 5 of 5