Mode Changes in Priority Pre-emptively Scheduled Systems. K. W. Tindell, A. Burns, A. J. Wellings

Transcription

1 ode hages rorty re-emptvely Scheduled Systems. W. dell, A. Burs, A.. Wellgs Departmet of omputer Scece, Uversty of York, Eglad Abstract may hard real tme systems the set of fuctos that a system s requred to provde may chage over tme. e way of provdg ths chage s to allow curretly rug hard real tme tasks to be deleted or chaged, or ew tasks to be added. We defe ths chage as a mode chage, ad seek to guaratee a pror the tmg costrats of all tasks across the chage from oe mode to aother. hs paper derves schedulg theory for statc prorty pre-emptve schedulg that ca be used to make such guaratees. 1. troducto may hard real-tme systems the fuctos provded by the system may eed to chage over tme a umber of modes are progressed through, wth each mode provdg a set of fuctos. odes are chaged a cotrolled maer such that the behavour of the system durg the trastoal perod s kow a pror. ode chages ca be used for a umber of purposes: chages are ofte requred to reduce the maxmum load o a system (we use the term load here to clude both computatoal ad commucatos load). osder a hypothetcal commercal arler that has several software compoets, cludg: fuctos to cotrol the stablty of the arcraft (automatc trm, etc.) fuctos to cotrol the udercarrage (rasg ad lowerg, automatc brakg, etc.) fuctos to automatcally lad the arcraft (usg rado beacos, for example) fuctos to provde auto plot ad avgato (whch cotrols the flght cotrol systems to steer the arcraft accordg to plaed way pots) he computers the hypothetcal arcraft go through three dstct modes: take-off, level flght, ad ladg. Durg take-off the auto plot ad auto lad fuctos are ot eeded; level-flght the auto lad ad udercarrage fuctos are ot eeded; durg ladg the auto plot fuctos are ot eeded. hus, the peak software load ay mode s lower tha the total software load. However, the auto-stablty software s eeded all three modes, ad eeds to ru cotuously wthout mssg a deadle a mode chage must ot cause a gltch where the software fals to meet ts tmg requremets (e.g. a task mssg a deadle or release beg delayed). addto to plaed mode chages there are chages that may occur sporadcally: abormal evets, such as a processor falure, mght requre the system fuctos to degrade a graceful maer (exstg fuctos mght be deleted, or be degraded to use fewer resources, to accommodate fuctos from the faled processor). Smlarly, the falure of a pece of cotrolled equpmet may cause a mode chage: our hypothetcal commercal arler there may be may sesor ad actuator falure patters, wth may dfferet cotroller algorthms that could be used, depedg o the sesors ad actuators remag. After a actuator falure (say), the system could be requred to remove old cotrol fuctos, chage some fuctos, ad add ew oes. he requremets o a mode chage protocol therefore clude the tmely chagg ad addto of fuctos. urret dustral practce schedulg tasks s to compute a pror a cyclc schedule wth a so-called maor perod equal to the least commo multple of the task perods. ode chages are mplemeted by chagg to a ew schedule at the ed of the maor perod of the old schedule. f the maor perod s log the a mode chage could be deferred for a log tme. New schedulg approaches, such as statc prorty preemptve schedulg (wth deadle mootoc [6] ad rate mootoc aalyss [5]) ad earlest deadle frst schedulg [3], ca potetally provde faster ad more flexble mode chages ew tasks ca potetally be released mmedately wthout watg for the ed of a schedulg cycle. Sha et al [8] attempt to address the problems of aalysg a pror a sgle processor system, scheduled accordg to the rate mootoc schedulg polcy, wth tasks able to lock ad ulock semaphores accordg to the prorty celg protocol. he mode chage protocol the propose s a smple oe, where tasks are ether deleted or added across a mode chage. A o the fly

2 record of the processor utlsato s kept, ad a task s added f the resultg task set s schedulable accordg to the exact-case rate mootoc schedulg equatos [4]. he utlsato of a old task ca be reclamed at the ed of the perod of the old task. Furthermore, the behavour of the tasks uder the prorty celg protocol s addressed by a set of rules that specfy whe semaphore celgs ca be rased ad lowered, ad whe ew tasks lockg semaphores ca be added to the system. However, the protocol ad aalyss have some dsadvatages the aalyss s ot suffcet (.e. the test may pass a task set that s uschedulable). he followg smple example shows ths. osder a two task system that ca execute oe of two modes, A or B. mode A, task 1 has a worst-case computato tme requremet 1 of 2 tcks, ad a perod 1 of 7 tcks. mode B task 1 s deleted ad replaced by task 1', wth a worst-case computato tme 1' of 6 tcks, ad a perod 1' of 24 tcks. ask 2 s requred to execute uchaged through both modes. ask 2 has a worst-case computato requremet 2 of 40 tcks, ad a perod 2 of 59 tcks. For all three tasks the deadle of a task s equal to the perod of that task. he utlsato of the system mode A s 96% ad schedulable accordg to the exact rate mootoc schedulg equatos [4]. ode B has a utlsato of 92%, ad s also deemed schedulable by the exact rate mootoc equatos. Now, task 1' ( mode B) has a task utlsato of 25%, lower tha the 28% of task 1 ( mode A). Sce task 1' does ot attempt to lock or ulock a semaphore, the oly delay to the addto of task 1' to the system s the processor utlsato clamed by task 1. Accordg to the Sha et al protocol, ths utlsato ca be reclamed at the ed of the perod of task 1 after the mode chage. he followg SRESS [2] dagram llustrates ths, wth the mode chage occurrg at tme 8: task_1 task_1_prme As ca be see, task 1 has already started whe the mode chage request occurs at tme 8, ad rus to completo. he utlsato for task 1 caot be reclamed utl the ed of the perod of task 1, so the troducto of task 1' s delayed utl tme 14. All tasks meet ther deadles across the chage. Furthermore, whe the mode chage occurs at tme 34, all tasks are stll schedulable. However, f the mode chage occurs at tme 22 the all s ot well: task_1 task_1_prme task_2 dle he large black blob for task 2 at tme 59 dcates that task 2 has mssed ts deadle (the otato used these dagrams s gve at the ed of ths paper) the Sha et al aalyss predcts that ths caot happe. he aalyss preseted the rest of ths paper provdes ew suffcet aalyss. he rest of ths paper s structured as follows: secto 2 descrbes a hard real-tme computatoal model ad the proposed mode chage protocol. Secto 3 derves a schedulablty test for smple mode chages. Secto 4 exteds the aalyss to allow tasks to lock semaphores. Secto 5 dscusses some further ssues for mode chage aalyss. 2. he ode hage rotocol ths secto we descrbe the ru-tme behavour of the system, dcatg the restrctos o the behavour of tasks; we also descrbe the operato of our mode chage protocol. task_2 dle A umber of tasks are statcally boud to a sgle processor. A task may arrve at ay geeral tme, ad requres a bouded amout of computato tme to complete. here s a lower boud o the tme betwee successve arrvals of a task, deoted. asks may have a deadle requremet, deoted D, whch

3 dcates the requremet placed o the worst-case tme from arrval to completo of that task. asks are ot permtted to volutarly susped themselves awatg a exteral evet, or are they permtted to block awatg a semaphore (although ths latter restrcto wll be removed later ths paper). We requre that, the worst-case, a task must complete before D after beg released, ad that ths deadle s less tha (thus successve arrvals of a task do ot terfere wth each other) 1. asks are assged statc prortes based upo deadle requremets, ad as such are deoted deadle mootoc tasks [6]. he goal of the aalyss preseted ths paper s to calculate a pror the worst-case respose tme of a task; ths worst-case tme must hold across all modes whch s actve, ad across a mode chage. he mode chage protocol s a smple oe. Frstly, there are two types of task defed: chaged tasks, ad wholly ew tasks. A chaged task cossts of a old mode verso ad a ew mode verso. ld mode versos are always allowed to termate gracefully f they are rug whe the mode chage occurs they ru o uchaged utl they termate ormally. he ew mode verso ca be troduced ay tme later tha the ed of the perod of the last release of the old mode verso (ote that a ew mode verso mght therefore arrve mmedately after the mode chage, ad hece caot be allowed to suffer a delay before beg released). A ew mode verso ca be completely dfferet from the old mode verso, cludg dfferet computato tmes, perods, deadles, ad prortes. A task that remas uchaged betwee modes s modelled by detcal old ad ew mode versos. Smlarly, a task that exsts oly the old mode ad s to be klled, s modelled as a old mode verso task that s replaced by a ull ew mode verso task. A wholly ew task may be released o sooer tha R after the mode chage request occurs. he value of R s determed a pror from applcato specfc tmg requremets of the tasks. t may be approprate for a task to be troduced to the system some large tme after the mode chage request (for example, a smple low crtcalty motorg task); a more urget task, such as a falure recovery task, may eed to be troduced as soo as the mode chage request occurs (deed, the computatoal overheads due to the mode chage ca be modelled by a system task wth a mode chage offset of zero). 1 hs restrcto ca be removed, but the extesos to the schedulg theory to permt ths are beyod the scope of ths paper We ow tur to the a pror aalyss requred to determe the worst-case respose tmes of tasks across a mode chage, ad hece determe the schedulablty of a system. 3. Schedulablty Aalyss he goal of the aalyss s to determe the worst case respose tme of a task across a mode chage. he geeral approach to fdg a worst-case respose tme s to determe the worst-case amout of computato that ca occur a wdow, ad to expad the wdow utl all the computato tme requred by the task of terest ca be accommodated the wdow [1]. he aalyses for the old mode versos, the ew mode versos, ad the wholly ew tasks are cosdered separately. Frstly, we reproduce here the smple teratve deadle mootoc aalyss equato gve by Audsley et al [1]. he equato below gves the worstcase respose tme of a gve task to determe the schedulablty of a system, the equato must be appled to all tasks tur (through the rest of ths paper wll deote the task for whch we are fdg the worst-case respose tme; wll deote a hgher prorty task). 1 r = B r hp( ) (1) Where r s the th terato towards a value of r, the worst-case respose tme of a task ; hp() s the set of all tasks of hgher prorty tha. s the worst-case respose tme of task, ad B s the worst-case blockg tme of task due to the operato of the prorty celg protocol [8] (although, for the momet, we assume o blockg, ad hece B =0). he terato begs wth r 0 =0, ad proceeds utl ether r = r 1 (.e. the equato has coverged to a value), or utl r 1 exceeds a threshold such as D. We wsh to exted the above equato to the three types of task a mode chage. Frstly, we aalyse old mode versos. osder a wdow, of wdth W, whch represets the respose tme of a old mode verso. A mode chage request occurs at tme x after the start of the wdow. he prortes of a old mode verso ad the correspodg ew mode verso ca straddle the prorty of a old mode verso. here are four possble stuatos for a gve chagg task : both tasks are lower, oly the ew verso s hgher, oly the old verso s hgher, or both are hgher. Now, the frst case s trval, sce ether task ca terfere wth task. he secod s also straghtforward:

4 task ' ca oly act o the part of task executg the ew mode. Sce W s the total respose tme of task, ad x s the tme after the start of W whe the mode chage request occurs, the the tme over whch the ew mode ' ca act s gve by W x. hus, the worst-case tme task ca be pre-empted (ad hece delayed) by a ew mode verso ' s gve by: W 0 (2) Fgure 1: A old mode verso shares a crtcal stat wth task he otato z 0 deotes a modfed celg fucto that returs zero f z<0. ase 3 s smlar. he worst-case tme task ca be pre-empted by a old mode verso gve by: x (3) Now, f the mode chage occurs at tme x, ad ths tme s ust after the release of a old mode verso (.e. x s greater tha some multple of ), the cotues to execute. he ew mode verso ' s released at the ed of the perod of (.e. released after the last release of ). For case 4 t mght be thought that the worst-case computatoal terferece by a chaged task would be smply the sum of equatos 2 ad 3. However, ths s pessmstc, sce a ew mode verso ' caot be released sooer tha tme after the last release of old mode verso. Now, the worst-case terferece occurs oe of two stuatos. the frst stuato a old mode verso ca share a crtcal stat wth task, wth terferece from the ew mode verso ' occurrg at the ed of the perod of the last release of. he secod stuato s whe the ew mode verso ' s released mmedately after the mode chage, wth the old mode verso terferg over the tal part of the wdow. he followg dagrams llustrate the two stuatos. Fgure 2: A ew mode verso s released at the mode chage Fgures 1 ad 2 above, tme flows from left to rght. Rectagles represet task staces, wth dashed rectagles represetg tasks whose computato s deemed ot to fall wth the wdow marked W. Fgure 1 the computatoal terferece from a chaged task o a old mode verso s gve by: x W x 0 hs ca be re-wrtte as: k W k 0 Where k s gve by: (4) (5) k x = Fgure 2, the computatoal terferece from a hgher prorty old mode verso ad the correspodg hgher prorty ew mode verso ' s gve by:

5 N x W Q 0 (6) Where wt s the set of all wholly ew tasks, ad R s the earlest tme after the mode chage request that task ca be released. he worst-case computatoal terferece from ether stuato s thus gve by the maxmum of equatos 5 ad 6: F x W N Q max W k k H, 0 0 (7) Now, the left had clause equato 6 represets the computato due to whole executos of old mode verso that fall the wdow W. t mght be thought that ths does ot properly reflect the actual computato from the old mode verso a stace of a old mode verso released mometarly before task would be gored by equato 6, whe realty t would stll execute substatally the wdow W. We wll defer for the momet the explaato of the valdty of equato 6. From equatos 2 to 7 above, we ca see that the total computatoal requremet, the wdow W, from hgher prorty chaged tasks, s gve by: omv F x A W N Q max A W k k H A, A 0 0 (8) Where omv s the set of all old mode versos, ad ' s the ew mode verso correspodg to old mode A verso. he otato s a codtoal, whch returs f s of hgher prorty tha, ad zero otherwse. he computato requred by hgher prorty wholly ew tasks a wdow W, where the mode chage occurs at tme x after the start of the wdow s gve by: wt W R A 0 (9) he wdow W s equal to the tme take for a task to execute for tme, ad for hgher prorty tasks to pre-empt task ad execute. Hece W s equal to the total computato that occurs the wdow. hus, W, for a gve value of x, s equal to: F x A W N Q W ( x) = max omv A W k k H wt W R A 0 A 0 A 0, (10) Note that W occurs o both the left ad rght had sdes of equato 10 the equato ca be re-cast as a recurrece relato: W 1 F x A W N Q ( x) = max omv W A k k H wt W R A 0 0 A, A (11) 0 he tal value of W s set to zero. t ca be show that W 1 W, ad hece the equato s guarateed ether to coverge (.e. W 1 = W ), or to exceed some threshold, such as D. We ca ow see why equato 6 does ot uderestmate W for a old mode verso whe the old mode verso s released mometarly before task f task s released a tme before task but stll has a computatoal mpact o, the releasg task at the same tme as must crease the computatoal mpact o by at least. Hece, the estmate of the wdow W wll crease by at least. herefore, the ext terato of W, the curret worst-case may the be the rght had clause of equato 6 (whch fully takes accout of all of the computato from fallg the frst x tme of W ). Note, however, that ths wll result a o-exact test, sce W ca sometmes be over-

6 estmated o-gog research s vestgatg ths problem. We deote the worst-case respose tme a task ca experece as r. Now, the above equato for W gves the worst-case respose tme of a old mode verso for a gve value of x thus for a old mode verso we have r = max W axf (12) x ay of the values of x result the same value for W, ad oly a lmted set of values of x are sgfcat. Now, t mght be thought that the largest value of W occurs for ether x=0 or x= (ths s the mplct assumpto made by Sha et al [8]). However, upo examg the equatos t soo becomes apparet that the maxmum value eed ot ecessarly occur at the ed values of x (clearly from the example secto 1, the worst-case respose tme does ot occur at x=0 or x= ). osder aga equato 5. e clause s a mootoc-creasg step fucto k. Aother s a mootoc-decreasg step fucto k. here s o geeral way of determg the maxmum value of the sum of creasg ad decreasg step fuctos wthout examg the resultg fucto at pots correspodg to all the steps of oe of the fuctos. osequetly, to fd the maxmum value of W, equato 7 must be appled over all sgfcat values of x. he sgfcat values are oes that lead to dfferet values of k, yet maxmse the computatoal load due to wholly ew tasks. he set of values of x are: x 0, ε, ε, 2 ε, 3 ε, s (13) Where ε s the tme quatum ( ths paper we assume that ε s 1). Note that x must le the rage 0 to W. We ca ow apply Equato 11 to the two task example of secto 1. We wsh to determe the schedulablty of task 2 (sce tasks 1 ad 1' are always schedulable). he set of values of x over whch to apply equato 11 are: {0, 1, 8, 15, 22, 29, 36, 43, 50, 57, 64} We caot kow the value of W before we choose a value of x (sce a value of x determes the value of W ). o esure that x s less tha W we proceed to fd W for successvely larger values of x utl we fd a x for whch the resultg value of W s less tha x. We ca the stop ad dscard that value of x ad the value of W. W akg x=22, we obta the followg: F 22 W , N Q 1 0 = max W 2 0 k1 1 k11 1 H W 2 2 W = 40 max b6 0, 8 0g= 48 F = 6 8 max 6 N Q 24 H, = 40 max b6 12, 8 6g= 58 F = 6 8 max 6 N Q 24 H, 24 = 40 max b6 12, 8 12g= We see that task 2 s uschedulable (ths agrees wth the results of the smulatos dscussed Secto 1). We ow tur to the problem of fdg the worst-case respose tme of a ew mode verso. A sutably log tme after the mode chage, the worst-case respose tme of a ew mode verso wll be gve by equato 1 the stadard deadle mootoc schedulg equatos derved by Audsley et al [1]. We term a respose tme foud usg these equatos as the steadystate respose tme. Because old mode versos are ot mmedately klled after a mode chage, but are allowed to ru to completo, we eed to fd the respose tme that results whe a ew mode verso s pre-empted by such hgher prorty old mode versos. equato 1, the worst-case respose tme s determed by fdg the smallest wdow that cotas the computato of a task ad all hgher prorty computato that could take place that wdow. o fd the worst-case respose tme for a ew mode verso we adopt a smlar approach. he worst-case schedulg pot for a ew mode verso ca be captured by oe of three wdows: 1. the steady state wdow, correspodg to the worst-case respose tme expereced by a sutable log tme after the mode chage has occurred 2. a wdow of wdth W startg at the mode chage wth task released at the mode chage 3. a wdow of wdth W V (x) startg at the release of the old mode verso correspodg to task, wth the mode chage occurrg at tme x after the wdow start, ad released at the ed of the perod of the old mode verso

7 he steady-state respose tme ca be foud trvally from equato 1. he secod wdow (startg at the mode chage) ca be foud by observg that the worst-case terferece o a ew mode verso released at the mode chage ca occur oe of two stuatos: 1. he old mode verso s released mometarly before the mode chage, thus sharg a crtcal stat wth the wdow W. he correspodg ew mode verso ' s released at tme later. 2. he ew mode verso ' s released mometarly after the mode chage, thus sharg a crtcal stat wth the wdow W. he worst-case of the above two stuatos s chose. he computato from a wholly ew task occurs at least R after the mode chage; the maxmal terferece from wll occur whe t s released at R. he total computato the wdow, ad hece W (the wdth of the wdow startg at the mode chage), s foud by: W = wt W R F A W A max W H, omv A (14) Where wt s the set of wholly ew tasks, omv s the set of old mode versos. As wth prevous equatos, W must be foud by terato. Now, task s ot guarateed to be released at the mode chage tme. However, f task s released a tme after the mode chage, the the computato from old mode versos must decrease by (or become zero f t becomes zero the the steady-state respose tme must be the worst). he respose tme of must therefore reduce by, ad hece there wll be o extra computato tme from ew tasks. learly, ths s a mootoc fucto ad thus the worst-case value of the equato occurs whe the wdow does deed start at the mode chage. Fally, we defe the wdow W V (x): a wdow startg whe the old mode verso s released, ad where the mode chage occurs at tme x after ths start. ths wdow falls the computato from, the computato from the old mode verso of (deoted old()), plus the terferece o the wdow due to hgher prorty chaged ad ew tasks. Hece the wdow W V (x) s gve by: W ( x) = V omv mt W ( x) R A V F x A W V ( x) N Q max W V A ( x) k k H A 0, A 0 (15) Note that task s a member of the set omv but that ths does ot result beg cluded twce. Note also that we must evaluate the equato for all sgfcat values of x the same maer as for equato 11. t ca ow be see that equato 14 s a specal case of equato 15 where x 0. hus the worst-case occurs for oe of the three wdows defed. Now, for W V the task s released old() after the start of the wdow, ad cosequetly the computato occurrg before ths does ot cotrbute to the worst-case respose tme of task. herefore the worst-case respose tme for a ew mode verso s gve by: max r SS, W, W V d old( ) (16) Where r SS s the steady-state worst-case respose tme, as calculated by equato 1, W V s the maxmum value of W V (x) over all sgfcat values of x, ad W s the value of the wdow startg at the mode chage. We ow tur to the fal problem of fdg the worst-case respose tme for wholly ew tasks, ad aga defe a wdow W to start at the tme of the mode chage. W ths case s the same as that gve equato 14. Now, task caot be released sooer tha R after the mode chage, ad hece the computato W from the mode chage to R occurs before s released, ad ca be dscouted. f the value of W s less tha R the the old mode ca have o effect o task task s released later tha the tme take to complete all the hgher prorty old mode computato. Hece, the worst-case respose tme of a wholly ew task s gve by:

8 r = max dr SS, W R (18) factor for a old mode verso s therefore equal to the logest crtcal secto of ay lower prorty old mode As check, we ca take the mode chage equatos verso lockg a semaphore wth celg prorty developed ths secto ad assume ull mode greater tha or equal to the prorty of task. o add ths chage: where there are o wholly ew tasks, ad all blockg factor to our aalyss of the worst-case old mode versos are the same as ther correspodg respose tme for a old mode verso, we aga cosder the computatoal wdow W. Equato 10 ew mode versos (.e. ' =, ' = ). t s easy to gves the worst-case hgher prorty computato that show that the aalyss preseted so far reduces to the would take place the wdow for a old mode verso orgal deadle mootoc equato (equato 1) uder, cludg the computato for task. We ow smply these codtos. herefore we ca coclude that the add to that the tme B, where B represets hgher smple o-blockg deadle mootoc aalyss prorty computato due to the operato of the prorty derved by Audsley et al, ad gve equato 1, s hertace mechasm of the prorty celg protocol. merely a specal case of ths more geeral mode chage Equato 10 s thus updated to: aalyss. 4. Semaphore ockg ths secto we cosder further aalyss resultg from removg the restrcto that tasks caot lock semaphores. We assume ow that semaphores are locked ad ulocked accordg to the prorty celg protocol [7], ad seek to exted the aalyss of the prevous secto to clude blockg factors. Sha et al [8] exame the problem of choosg the celg values of semaphores whch ca be locked ad ulocked across mode chages. hey formulate strct rules for rasg ad lowerg the celg values, ad for whe a ew mode task ca be added to the system. hese rules preserve the property that a task caot be blocked more tha oce by a lower prorty task. However, t s ot possble to use ths approach here: a ew mode verso may eed to be released arbtrarly close to the mode chage. he Sha et al rules goverg the addto of ew tasks lead to a potetally log delay f semaphores are locked by ths ew task. Sha et al go o to gve a alteratve approach where system celgs rema statc betwee modes ad ew tasks ca be added mmedately after the mode chage. We adopt ths approach, ad hece defe the celg of a semaphore to be the prorty of the hghest prorty task ay mode whch uses that semaphore - the so-called celg of celgs. he problem ow becomes oe of determg the correct blockg factor for each task. Now, a old mode verso ca ever be blocked by ay ew mode verso, or wholly ew task f ay ew task were to have blocked a old mode verso the the old mode verso must have bee released after the ew task. learly ths ca ever happe, sce a old mode verso must have bee released the old mode, ad all ew tasks must have bee released the ew mode. Hece the blockg F x A W N Q W ( x) = max omv A W k k H wt W R A B 0 A 0 A 0, (19) learly, the steady-state equato for ew mode versos ad wholly ew tasks we must clude a blockg factor that accouts for such a task beg blocked by ay lower prorty ew mode verso or wholly ew task. However, ths blockg factor must also clude the potetal blockg from ay lower prorty old mode verso a lower prorty old mode verso ca geerally exst for a log tme, ad cause task to block well to the ew mode. he blockg factor B for the steady-state equato (Equato 1) s therefore equal to the logest crtcal secto of ay lower prorty old mode verso, ew mode verso, or wholly ew task lockg a semaphore of celg prorty greater tha or equal to the prorty of task. o fd the blockg factor B for a ew mode verso released after the mode chage cosder how ca be blocked by lower prorty tasks: f ether W V or W results a larger respose tme tha equato 1, the the wdow W must cosst of hgher prorty computato ad, possbly, computato from a crtcal secto of a lower prorty old mode verso. No lower prorty ew task ca have bee released ad performed computato to lock a semaphore all computato occurrg W would pre-empt lower prorty ew tasks. Hece, f a lower prorty ew task does maage to obta a semaphore to block task the the processor must have bee released to ths lower prorty task

9 before task was released, ad therefore all hgher prorty old mode versos would have completed. Hece the steady-state equato would represet the worst-case respose tme (a smlar argumet holds for the blockg factors of wholly ew tasks). herefore we ca say that the blockg factor B added to equato 14 s equal to the logest crtcal secto of ay lower prorty old mode verso lockg a semaphore of prorty greater tha or equal to the prorty of task. he report by dell et al [10] dscusses detal ths approach to reducg the blockg pessmsm ad also the approach of examg multple wdows to determe the worstcase schedulg pots for tasks wth offset formato. 5. utstadg ssues So far ths paper we have restrcted the dscusso ad aalyss to clude oly sgle processor task sets. We have ot addressed the ssue of mode chages dstrbuted systems. he aalyss ths paper ca be easly exteded to smple dstrbuted systems by merely applyg the aalyss to each processor tur, assumg a statc bdg of tasks to processors. However, oe maor problem hders ths approach: ter-processor commucato. he problem of mode chages ad commucatos has bee mostly eglected: curret dustral practce, as metoed at the start of ths paper, has bee to compute statc processor schedules to permt mode chages. dstrbuted systems these statc schedules are broadeed to clude statc schedules for the commucatos meda (usually a shared broadcast bus), wth the maor cycle tmes of the processors ad the bus beg the same. For more flexble systems the schedulablty of mode chages across dstrbuted systems must be determed. he report by dell et al [9] addresses some of the problems guarateeg ed-to-ed deadles for hard real-tme messages. he report dscusses several archtectural approaches, ad tegrates the schedulg of tasks wth the schedulg of messages: the sedg ad recevg of messages s cotrolled by software tasks o each processor. he tmg aalyss for message delvery s lked wth the tmg aalyss of all tasks scheduled o the processors. oe smple approach, usg a shared me Dvso ultple Access (DA) broadcast bus, a trasmt task o each processor takes messages from a buffer (shared wth other tasks o that processor whch sed messages), ad trasmts the messages o the bus. he trasmt task s a perodc task, wth perod equal to the DA cycle tme, ad released by the start of the processor DA slot. Smlarly, a perodc receve task takes packets from a receve buffer, shared wth a commucatos adapter, assembles messages, ad places them buffers shared wth destato tasks. dell et al gve schedulablty aalyss that ot oly bouds ed-to-ed message delvery tmes (from queug at the source processor to delvery to the destato task) but gves the computatoal load mposed by the trasmt ad receve tasks o each processor. Now, after a mode chage the load o the commucatos bus could chage: some tasks may trasmt smaller messages, perhaps less frequetly, ad ew tasks that use the bus could be troduced. hs would chage the computatoal load mposed by the trasmt ad receve tasks. hus the trasmt ad receve tasks the old mode would be old mode versos, chagg to ew mode versos wth dfferet computato tmes. Furthermore, recofgurato of the DA slots after a processor falure (say) would chage the DA cycle tme, ad affect the perod of the trasmt task (ad perhaps the receve task). Aga, these tasks would chage perods betwee modes. We must also aalyse the tmg behavour of the hard real-tme messages durg the mode chage a message queued by a task the ew mode may be delayed by messages stll the queue that were queued the old mode. Furthermore, the computatoal load of the receve task could be hgher ust after the mode chage: old mode messages could arrve whle the receve task s dealg wth ew mode messages; the receve task would have to deal wth both. We therefore propose that the way to aalyse dstrbuted hard realtme systems that ca udergo mode chages s to tegrate the aalyss developed ths paper wth the commucatos schedulablty aalyss developed by dell et al. hs s beyod the scope of ths paper ad the subect of curret research. Aother problem wth mode chages dstrbuted systems s that of sychrosg mode chage requests: slght dffereces the tmes whe a mode chage request s made o two dfferet processors could lead to a erroeous mode chage. osder a system cosstg of two tasks, each o separate processors. he tasks are sychrosed to perform a certa acto atomcally perhaps operatg a devce accessed by both processors ad are thus always released at the same tme o both processors. mage a mode chage request s receved by some part of the system ad forwarded to both processors. t s possble for the request to be receved at dfferet tmes o each processor at oe processor the request occurs before the release of the task par, ad thus the ew verso of

10 the task s ru; at the other processor the request occurs after the release of the task par, ad thus the old verso s ru. hs s ot desred, ad thus some way of coordatg mode chages s eeded. he smplest way of accomplshg ths s to use global tme: a request for a mode chage arrves, wth the request stamped by the tator wth a tme ( the ear future) whe the request s to be carred out. hs tme s terpreted as a local tme, ad hece each processor makes a cosstet decso the above example the tasks are released at the same local tmes (both are released to wth some global tme value of each other) ad hece the tasks are released atomcally. 6. Summary ad oclusos hs paper has descrbed how a smple sgle processor system cosstg of perodc ad sporadc tasks ca be allowed to udergo mode chages. revous aalyss has bee see to break dow, ad thus aalyss has bee derved whch provdes for the frst tme a schedulablty test for such systems. Such a test could easly be corporated to egeerg support tools. hs paper has also dscussed some of the approaches that could be take to exted the aalyss to cope wth more complex ad terestg schedulg problems, ad to hadle dstrbuted hard real-tme systems. 7. Refereces [1] Audsley, N.., Burs, A., Rchardso,. F., dell,. W., ad Wellgs, A.., "Applyg New Schedulg heory to Statc rorty re-emptve Schedulg", Report RR/92/120, Departmet of omputer Scece, Uversty of York, February 1992 [2] Audsley, N.., Burs, A., Rchardso,. F., ad Wellgs, A.., SRESS: A Smulator For Hard Real me Systems, Real me Research roup, Departmet of omputer Scece, Uversty of York, ctober [3] hetto, H. ad hetto,., "Some Results of the Earlest Deadle Schedulg Algorthm", EEE rasactos Software Egeerg 15(10) (ctober 1989), pp [4] ehoczky,.., Sha,. ad Dg, Y., "he Rate ootoc Schedulg Algorthm: Exact haracterzato ad Average ase Behavour", roceedgs of the Real me Systems Symposum (1989). [5] u,.., ad aylad,. W., "Schedulg Algorthms for ultprogrammg a Hard-Real me Evromet", oural of the A 20(1) (1973), pp [6] eug,. Y.., ad Whtehead,., " he omplexty of Fxed-rorty Schedulg of erodc Real me asks", erformace Evaluato (Vol. 2, art 4, Dec 1982), pp [7] Sha,., Rakumar, R., ad ehoczky,.., "rorty hertace rotocols: A Approach to Real me Sychrosato", EEE rasactos o omputers 39(9) (September 1990), pp [8] Sha,., Rakumar, R., ehoczky,., ad Ramamrtham,., "ode hage rotocols for rorty-drve re-emptve Schedulg", Real me Systems 1(3) (1989), pp [9] dell,. W., Burs, A., ad Wellgs, A.., "Allocatg Real me asks (A N-Hard roblem made Easy)", Real me Systems 4(2) (ue 1992) pp [10] dell,., Usg ffset formato to Aalyse Statc rorty re-emptvely Scheduled ask Sets, Dept of omputer Scece, Uversty of York (August 1992). Smulator Dagrams these dagrams, tme creases across from left to rght. ask executo s represeted by boxes. A task whch s preempted s show by a le at the level of the bottom of the boxes; a task whch s blocked by a le at the level of the top of the boxes. hese states are aotated by a varety of symbols: ask release s marked by a low-level crcle, ad successful task completo by a hgh-level crcle. f a task fals to meet ts deadle, or otherwse fals to complete, the a flled hgh-level crcle s used. ask deadles are marked by a vertcal le wth a verted v mark at the bottom. essage trasmsso s marked by hgh-level outgog arrow, ad message recepto by a low-level comg arrow. A example s show below. task_0 task_