GOING ARM A CODE PERSPECTIVE

Transcription

1 GOING ARM A CODE PERSPECTIVE ISC18 Guillaume Colin de Verdière JUNE 2018 GCdV PAGE 1 CEA, DAM, DIF, F Arpajon, France June 2018

2 A history of disruptions All dates are installation dates of the machines at CEA/DAM CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 2 GCdV

3 The scalar era CDC Small central memory Larger out of core memory 60bits words Fortran Scalar codes Before IBM IBM 360/ CDC GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 3

4 The first disruption: vectorization CRAY 1S bits words 1 proc 80 MHz 160 Mflops GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 4

5 Stability period CRAY XMP procs, 0.96 Gflops CRAY YMP procs, 2.7 Gflops CRAY T procs, 1.8Gflops/proc, 454MHz IEEE 754 Main use : concurrent scalar jobs GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 5

6 Introduction of parallelism (R&D) CRAY T3D nodes, 128 procs 150 MHz) 2x64MB CRAY T3E procs (Alpha) Mainly PVM, a bit of MPI GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 6

7 The second disruption: Cluster supercomputers TERA nodes, 4 x EV68 5TFlops TERA nodes, Intel 1.5GHz, 48GB/node TERA nodes, Intel Xeon MW HPL: 1.05Pflops MPI Domain decomposition mainly GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 7

8 The third disruption: multi level parallelism TERA nodes, KNL 4MW HPL: Pflops Strong impact on codes: 3 level parallelization MPI across nodes OpenMP across cores Vectorization inside a core The dawn of the fourth disruption Energy Awareness GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 8

9 Reasons to go Arm CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 9 GCdV

10 Code portability is essential Our code are long lived years = Several generations of supercomputers Most are mission critical Tera are Intel based Need an alternative architecture to validate codes Different compilers Standards interpretations Different optimized libraries Rounding influences Different ISA Difference in optimizations GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 10

11 Codes in the future Energy is becoming more and more important Our focus is on exascale class machines for ~2022 Balanced between Energy to Solution and Time to Solution Certain classes of codes are better suited to E2S Older ones are more T2S Codes will have to adapt to this new constraint Better dialog with the system hints to SLURM, frequency regulation, New energy aware algorithms Minimize data movements Make the developers conscious of the resources used. GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 11

12 Arm Proof of Concept future partition Goal: study emerging high efficiency architectures Architecture based on the Mont-Blanc3 (*) project results To be installed later in 2018 Future partition Node type 2* THX2 ( GHz -- tbc) # compute nodes 160 (tbc) Memory size 256 GB / node I/O router 20 GB/s Interconnect EDR pruning 1:2 Cooling DLC (Sequana infrastructure) (*) This project has received funding from the European Union's Horizon 2020 research and innovation program under grant agreement n GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 12

13 Challenges going Arm CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 13 GCdV

14 The compiler and runtime matter Lulesh V2.0.3, OpenMP GCC 7.3 Cce/ ,2 1 0,8 Parallel efficiency 0,6 Efficacité OpenMP CRAY Efficacité OpenMP GNU 0,4 Cavium ThunderX2 A2 stepping 0, Credit: JC Weill GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 14

15 Optimized libraries matter (1/2) A standard Arm version of Intel SVML SVML is automatically used by Intel compiler -fsimdmath for C/C++ Based on SLEEF Vectorized Math Library What about optimized FTN? is flang up to the task? GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 15

16 Optimized libraries matter (2/2) Intel MKL library is heavily used in production Blas, Lapack, FFT, In most cases hand coded algorithms don t beat MKL In the Arm world, optimized libraries start to exist BLAS - Basic Linear Algebra Subprograms (including XBLAS, the extended precision BLAS). LAPACK - a comprehensive package of higher level linear algebra routines. FFT - a set of Fast Fourier Transform routines for real and complex data. Math Routines - Optimized exp, pow and log routines Multithreaded versions? TBB? Tasks in general? GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 16

17 Prepare our code port: CEA-Arm/Allinea collaboration Longstanding collaboration between CEA and Allinea CEA has funded quite a lot DDT, MAP and Performance Report Scalability (large number of cores, large number of libraries, KNL, ) Robustness Thread support (MPC, OpenMP) C++ friendliness Allinea Metric Plugin Interface compatibility with OpenSource profiling tools like MALP ( Collaboration extension to Arm (WiP) Idea: have the same developer experience on Arm and on X86 New items for co-design Compiler MPC support in LLVM, linker optimization, Optimized scientific libraries Profiling and debugging tools for Arm MPI, perf counters, vectorization, Thread debugging OS support (Work in Progress) GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 17

18 Conclusion Energy to Solution will gain importance Arm based solutions are to be investigated seriously Arm based (super)computers are available now Thanks to MontBlanc3 (Atos) but also CRAY, HPE, The software ecosystem is maturing fast Compiler and libraries provided by Arm Allinea tools It is time to start porting codes to Arm And investigate new algorithms that take Energy into account GCdV CEA, DAM, DIF, F Arpajon, France June 2018 PAGE 18

19 PAGE 19 CEA, DAM, DIF, F Arpajon, France June 2018 Commissariat à l énergie atomique et aux énergies alternatives Centre DAM Ile-de-France Arpajon Cedex, France T. +33 (0) DAM DSSI ED GCdV Etablissement public à caractère industriel et commercial RCS Paris B