PowerEdge 3250 Features and Performance Report

Transcription

1 Performance Brief Jan 2004 Revision 3.2 Executive Summary Dell s Itanium Processor Strategy and 1 Product Line 2 Transitioning to the Itanium Architecture 3 Benefits of the Itanium processor Family PowerEdge 3250 Performance Overview 4 Appendix A-D: System Configuration for 5 Benchmarks PowerEdge 3250 Features and Performance Report Executive Summary This White Paper begins by introducing the Dell Itaniumbased server offerings and their market positioning. The Dell PowerEdge 3250 is a dual processor, rack dense server based on the Itanium 2 processor and is targeted as a solution for High-Performance Compute Clusters. This paper then provides a description of the Intel Itanium 2 processor and discusses the strengths and advantages of its architecture. Itanium 2 is Intel s 64-bit processor that is designed to deliver superior Floating-Point (FP) performance and improved memory bandwidth over 32-bit processors. It also provides increased memory addressability up to 128GB. Instead of using register extensions as in its past transition from 16-bits to 32-bits (80286 to i386), Intel has designed a new architecture for its 64-bit processor called EPIC (Explicitly Parallel Instruction Computing). The latter half of this paper presents a performance overview of the PowerEdge 3250 and shows how it uses the Itanium 2 architecture to achieve significant gain over 32-bit and proprietary systems. Notice THIS WHITE PAPER IS FOR INFORMATIONAL PURPOSES ONLY, AND MAY CONTAIN TYPOGRAPHICAL ERRORS AND TECHNICAL INACCURACIES. THE CONTENT IS PROVIDED AS IS, WITHOUT EXPRESS OR IMPLIED WARRANTIES OF ANY KIND. Page 1 Jan 2004

2 1. Dell s Itanium Processor Strategy and Product Line Dell launched its first Itanium-based server product, the PowerEdge 7150, in June of 2001 in step with Intel s launch of their original Itanium processors. This marked the first time Dell had a 64-bit product and gave Dell a vehicle that could be used for customers looking for a transition platform from proprietary systems to industry standard systems. In July of 2003, Dell followed on to its commitment to the Intel Itanium processor family with the launch of the PowerEdge 3250, a dual processor server optimized for the High Performance Computing Cluster (HPCC) market. Dell will continue its commitment to driving industry standard products with a strong 32-bit product roadmap based on the Intel Xeon processors, as well as continued investment in the Itanium Processor Family with a quad processor Itanium 2 based product launching in the first half of Dell is committed to providing a product line that emphasizes the strengths of today s technology with a migration path to the technology that will drive businesses in the future. 1.1 PowerEdge 3250 Positioning The PowerEdge 3250 is a rack optimized (2U) server that supports up to two Itanium 2 processors. With this server s dense form factor and the excellent performance capabilities of the Itanium 2 processor, the PowerEdge 3250 is ideal to be used as a compute node in HPCC. The concept of HPCC or Beowulf (the project name used by original designers) clusters originated at the Center of Excellence in Space Data and Information Sciences (CESDIS), located at the NASA Goddard Space Flight Center in Maryland in The project s goal was to design a cost-effective, parallel computing cluster built from off-the-shelf components that would satisfy the computation requirements of the earth and space sciences community. As cluster solutions have gained acceptance for solving complex computing problems, HPC Clusters are starting to replace supercomputers in this role. The cost of commodity HPCC systems has changed the purchase decision from evaluating expensive proprietary solutions to evaluating solutions based on their ability to deliver exceptional price-to-performance ratios and support capabilities. The PowerEdge 3250 provides an optimal platform for this market with dual Itanium 2 processors, support for up to 16GB of DDR266 memory, 2 internal hard drives (max capacity up to 292GB), and support for Red Hat Linux Advanced Server 2.1 and Microsoft Windows Server For more details on the PowerEdge 3250 server, please go to the following link on Dell s website: Page 2 Jan 2004

3 2. Transitioning to the Itanium Architecture The decision to make any new technology transition is not a simple one and the transition to Itanium Architecture is no exception. The process will create disruptions in an existing infrastructure of both hardware and software and there are specific costs associated with this transition. As a result of the potential impact of such a technology transition, careful planning and coordination with application and hardware vendors is critical. When planning to migrate to a new processor architecture, there are a number of factors that must be considered. These factors include: the technology ecosystem, software availability, and strength of the technology roadmap. A brief discussion of each of these factors follows. 2.1 Technology Ecosystem A technology ecosystem is a comprehensive set of hardware, software, and services available to support a technology. This large, stable ecosystem is critical for a major technology transition such as this to ensure that all hardware and applications are fully tested and tuned for maximum performance and reliability. The Itanium processor family provides industry-leading performance on many benchmarks today, and Intel is predicting significant performance gains in the next few years. The processor s future is supported by leading enterprise OEMs and a growing software ecosystem, as well as the assurance of Intel Architecture (IA), volume economics, and the Intel long-term roadmap. Over 40 OEMs are currently shipping Itanium 2-based platforms, and 2 and 4-processor Intel server building blocks currently are in production. By the 2004 or 2005 time frame, over 95 different Itaniumbased platforms are expected to be available. [1] 2.2 Software Availability Application support is critical to every new technology or architecture. Without support from leading Independent Software Vendors (ISVs), an outstanding architecture design will never evolve. With Intel s strong relationships with software vendors, there has been a significant amount of application development and tuning for Itanium architecture. Over 500 applications and tools are available today, and were expected to reach 700 by the end of [1] Enterprise applications such as Microsoft SQL Server, Oracle 9i, SAP mysap and BEA WebLogic are available today. 2.3 Technology Roadmap A technology roadmap encompasses currently available hardware within a specific technology family and the expected future developments and improvements in that hardware. Additionally, the ability of technology to meet end user requirements over time is accounted for through a strong technology roadmap. The Intel Itanium 2 processor with 6 MB of L3 cache is designed for demanding enterprise and technical applications. It is a socket-compatible successor to the original Itanium 2 processor, delivering investment protection for OEMs and end-users. In addition, it is binary-compatible with existing Itanium-based applications and Intel expects it to provide performance increases from 30 to 50 percent or more over the original Itanium processor. [1] Intel predicts that the new Itanium 2 processor 6M will provide the following advantages over the previous generation Itanium 2 processor: x application performance scaling Page 3 Jan 2004

4 2 increase in L3 cache 1.5 improvement in clock rate and L3 cache bandwidth [1] Intel reports that the Itanium 2 processor has been shown in several benchmarks to provide better performance or price/performance than RISC systems on various technical computing applications. [2] The current Itanium family of processors includes: Itanium 2 Processor 6M: 1.5 GHz with up to 6 MB L3 cache, MP capable Itanium 2 Processor: 1.40 GHz, 1.5 MB L3 cache, DP capable Low Voltage Itanium 2 Processor: 1.0 GHz with 1.5 MB L3 cache, DP capable Future enhancements planned for the Itanium processor include a 9 MB cache, 90 nanometer (nm) technology, and dual or multi-core technology. [1] 2.4 The Decision to Transition As discussed earlier in this paper, the decision to transition to any new architecture is one that requires significant planning, coordination, and a willingness to invest time and resources. The ultimate goal is a new technology that will increase the performance and reliability of a company s IT infrastructure while lowering the overall cost of management and ownership. This decision is one that must compare the costs associated with the new technology versus the lost opportunity costs of continuing to operate with older technology. The Itanium Product Family provides a strong technology roadmap in current and future Itanium products, a very strong base of application support and continued development by ISVs, and significant support from hardware vendors throughout the industry. For more specific information related to the Itanium architecture and planning for a migration, see the Intel whitepaper titled Transitioning to the Intel Itanium Architecture, published in November 2003 and available at the link below: Page 4 Jan 2004

5 3. Benefits of the Itanium Processor Family The Itanium 2 processor, which is based on the Explicitly Parallel Instruction Computing (EPIC) model, supports high instruction parallelism, large memory addressability and excellent floating-point performance. A large number of execution registers allow the compiler to schedule code to allow parallel execution of up to six instructions in a single clock cycle. Advances over the previous generation Itanium processor include improvements in frequency, pipeline stages, branch prediction, cache design and system interfaces. [3] 3.1 Increased Memory Addressability A 64-bit computer can theoretically provide access for up to 18 Exabytes of un-segmented memory, which would provide the ability to run larger problems, run more applications concurrently in memory, and reduce I/O latency by keeping more data in physical memory. The current implementation of the Intel Itanium 2 processor, when used with the Intel E8870 chipset, supports up to 128GB of RAM. The operating system sees all of this memory as flat address space and 64-bit applications are not limited by the 4GB barrier imposed by a 32-bit architecture. In x86 architecture, 32-bit applications cannot address more than 4GB of memory and, in practice, cannot use more than 2 or 3GB of memory without special extensions. This makes it impossible, for instance, to hold large databases in memory or to perform large matrix operations without resorting to segmentation or swapping out to the slower disk. While many processors based on the x86 architecture are capable of addressing memory in excess of 4GB, they still use 32-bit pointers for memory addressing. Since an application is limited to 32-bits under the x86 architecture, it cannot address more then 4GB of memory. The upper 1GB of memory is still reserved for kernel processes, effectively limiting applications to 3GB of usable memory even though the system supports more than 4GB of memory. The Itanium 2 architecture overcomes this limitation by opening the 4GB barrier and enabling up to 128GB of memory addressability bit Operations The Itanium 2 processor can operate directly on 64-bit integer and floating point data entities. Sixtyfour (64)-bit integers, for instance, provide the ability to operate on larger numbers in a single operation, helping to improve performance for operations such as encryption, data copy, graphics, and large multimedia processes. Since many tasks can be completed in a single 64-bit operation instead of two 32-bit operations, Itanium 2 based systems are designed to provide greater performance at the same clock rate. 3.3 Architectural Features of the Itanium 2 Processor Although the Itanium 2 is a 64-bit architecture, it has additional features beyond defining 64-bit operations and register widths that enable high-performance on technical workloads. In x86 processors, parallelism in the instruction stream is detected and exploited by complex out-of-order pipeline designs. The EPIC architecture enables three instructions to be statically grouped into 16 byte bundles, and multiple instruction bundles can be executed in parallel. Since the compiler takes care of explicitly marking which instructions can be executed in parallel without data hazards, the Itanium 2 processor uses an in-order, six instruction issue pipeline to execute up to six instructions in parallel. [3] 1. Register model: The Itanium 2 processor provides many more registers than current 32-bit x86 processors, which removes one of the main barriers to optimizing performance. A large set of registers provides the compiler with tremendous flexibility for exploiting parallelism. [3] Page 5 Jan 2004

6 The Itanium 2 processor provides the following registers: 128 General Purpose Registers: 64-bit general-purpose registers that are used to hold values for integer and multimedia computations. 64 Predicate Registers: 1-bit predicate registers that control conditional execution of instructions and conditional branches. 8 Branch Registers: 64-bit branch registers that are used to specify the target addresses of indirect branches. 128 Floating-Point Registers: 82-bit floating-point registers that are used for floating-point computations. Another performance feature of the Itanium 2 processor is the Register Stack, which allows parameters to be passed to and from procedures easily. A subset of the Itanium processor general registers is organized as a logically infinite set of stack frames that are allocated from a finite pool of physical registers. This provides a programming model that looks like an unlimited physical register stack to the application. 2. Predication: Branches can be a primary performance limiter, and Itanium processors support a concept known as predication to remove many branches and their associated performance penalty. Predication is the conditional execution of an instruction based on a qualifying predicate. A qualifying predicate is essentially a true/false flag set by results from a previous instruction. The ability of the compiler to remove branches through predication is a key to Itanium processor family performance. Branch Prediction: Itanium architecture also provides a branch architecture which strives to minimize the number of branch mis-predictions. Information about branch behavior can be provided, statically or dynamically, to the processor to improve branch prediction. This information can be encoded as part of a branch instruction using hints, such as whether a branch has either been taken or not taken before, how much code the processor should prefetch at the branch target, and if the processor should use the dynamic information that it has collected for that branch. Hints do not affect the functional behavior of the program and may be ignored by the processor. Software Pipelining: Compilers may try to improve the performance of loops through a technique known as software pipelining, in which a loop is unrolled and can be pipelined into the processor execution unit. However, unrolling is not always effective on traditional architectures and can result in code expansion and increased cache misses. To maintain the advantages of pipelining, while overcoming these limitations, the Itanium 2 processor provides architectural support for software pipelining without unrolling. In addition to dedicated instructions which support software pipelining, Itanium processors also utilize the concept of a rotating register stack. Rotating registers enable implementation of software pipelining with predication, and support software pipelining of loops. This allows the compiler to generate very compact code for software loops, and thus greatly increase performance of software loops. 3. Advanced Floating-Point Architecture: The Itanium 2 processor provides leading floatingpoint benchmark performance, compared to 32-bit x86 processors and 64-bit RISC processors, due to its advanced floating-point architecture. [4] A stack-based floating-point architecture is no longer used. Full IEEE support is provided for the single, double, and double-extended (80- bit) data types. Some extensions, such as a fused multiply and add operation, minimum and maximum functions, and a register file format with a larger range than the double-extended Page 6 Jan 2004

7 memory format, are also included. Itanium processors also support Streaming SIMD Extensions (SSE only, not SSE2) parallel floating-point instructions which operate on two 32- bit single-precision numbers, resident in a single floating-point register, independently and in parallel. 4. Speculation: Control speculation allows loads and their dependent uses to be safely moved above branches. Support for this is enabled by special bits that are part of the integer registers and by special values for floating-point registers. Data speculation is used to move loads above stores using advanced loads. Data speculation allows loads to be moved above possibly conflicting memory references. Advanced loads exclusively refer to data speculative loads. Itanium processors allow the programmer or compiler to move the load above the store even if it is not known whether the load and the store reference have overlapping memory locations. In this section we highlighted the benefits of the Itanium 2 Architecture and the advantages it provides with its 64-bit capabilities. In the next section we will evaluate the Dell PowerEdge 3250 system equipped with Itanium 2 processors, and compare its performance on industry standard benchmarks to performance of other 32-bit systems and 64-bit proprietary systems. Page 7 Jan 2004

8 4. PowerEdge 3250 Performance Overview Due to the Itanium architecture of its processors, the PowerEdge 3250 is able to achieve significant performance gains versus 32-bit and proprietary technologies, specifically in floating-point related applications. [4] These performance results support the product positioning for the High Performance Computing Cluster (HPCC) market, because most HPCC applications are extremely dependent on these performance characteristics. 3.1 LINPACK Performance The Linpack benchmark introduced by Prof. Jack Dongarra is used to solve a dense system of linear equations. A version of the benchmark that allows the user to scale the size of the problem and to optimize the software in order to achieve the best performance for a given machine has been used to rank the world s top super computers since The benchmark result is measured in floating-point operations per second (FLOPs) and it reflects the floating-point capabilities of the processor, the compiler and the capabilities of the software libraries. Itanium 2 (1.5GHz/6MB L3) Itanium 2 (1.4GHz/1.5MB L3) Opteron (1.8GHz) Theoretical Peak (GFLOPs) GFLOPs Performance (GFLOPs) Figure1: High-Performance Linpack Performance (64-bit) Figure 1 demonstrates the floating-point capabilities of the Dell PE3250 server running the 1.5GHz/6MB and 1.4GHz/1.5MB Itanium 2 processors. (See Appendix A for system configuration and testing details.) Performance of the Linpack benchmark is shown along the X-axis in GFlops (1 GFlops = 10 9 Flops). The theoretical GFlops rating for the processors are also shown in the same chart, and indicates the maximum number of floating point operations that the processor can perform. The efficiency of the processor is defined as peak GFLOPs divided by theoretical peak GFLOPs. Figure 1 shows that the Dell PE3250 system configured using dual Itanium 2 1.5GHz/6MB processors was able to achieve 94% efficiency using the Intel Math Kernel Libraries (MKL) to achieve a peak GFLOP rating of GFLOP. (See Appendix A.) Figure 1 also shows that the PE3250 system configured using dual Itanium 2 1.4GHz/1.5MB processors was able to achieve 91% efficiency using the Intel Math Kernel Libraries (MKL) to Page 8 Jan 2004

9 achieve a peak GFLOP rating of and GFLOP, as compared to the 7.2 GFLOP score on the 1.8GHz Opteron processor. (See Appendix A.) Linpack Performance on a PE3250 Compute Cluster The LINPACK benchmark is also used to classify the ranking of the Top500 Supercomputers in the world. In a 16-node, high performance compute cluster with 32 Itanium 2 1.5MHz/6MB cache processors, 4 GB of memory, and running Red Hat Linux AS 2.1, the PowerEdge 3250 cluster running in the Dell HPCC Lab achieved a performance result of GFLOPs as of November, This result outperformed the top 32-way RISC based result on the 32 processor IBM p690, which achieved a result of GFlops as of Dec [5]. In addition to providing superior performance results, the PowerEdge 3250 HPC cluster provides an excellent price/performance value proposition for customers seeking top floating-point performance. These impressive results position the PowerEdge 3250 as a leader in floating point application performance, and further demonstrate Dell and Intel s commitment to delivering high performance server solutions maximized for industry standard operating environments. See Appendix A for Dell system configuration and testing details and reference [5] for information about IBM testing details SPEC CPU2000 Benchmark Performance SPEC CPU2000 is the next-generation industry-standardized CPU-intensive benchmark suite from the Standard Performance Evaluation Council (SPEC). The CPU2000 benchmarks are designed to provide a comparative measure of compute intensive performance across different hardware platforms. The benchmarks are developed from real user applications and measure the performance of the processor, memory and compiler on the tested system. Fourteen (14) CPU-intensive benchmarks written in FORTRAN (77 and 90) and C languages are included in the CFP2000 suite and are used to measure the performance of the system when running compute-intensive floating-point applications. SPEC CPU2000 provides performance measurements for system speed and throughput. The speed metric, SPECfp2000, measures how fast a machine completes running all of the floating-point benchmarks. The throughput metric, SPECfp_rate2000, measures how many tasks a computer can complete in a given amount of time. CPU2000 has been designed to measure throughput for both single-processor and symmetric-multiprocessors. PE3250 CFP2000 Speed Result The PowerEdge 3250 s SPEC CFP2000 result, completed in June 2003, demonstrated superior floating point performance as compared to the AMD Opteron-based IBM eseries 325 server (See Figure 2). The performance of these servers on the floating-point suite of SPEC CPU2000 benchmark (CFP2000) when configured with one processor is shown in Figure 2. See Appendix B for system configuration and testing details. Figure 2 shows the peak result for the SPEC CFP2000 benchmark suite on the Dell PowerEdge 3250 server running the 1.5GHz/6MB and 1.4GHz/1.5MB Itanium 2 processors, and compares it to the 64-bit AMD Opteron processor running at 2.0 GHz. The Itanium 2 processor running at 1.5GHz with 6MB L3 cache performed 52.3% better than the 2.0GHz Opteron processor on the SPECfp2000 benchmark. (See Figure 2.) Similarly, the 1.4GHz Itanium 2 processor with an L3 cache of 1.5MB was able to outperform the Opteron processor by 17.3%. (See Figure 2.) Page 9 Jan 2004

10 Dell PE3250 Itanium 2 (1.5GHz/6MB L3) 1875 Dell PE3250 Itanium 2 (1.4GHz/1.5MB L3) 1444 IBM eseries325 Opteron (2.0 GHz) SPEC CFP2000 benchmark score Figure 2: SPECfp_peak2000 Performance (64-bit) PE3250 SPEC CFP2000 Throughput Result Figure 3 shows the performance of the SPEC CFP2000 throughput tests for the Dell PE3250 and IBM eseries325 systems configured using dual processors to measure the multi-processor system performance. See Appendix C for system configuration and testing details. Dell PE3250 Itanium 2 (1.5GHz/6MB L3) 37.3 Dell PE3250 Itanium 2 (1.4GHz/1.5MB L3) 27.8 IBM eseries325 Opteron (2.0 GHz) SPEC CFP2000 benchmark score Figure 3: SPECfp_rate2000 Performance (64-bit) The PE3250 system configured using dual 1.5GHz Itanium 2 processors with 6MB L3 cache performed 38% better than the eseries325 system with dual 2.0GHz Opteron processors. (See Figure 3.) The PE3250 system configured using dual 1.4GHz Itanium 2 processors with 1.5MB L3 cache was observed to be 3% faster than the eseries325 system with dual Opteron processors. (See Figure 3.) Page 10 Jan 2004

11 SPEC FP bit vs. 32bit Performance Comparison The Dell performance team also saw significant improvements in floating-point performance when comparing the performance of the PE3250 running Itanium 2 processors to a Dell server running 32-bit Intel Xeon processors. The performance improvements on a Dell PE3250 system compared to a Dell PE1750 system running 3.2GHz Xeon processors with 1MB L3 cache are shown in Figure 4. See Appendices B and C for system configurations and testing details. 90% 80% 80.19% Performance Gain (% 70% 60% 50% 40% 30% 20% Dell PE3250 Itanium 2 (1.4GHz/1.5MB L3) Dell PE3250 Itanium 2 (1.5GHz/6MB L3) 57.30% 21.14% 34.30% 10% 0% SPECfp_peak2000 SPECfp_rate2000 Figure 4: SPECfp2000 benchmark performance (64-bit versus 32-bit) The performance gains when comparing performance of the Dell PE3250 system configured using 1.4GHz/1.5MB Itanium 2 to the Dell PE1750 system are listed below: The PE3250 system with a single 1.4GHz/1.5MB L3 Itanium 2 processor was 21.14% faster on the SPEC CFP2000 speed test compared to the PE1750 running a single 3.2GHz Xeon processor with 1MB L3 cache. (See Figure 4.) The PE3250 system with two 1.4GHz/1.5MB L3 Itanium 2 processors was 34.30% faster than the PE1750 system running dual 3.2GHz/1MB Xeon processors for the SPEC CFP2000 throughput tests. (See Figure 4.) The performance gains were more significant when the Dell PE3250 system was configured using 1.5GHz/6MB Itanium 2 processors and compared to the Dell PE1750 system. The PE3250 system with a single 1.5GHz/6MB L3 Itanium 2 processor was 57.3% faster on the SPEC CFP2000 speed test compared to the PE1750 running a single 3.2GHz Xeon processor with 1MB L3 cache. (See Figure 4.) The PE3250 system with two 1.5GHz/6MB L3 Itanium 2 processors was 80.20% faster than the PE1750 system running dual 3.2GHz/1MB Xeon processors for the SPEC CFP2000 throughput tests. (See Figure 4.) Page 11 Jan 2004

12 3.2.3 MSC.NASTRAN Performance MSC/Nastran is widely run on servers to perform structural analysis of complex structures. The Dell performance team submitted results for the latest MSC/Nastran v2004 benchmark on the Dell PowerEdge 3250 and PowerEdge2650 to MSC Software. The Nastran benchmark is a system level benchmark and exercises the processor, memory and disk subsystem. See Appendix D for system configuration and testing details. xxcmda_1 57% xxcmd0 123% xxafst0 49% xltd0 80% xlem0 139% lgqd0 97% 0% 50% 100% 150% Performance Improvement (%) Figure 5: MSC.Nastran Performance (64 vs 32-bit) Figure 5 compares the performance of the PowerEdge 3250 server against the 32-bit PowerEdge 2650 server. See Appendix D for system configuration details. The 1.5GHz/6MB Itanium 2 based server outperformed the Xeon based server on all the models in this benchmark. The advanced floating-point capabilities of the Itanium 2 processor, along with its ability to handle large data sets, enabled it to achieve impressive performance gains versus the 2650 ranging from 50% to 139% across the different Nastran models (see Figure 5). 4.0 Conclusion In this paper we discussed the architectural benefits and capabilities of the Itanium 2 processor and the benefits of transitioning to the Itanium 2 processor for the HPCC community. The performance of the PE3250 on industry-standard benchmarks like Linpack, SPEC CPU2000 and Nastran was summarized and compared to other 64-bit and 32-bit systems.. The PE3250 is ideal as a compute node in a high performance compute cluster due to its dense form factor and excellent price/performance proposition. Page 12 Jan 2004

13 APPENDIX A: System Configuration for the Linpack Benchmark PowerEdge 3250 w/ dual 1.5GHz w/ 6MB L3 cache Itanium 2 processors, 8GB DDR200 memory, Linux RedHat Advanced Server 2.1 Errata 2, 36GB SCSI U320 15K RPM Hard Drive. Test run by Dell Enterprise Performance Team in Nov PowerEdge 3250 w/ dual 1.4GHz w/ 1.5MB L3 cache Itanium 2 processors, 8GB DDR200 memory, Linux RedHat Advanced Server 2.1 Errata 2, 36GB SCSI U320 15K RPM Hard Drive. Test run by Dell Enterprise Performance Team in Nov AMD Opteron Processors Model 244 with 1MB L2 Cache in M&A Technology Patriot 64 Model 4400 server, 4GB PC2700, 64-bit SuSe 8.1 Linux Professional Edition with Numa Kernel. Tested by AMD in July 2003; results available at: APPENDIX B: System Configuration for SPECfp_peak2000 PowerEdge 3250 w/ one 1.5GHz/6MB Itanium 2 processor, 8GB DDR200 memory, Windows Server 2003, Enterprise Edition, Intel C++ and Fortran Compiler 7.1 Test run by Dell Enterprise Performance Team in Aug PowerEdge 3250 w/ one 1.4GHz/1.5MB Itanium 2 processor, 8GB DDR200 memory, Windows Server 2003, Enterprise Edition, Intel C++ and Fortran Compiler 7.1 Test run by Dell Enterprise Performance Team in Sept PowerEdge 2650 w/ one 3.2GHz Xeon processor w/ 1MB L3 cache, 4GB DDR266 memory, Windows 2000 Advanced Server, Intel C++ and Fortran Compiler 7.1 Test run by Dell Enterprise Performance Team in Nov IBM eserver 325 w/ one 2.0 GHz Opteron processor, 2GB DDR266 memory, SuSE SLES8 Linux, 64-bit PGI Fortran and SuSE gcc33 compilers. Test run by IBM in Sept Above results are available at Competitive numbers shown reflect published results on as of January For the latest SPEC CFP2000 benchmark results, visit APPENDIX C: System Configuration for SPECfp_rate2000 PowerEdge 3250 w/ dual 1.5GHz/6MB Itanium 2 processors, 8GB DDR200 memory, Windows Server 2003, Enterprise Edition, Intel C++ and Fortran Compiler 7.1 Test run by Dell Enterprise Performance Team in Aug PowerEdge 3250 w/ dual 1.4GHz/1.5MB Itanium 2 processors, 8GB DDR200 memory, Windows Server 2003, Enterprise Edition, Intel C++ and Fortran Compiler 7.1 Page 13 Jan 2004

14 Test run by Dell Enterprise Performance Team in Sept PowerEdge 2650 w/ dual 3.2GHz/1MB Xeon processors, 4GB DDR266 memory, Windows 2000 Advanced Server, Intel C++ and Fortran Compiler 7.1 Test run by Dell Enterprise Performance Team in Nov IBM eserver 325 w/ dual 2.0 GHz Opteron processors, 2GB DDR266 memory, SuSE SLES8 Linux, 64-bit PGI Fortran and SuSE gcc33 compilers. Test run by IBM in Sept Results available at Competitive numbers shown reflect published results on as of December For the latest SPEC CFP2000 benchmark results, visit APPENDIX D: System Configuration for MSC.Nastran PowerEdge 3250 configured with dual 1.5GHz /6MB Itanium 2 processors, 16GB DDR200 memory, Linux RedHat Advanced Server 2.1 (64-bit, Errata 2). Storage configuration PowerVault 200S hosting 5 x 36GB SCSI U320 15K RPM Hard Drives (One OS Drive, Four drives for Scratch directory) software striped. Test run by Dell Enterprise Performance Team in Nov PowerEdge 2650 configured with dual 3.2GHz/1MB L3 cache, 12GB DDR266 memory, Linux RedHat Advanced Server 2.1(32-bit). References Storage configuration PowerVault 200S hosting 5 x 36GB SCSI U320 15K RPM Hard Drives (One OS Drive, Four drives for Scratch directory) software striped. Test run by Dell Enterprise Performance Team in Nov [1] Intel White Paper, Transitioning to the Intel Itanium Architecture, November Available at: [2] Intel White Paper, Scaling Technical Computing Applications: The Shift from RISC to EPIC, November See: [3] Itanium 2 Processor Microarchitecture, by Cameron McNairy and Don Soltis. Published in the IEEE Micro Magazine, March-April [4] The Itanium 2 processor holds the top position (as of Jan 2004) on the SPECfp2000 benchmark which is an industry-standard benchmark to measure floating-point performance of a processor. See for the latest SPECfp2000 benchmark results. [5] Tested by IBM. Results available at: 1.ibm.com/servers/eserver/pseries/hardware/system_perf.pdf. Page 14 Jan 2004

15 THIS WHITE PAPER IS FOR INFORMATIONAL PURPOSES ONLY, AND MAY CONTAIN TYPOGRAPHICAL ERRORS AND TECHNICAL INACCURACIES. THE CONTENT IS PROVIDED AS IS, WITHOUT EXPRESS OR IMPLIED WARRANTIES OF ANY KIND. SPEC, SPEC CPU2000, and SPEC CFP2000 are registered trademarks of the Standard Performance Evaluation Corporation. For the latest SPEC CFP2000 benchmark results, visit Dell, PowerEdge, and PowerVault are trademarks of Dell Inc. Intel and Itanium are registered trademarks and Xeon is a trademark of Intel Corporation. Other trademarks and trade names may be used in this document to refer to either the entities claiming the marks of their products. Dell disclaims proprietary interest in these marks and names of others. Copyright 2004 Dell Inc. All rights reserved. Reproduction or translation of any part of this work beyond what is permitted by U.S. copyright laws without the written permission of Dell Inc. is unlawful and strictly forbidden. Page 15 Jan 2004