ET2640 Unit 5:ADVANCED I/O TECHNIQUES skong@itt-tech.edu
HARDWARE CONNECTION CHAPTER 8
8051 PINOUT
XTAL1 & XTAL2 On-chip oscillator requires an external clock Quartz crystal clock 2 external 30 pf capacitors The speed of the chip refers to the maximum oscillator frequency
XTAL1 & XTAL2
RST Pin 9 is RESET pin active high When it is active all values in registers are lost and PC = 0000 Needs to be active for 2 machine cycles
POWER-ON RESET
RESET VALUES
EA External Access If the chip has on-board ROM should be tied to Vcc If there is external ROM should be tied to ground Cannot be left unconnected
PSEN Program Store Enable Output pin Connects to the Output Enable(OE) pin of the ROM chip that contains the program code
ALE Address Latch Enable Output Active high Discussed in detail later
8051 INTERFACING TO EXTERNAL MEMORY CHAPTER 14
SEMICONDUCTOR MEMORY Memory Capacity for memory chips Measured in bits Memory Organization Memory chip contains 2 a locations, where a is the number of address pins Each location contains d bits, where d is the number of data pins on the chip The entire chip contains 2 a b bits
EXAMPLE A given memory chip has 11 address pins and 1 data pin. Find the organization and capacity 2 11 = 2048 each location holds 1 bit = [2Kx1] Total capacity is 2K bits
SEMICONDUCTOR MEMORY Speed Access time Usually measured in nano-seconds
ROM Nonvolatile PROM EPROM EEPROM Flash Mask ROM
Table 14 2 Some UV-EPROM Chips 128K bits 150 ns 27 = UV-PROM
Table 14 3 Some EEPROM and Flash Chips EEPROM
RAM Volatile SRAM NV-RAM Nonvolatile RAM DRAM
Table 14 4 Some SRAM and NV-RAM Chips
CHECKSUM BYTE ROM Detect corruption Generation Add all bytes dropping any carries 2 s compliment Verification Add all bytes including checksum byte Result should be 0
DRAM Packaging issues Too many address pins Solution is multiplexing address pins RAS CAS May have separate pins for D IN, D OUT
MEMORY ADDRESS DECODING Simple logic gate address decoding 74LS138 3-8 decoder
Figure 14 4 Logic Gate as Decoder
Figure 14 5 74LS138 Decoder (Reprinted by permission of Texas Instruments, Copyright Texas Instruments, 1988)
Full Decoding
Partial Decoding
8031/51 INTERFACING WITH EXTERNAL ROM When the amount of onboard ROM is insufficient the use of external ROM is required This requires more support circuitry Also requires the use of some of the functional pins that limit the use of external ports on the 8031 Connecting the chip s External Access ( ) to ground allows access to external ROM EA
Figure 14 8 74LS373 D Latch (Reprinted by permission of Texas Instruments, Copyright Texas Instruments, 1988)
Figure 14 9 Address/Data Multiplexing
Figure 14 10 Data, Address, and Control Buses for the 8031 (For reset and crystal connection, see Chapter 4.)
Figure 14 11 8031 Connection to External Program ROM
On-chip & Off-chip code ROM There are times when you want to boot the system with on-chip code and then run the main program from off-chip ROM or have a large look-up table in an external ROM chip
Figure 14 12 On-chip and Off-chip Program Code Access
8051 DATA MEMORY SPACE The 8051 has 128kB of address space 64kB of program code Accessed by means of the PC 64kB of data space Accessed my means of the DPTR MOVX
Figure 14 13 8051 Connection to External Data ROM
External Data RAM To access external RAM we must use both and RD WR
Figure 14 15 8051 Connection to External Data RAM
MOVX Used to access external memory space RAMDATA EQU 5000H COUNT EQU 200 MOV DPTR, #RAMDATA MOV R3, #COUNT AGAIN: MOV A, P1 MOVX @DPTR, A ACALLDELAY INC DPTR DJNZ R3, AGAIN HERE: SJMP HERE
Figure 14 17 8031 Connection to External Program ROM, Data RAM, and Data ROM
MOTOR CONTROL: RELAY, PWM, DC, AND STEPPER MOTORS CHAPTER 17
RELAYS & OPTOISOLATORS Relays and Optoisolators are used to control a large amount of power with a small amount of power
Figure 17 1 Relay Diagrams
Driving a Relay Digital systems don t generally provide enough current to drive a relay, a stepper motor, or any device requiring more than 2ma of current. To drive a higher current use a ULN2803 or a power transistor The ULN2803 is a Darlington transistor high power driver
Figure 17 2 DS89C4x0 Connection to Relay ORG 0H MAIN:SETB P1.0 MOV R5, #55 ACALLDELAY CLR P1.0 MOV R5, #55 ACALLDELAY SJMP MAIN DELAY: H1: MOV R4, #100 H2: MOV R3, #253 H3: DJNZ R3, H3 DJNZ R4, H2 DJNZ R5, H1 RET END
Solid State Relay No moving parts Faster switching times No wear and tear Low input currents
Optoisolator
Figure 17 6 Controlling a Lamp via Optoisolator
STEPPER MOTOR INTERFACING Translates electrical pulses into rotational mechanical movement Permanent magnet rotor Stator 2-phase, 4-step Stepper motor operation (refer to table 17-3 page 499)
Step angle Depends upon internal gearing Minimum degree of rotation associated with a single step Steps per Revolution is the total number of steps to complete 360 of rotation
Make the Stepper Motor Turn MOV A, #66 BACK: MOV P1, A RR ACALL DELAY SJMP BACK A DELAY MOV R2, #100 H1: MOV R3, #255 H2: DJNZ R3, H2 DJNZ R2, H1 RET
Bidirectional Stepper Motor Control Connect a switch to P2.7 If SW = 0 turn motor clockwise If SW = 1 turn motor counterclockwise ORG 0H MAIN: SETB P2.7 MOV A, #66 MOV P1, A TURN: JNB P2.7, CW RR A ACALL DELAY MOV P1, A SJMP TURN CW: RL A ACALL DELAY MOV P1, A SJMP TURN
DC MOTOR INTERFACING AND PWM PWM = Pulse Width Modulation The greater the duty cycle the faster the DC motor rotates Speed is also inversely proportional to the load applied
Figure 17 13 DC Motor Rotation (Permanent Magnet Field)
Figure 17 15 H-Bridge Motor Clockwise Configuration
Figure 17 16 H-Bridge Motor Counterclockwise Configuration