ET2640 Microprocessors
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1 ET2640 Microprocessors Unit -2 Processor Programming Concepts Basic Control Instructor : Stan Kong skong@itt-tech.edu
2 Figure 2 4 Bits of the PSW Register
3 8051 REGISTER BANKS AND STACK 80 BYTES 16 BYTES 32 BYTES 24 Bytes of Stack space (max) 128 BYTE S OF RAM
4 Figure Register Banks and their RAM Addresses
5 THE STACK The stack pointer (SP) is an 8-bit register that points to the last used location in the stack On power-up the SP contains the value 07so the first usable location is 08 and last usable location is 1F PUSH and POP instructions populate and depopulate the stack Ex: Stack.asm
6 THE STACK AND SUBROUTINES When the CPU calls a subroutine it stores the return address in the stack automatically
7 STACK CONFLICT When data is PUSHed into the stack the stack pointer is automatically incremented When data is POPd from the stack it is decremented. We can change the location of the stack by MOVing a new value into the stack pointer
8 8051 REGISTER BANKS AND STACK 80 BYTES 16 BYTES 32 BYTES 24 Bytes of Stack space (max) 128 BYTE S OF RAM
9 LOOP AND JUMP INSTRUCTIONS Program clears ACC then adds 3 to ACC ten times: MOV A,#0 MOV R2,#10 AGAIN: ADD A, #03 DJNZ R2, AGAIN MOV R5,A
10 NESTED LOOPS MOV A, #55H MOV R3, #10 NEXT: MOV R2, #70 AGAIN: CPL A DJNZ R2, AGAIN DJNZ R3, NEXT WHAT DOES THIS PROGRAM DO??
11 JUMP INSTRUCTIONS
12 CONDITIONAL JUMP EXAMPLES MOV A,#0 MOV R5,A ADD A, #79H JNC N1 INC R5 N1: ADD A, #0F5H JNC N2 INC R5 N2; ADD A, #0E2H JNC OVER INC R5 OVER: MOV R0,A
13 All Conditional Jumps are Short Jumps -128 to +127 Unconditional Jumps may be Long (LJMP) or Short (SJMP) Long Jumps are 3-byte instructions 1-byte opcode, 2-byte address (0000-FFFF) Short Jumps are 2-byte instructions 1-byte opcode, 1-byte address Address is relative
14 Jumping Forward Add the contents of Program Counter to the Relative Address to get the target address To calculate the Relative Address when the Target Address and Originating Address are known subtract the Originating Address from the Destination Address
15 CHECK YOURSELF At Hex address 32 there is an instruction to SJMP to Hex address 73. What is the contents of Hex address F
16 Branch Backwards Add the contents of Program Counter to the Relative Address to get the target address (lose the carry) To calculate the Relative Address when the Target Address and Originating Address are known subtract Destination Address the from the Originating Address and calculate the two s complement of the difference
17 Check Yourself At Hex address B7 there is an instruction to SJMP to Hex address 73. What is the contents of Hex address B B S COMPLEMENT BA
18 CALL INSTRUCTIONS Used to call a Subroutine Two types of CALL instructions LCALL 3-Byte 1-byte opcode 2-byte address (0-64K) ACALL (absolute call) 2-byte 5-bit opcode 11-bit address (0-2K)
19 CALL & JMP EXAMPLE
20 TIME DELAYS The number of clock cycles it takes to execute an instruction is called a machine cycle This, in turn, is determined by the frequency of the crystal driving the machine. The crystal on our trainer runs at MHz which means it takes 90.42n sec per clock cycle
21 TIME DELAYS Our trainer uses a DS89C450 as its microcontroller so.
22 How long does a machine cycle last? ns
23 Calculating Time delay You will need: Calculator Appendix A1 DELAY: MOV R2, #200 AGAIN: MOV R3, #250 HERE:NOP HERE NOP DJNZ R3, DJNZ R2, AGAIN RET
24 Table Conditional Jump Instructions
25 Table 3 2 Clocks per Machine Cycle (MC) for Various 8051 Versions
26 Table 3 3 Comparison of 8051 and DS89C4x0 Machine Cycles
27 Figure Assembly Main Program That Calls Subroutines
28 Figure Pin Diagram
29 Figure 4 2 Port 0 with Pull-Up Resistors
30 Table 4 1 Port 3 Alternate Functions
31 Table 4 2 Reset Value of Some 8051 Ports
32 Table 4 3 Single-Bit Addressability of Ports
33 Table 4 4 Single-Bit Instructions
34 Table 4 5 Instructions For Reading an Input Port
35 Table 4 6 Instructions Reading a Latch (Read-Modify-Write)
36 Figure Pin Diagram
37 Figure 8 2a XTAL Connection to 8051
38 Figure 8 2b XTAL Connection to an External Clock Source
39 Figure 8 3a Power-On RESET Circuit
40 Figure 8 3b Power-On RESET with Momentary Switch
41 Figure 8 4 Port 0 with Pull-Up Resistors
42 Figure 8 5 Minimum Connection for 89C51/52-Based Systems
43 Figure 8 6 DS89C4x0 Trainer (for MAX232 connection, see Section 10.2)
44 Figure 8 7 Screen Capture from HyperTerminal for DS89C4x0 Trainer
45 Figure 8 8 List File For Test Program (Assembly)
46 Figure 8 9 Intel Hex File Test Program as Provided by the Assembler
47 Table 8 1 Port 3 Alternate Functions
48 Table 8 2 RESET Value of Some 8051 Registers
49 Table 8 3 Clocks per Machine Cycle (MC) for Various 8051 Versions
50 Table 8 4 On-Chip Flash ROM Size for the DS89C4x0 Family from Maxim-Dallas Semiconductor. See
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