CSc 256 Midterm (green) Fall 2018

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CSc 256 Midterm (green) Fall 2018 NAME: Problem 1 (5 points): Suppose we are tracing a C/C++ program using a debugger such as gdb. The code showing all function calls looks like this: main() { bat(5); ghost(1); bat(13); bat(int arg) { ghost(arg-2); ghost(arg/2); ghost(int arg) { skeleton(arg*2); int x=4; // set breakpoint here // some code not shown skeleton(int arg) { // some code not shown Suppose we set a breakpoint at the line int x=4 (in ghost(), bold). We run the program, stop at the breakpoint for the first time, and check the stack frames on the stack using a command similar to gdb s backtrace. What are the stack frames that you see at this time? For each stack frame that you see, indicate clear what function it belongs to, the arguments for that function call, and the order (which one is at the bottom, which is above it, etc). Ghost(3) Bat(5) Main() A 1

Problem 2: Translate the C++ function upt() into MIPS assembly language. (You don't have to write a main program, or the dst() function.) Your solution must compile and run correctly in spim, and follow all MIPS register use conventions. You may use $s? or $t? as temporaries, but follow the specifications below. For mover: void mover(int *arg0, int arg1) arg0 a0 arg1 a1 For gnew: int gnew(int arg0, int *arg1) arg0 a0 arg1 a1 result returned in $v0 Make sure your loops are efficient (i.e., they should not have unnecessary branches). Points will be deducted for obvious inefficiencies. (40 points) A 2

void mover(int *arg0, int arg1) { int *ptr, sum=0; ptr = arg0; for (int i=2; i<arg1; i+=3) { sum = sum + gnew(arg0[i], ptr); if (arg1 < *ptr) { ptr++; *ptr = *ptr + sum; A 3

ANS: # arg0 $s0, arg1 $s1, ptr $s2, sum $s3, i $s4 mover: sw $31, -4($sp) sw $s0, -8($sp) sw $s1, -12($sp) sw $s2, -16($sp) sw $s3, -20($sp) sw $s4, -24($sp) addi $sp, $sp, -24 move $s0, $a0 move $s1, $a1 li $s3, 0 # int *ptr, sum=0; move $s2, $a0 # ptr = arg0; li $s4, 2 # for (int i=2; i<arg1; bge $s4, $s1, exit # i+=3) { for: sll $t0, $s4, 2 add $t0, $t0, $s0 lw $a0, ($t0) # sum = sum + move $a1, $s2 # gnew(arg0[i], ptr); jal gnew add $s3, $s3, $v0 lw $t0, ($s2) # if (arg1 < *ptr) { bge $s1, 4t0, skip addi $s2, $s2, 4 # ptr++; # skip: lw $t0, ($s2) # *ptr = *ptr + sum; add $t0, $t0, $s3 sw $t0, ($s2) addi $s4, $s4, 3 # blt $s4, $s1, for exit: addi $sp, $sp, -24 lw $31, -4($sp) lw $s0, -8($sp) lw $s1, -12($sp) lw $s2, -16($sp) lw $s3, -20($sp) lw $s4, -24($sp) jr $31 A 4

Problem 3: Show what is printed on the screen after this C++ program is executed. Show work for partial credit. (15 points) ANSWER: bai499host #include <iostream> using std::cout; int main() { char str[] = "bat49ghost"; char *ptr0, *ptr1; ptr0 = &str[2]; ptr1 = ptr0 + 4; *ptr0 = (*ptr1) + 1; ptr0 = ptr0 + 2; ptr1--; *ptr1 = *ptr0; cout << str; // print str Work: ptr0 = &str[2]; ptr1 = ptr0 + 4; // ptr1 = &str[6] *ptr0 = (*ptr1) + 1; // str[2] = str[6] + 1 = i ptr0 = ptr0 + 2; // ptr0 = &str[4] ptr1--; // ptr1 = &str[5] *ptr1 = *ptr0; // str[5] = str[4] output: bai499host A 5

Problem 4: The following MIPS program is executed. Show the contents of registers $t0, $t1 and $t2, when the label "end" is reached. Assume the initial contents of registers as shown. All integers are in hex. Show each step clearly for partial credit. (20 points) Initially: $t0 0x1001000c $t1 0x10010004 $t2 0xffffff4d label address contents here: 0x10010008 0x90a0b0c0 there: 0x1001000c 0x79787776.text main: srl $t2,$t2,2 sb $t2,-1($t0) or $t0, $t2, 0x00000066 lw $t1,here end: li $v0,10 syscall ANS: CONTENTS of $t0 (in hex): 0x3ffffff7 CONTENTS of $t1 (in hex): 0x90a0b0d3 CONTENTS of $t2 (in hex): 0x3fffffd3 $t2 = 0xffffff4d = 1111 1111 0100 1101 srl $t2,$t2,2 $t2 = 0011 1111 1101 0011 = 0x3fffffd3 sb $t2,-1($t0) ADDR = -1 + 0x1001000c = 0x1001000b Byte at 0x1001000b = 0xd3 (replaces 0xc0) or $t0, $t2, 0x00000066 $t2 = 0011 1111 1101 0011 0000 0000 0110 0110 $t0 = 0011 1111 1111 0111 = 0x3ffffff7 A 6

lw $t1,here $t1 = 0x90a0b0d3 A 7

Problem 5: 5a) You are given this MIPS assembly language instruction (i.e., pseudo-instruction): lb $4, 0x1001001c($18) Translate this MIPS instruction to an efficient sequence of machine language instructions. You only have to show the text form of the machine language instructions; don't translate into binary. (6 points) ANS: lui $1, 0x1001 add $1, $1, $18 lb $4, 0x1c($1) 5b) This is a memory location that contains a MIPS instruction: address [0x00400024] contents 0xae0d000c Translate it into the MIPS assembly language instruction (show the operation, operands, etc): (7 points) ANS: sw $13, 12($16) A 8

5c) You are given a MIPS branch instruction: x: beq $12, $0, y The address of the label "y" is 0x400524. The memory location at "x" contains: address contents 0x4005a0 000100 01100 00000????????????????... which represents the beq instruction. Find the 16-bit constant indicated by the????. Hint: Branch target address = address of branch + 4 + (16-bit constant signextended, shift left 2) (7 points) 0x400524 = 0x4005a0 + 4 + offset offset = 0x400524 0x4005a4 = 0xffff ff80 = 1111 1111 1000 0000 16-bit I = 1111 1111 1110 0000 A 9

MIPS instructions op1, op2 are registers, op3 is register or constant cont[op1] means contents of op1 move op1, op2 cont[op1] = cont[op2] add op1, op2, op3 cont[op1] = cont[op2] + cont[op3] sub op1, op2, op3 cont[op1] = cont[op2] - cont[op3] mul op1, op2, op3 cont[op1] = cont[op2] * cont[op3] div op1, op2, op3 cont[op1] = cont[op2] / cont[op3] rem op1, op2, op3 cont[op1] = cont[op2] % cont[op3] not op1, op2 cont[op1] = not cont[op2] (bitwise) and op1, op2, op3 cont[op1] = cont[op2] and cont[op3] (bitwise) or op1, op2, op3 cont[op1] = cont[op2] or cont[op3] (bitwise) nand op1, op2, op3 cont[op1] = cont[op2] nand cont[op3] (bitwise) nor op1, op2, op3 cont[op1] = cont[op2] nor cont[op3] (bitwise) xor op1, op2, op3 cont[op1] = cont[op2] xor cont[op3] (bitwise) sll op1, op2, AMT cont[op1] = cont[op2] shift left logical by AMT bits srl op1, op2, AMT cont[op1] = cont[op2] shift right logical by AMT bits sra op1, op2, AMT cont[op1] = cont[op2] shift right arithmetic by AMT bits rol op1, op2, AMT cont[op1] = cont[op2] rotate left by AMT bits ror op1, op2, AMT cont[op1] = cont[op2] rotate right by AMT bits b label j label beq op1, op2, label bne op1, op2, label bgt op1, op2, label bge op1, op2, label blt op1, op2, label ble op1, op2, label beqz op1, label bnez op1, label bgtz op1, label bgez op1, label bltz op1, label blez op1, label la R, label li R, constant lw R,?? goto label goto label if (cont[op1]==cont[op2]) goto label if (cont[op1]!=cont[op2]) goto label if (cont[op1]>cont[op2]) goto label if (cont[op1]>=cont[op2]) goto label if (cont[op1]<cont[op2]) goto label if (cont[op1]<=cont[op2]) goto label if (cont[op1]==0) goto label if (cont[op1]!=0) goto label if (cont[op1]>0) goto label if (cont[op1]>=0) goto label if (cont[op1]<0) goto label if (cont[op1]<=0) goto label cont[r] = address of label cont[r] = constant cont[r] = M[ADDR] A 10

lb R,?? lbu R,?? sw R,?? sb R,?? cont[r] = m[addr], sign-extended cont[r] = m[addr], zero-extended M[ADDR] = cont[r] m[addr] = low 8-bits of cont[r] if?? is a label, ADDR = address of label if?? is (R), ADDR = cont[r] if?? is constant(r), ADDR = cont[r] + constant if?? is label(r), ADDR = cont[r] + address of label mtc0 op1, op2 contents of coprocessor 0 register op1 = contents of MIPS register op2 mfc0 op1, op2 contents of MIPS register op1 = contents of coprocessor 0 register op2 Syscall usage: print an int $v0=1, $a0=int to be printed print a string $v0=4, $a0=address of string to be printed read an int $v0=5, input int appears in $v0 exit $v0=10 MIPS register names: $0 $1 $2,$3 $v0,$v1 $4 - $7 $a0 - $a3 $8 - $15 $t0 - $t7 $16 - $23 $s0 - $s7 $24 - $25 $t8 - $t9 $26 - $27 $k0 - $k1 $28 $gp $29 $sp $30 $s8 $31 $ra A 11

0000 00ss ssst tttt dddd d000 0010 0000 add rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0010 sub rd,rs,rt 0000 00ss ssst tttt 0000 0000 0001 1000 mult rs,rt 0000 00ss ssst tttt 0000 0000 0001 1010 div rs,rt 0000 00ss ssst tttt dddd d000 0010 0001 addu rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0011 subu rd,rs,rt 0000 00ss ssst tttt 0000 0000 0001 1001 multu rs,rt 0000 00ss ssst tttt 0000 0000 0001 1011 divu rs,rt 0000 0000 0000 0000 dddd d000 0001 0000 mfhi rd 0000 00ss sss0 0000 0000 0000 0001 0001 mthi rs 0000 0000 0000 0000 dddd d000 0001 0010 mflo rd 0000 00ss sss0 0000 0000 0000 0001 0011 mtlo rs 0000 00ss ssst tttt dddd d000 0010 0100 and rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0111 nor rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0101 or rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0110 xor rd,rs,rt 0000 00ss ssst tttt dddd d000 0000 0100 sllv rd,rt,rs 0000 00ss ssst tttt dddd d000 0000 0110 srlv rd,rt,rs 0000 00ss ssst tttt dddd d000 0000 0111 srav rd,rt,rs 0010 00ss ssst tttt iiii iiii iiii iiii addi rt,rs,i 0010 01ss ssst tttt iiii iiii iiii iiii addiu rt,rs,i 0011 00ss ssst tttt iiii iiii iiii iiii andi rt,rs,i 0011 1100 000t tttt iiii iiii iiii iiii lui rt,i 0011 01ss ssst tttt iiii iiii iiii iii ori rt,rs,i 0011 10ss ssst tttt iiii iiii iiii iiii xori rt,rs,i 0000 0000 000t tttt dddd diii ii00 0000 sll rd,rt,i 0000 0000 000t tttt dddd diii ii00 0010 srl rd,rt,i 0000 0000 000t tttt dddd diii ii00 0011 sra rd,rt,i 1000 11bb bbbt tttt iiii iiii iiii iiii lw rt,i(rb) 1000 00bb bbbt tttt iiii iiii iiii iiii lb rt,i(rb) 1001 00bb bbbt tttt iiii iiii iiii iiii lbu rt,i(rb) 1010 11bb bbbt tttt iiii iiii iiii iiii sw rt,i(rb) 1010 00bb bbbt tttt iiii iiii iiii iiii sb rt,i(rb) 0000 01ss sss0 0000 iiii iiii iiii iiii bltz rs,i 0000 01ss sss0 0001 iiii iiii iiii iiii bgez rs,i 0001 10ss sss0 0000 iiii iiii iiii iiii blez rs,i 0001 11ss sss0 0000 iiii iiii iiii iiii bgtz rs,i 0001 00ss ssst tttt iiii iiii iiii iiii beq rs,rt,i A 12

0001 01ss ssst tttt iiii iiii iiii iiii bne rs,rt,i 0000 00ss ssst tttt dddd d000 0010 1010 slt rd,rs,rt 0010 10ss ssst tttt iiii iiii iiii iiii slti rt,rs,i 0000 10ii iiii iiii iiii iiii iiii iiii j I 0000 00ss sss0 0000 0000 0000 0000 1000 jr rs 0000 11ii iiii iiii iiii iiii iiii iiii jal I 0000 00ss sss0 0000 dddd d000 0000 1001 jalr rd,rs 0000 0000 0000 0000 0000 0000 0000 1100 syscall A 13