EMIF01-SMIC01F2 IPAD. Single line EMI filter including ESD protection. Main application. Description. Benefits. Pin configuration (Bump side view)

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Transcription:

IPAD Single line EMI filter including ESD protection Main application Single ended microphone in mobile phones and portable devices Description The is a highly integrated device designed to suppress EMI/RFI noise for microphone line filtering. The Flip-Chip packaging means the package size is equal to the die size. That is why is a very small device. Additionally, this filter includes ESD protection circuitry which prevents damage to the appication when subjected to ESD surges up to 15 kv. Benefits High density capacitor 1 line low-pass-filter Lead free package High efficiency in EMI filtering Very low PCB space consumtion Very thin package: 0.65 mm High efficiency in ESD suppression (IEC 61000-4-2 level 4) High reliability offered by monolithic integration High density capacitor technology Complies with the following standards: IEC 61000-4-2 Level 4 15 kv (air discharge) 8 kv (contact discharge on output pins Level 1 2 kv (air and contact discharge) on input pins Pin configuration (Bump side view) 3 2 1 Schematic C3 B3 Order code C1 R1 B2 B2, B3, C2 are GND bumps Part number Flip-Chip (8 Bumps) C2 C5 A3 A2 R3 R5 R2 C3 C4 R4 A B C Marking GA B1 C2 C1 October 2006 Rev 1 1/7 www.st.com 7

Characteristics 1 Characteristics Table 1. Absolute Maximum Ratings (T amb = 25 C) Symbol Parameter and test conditions Value Unit V PP Output lines (C3) ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Input lines (A3, A2, B1, C1) ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharg T j Maximum junction temperature 125 C T op Operating temperature range - 40 to + 85 C T stg Storage temperature range - 55 to + 150 C Table 2. Electrical Characteristics (T amb = 25 C) 15 8 2 2 kv Symbol V BR I RM V RM V CL R d I PP Parameter Breakdown voltage Leakage current @ V RM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Symbol Test conditions Min. Typ. Max. Unit V BR I R = 1 ma 14 V I RM V RM = 3 V per line 0.5 µa C 1, C 2, C 3, C 4, V LINE = 0 V, V OSC = 30 mv, F = 1 MHz, Tolerance ± 20% 0.85 nf V C LINE = 0 V, V OSC = 30 mv, F = 1 MHz, 5 140 pf Tolerance ± 20% R 1, R 5 Tolerance ± 5% 50 Ω R 2, R 3, R 4 Tolerance ± 5% 2.2 kω 2/7

Ordering information scheme Figure 1. Filtering measurements 0.00 db -10.00-20.00-30.00-40.00-50.00-60.00-70.00-80.00 F (Hz) -90.00 100.0k 1.0M 10.0M 100.0M 1.0G C3-B1 line Figure 2. ESD response to IEC 61000-4-2 (+15 kv air discharge) on one output line Figure 3. ESD response to IEC 61000-4-2 (-15 kv air discharge) on one output line Vin=5V/d Vin=5V/d Vout=5V/d 1µs/d Vout=5V/d 1µs/d 2 Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip x = 1: 500µm, Bump = 310µm = 2: Leadfree Pitch = 500µm, Bump = 310µm 3/7

Package information 3 Package information Figure 4. Flip-Chip dimensions 500 µm ± 50 310 µm ± 50 650 µm ± 65 500 µm ± 50 1.42 mm ± 50 µm 1.42 mm ± 50 µm Figure 5. Flip-Chip footprint Figure 6. Marking Copper pad Diameter: 250 µm recommended, 300 µm max. Solder stencil opening: 330 µm recommended Solder mask opening recommendation: 340 µm min. for 300 µm copper pad diameter Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) x y x w E z w 4/7

1.75 +/- 0.1 3.5 +/- 0.1 xxx yww 8 +/- 0.3 1.52 xxx yww xxx yww Package information Figure 7. Tape and reel specification Dot identifying Pin A1 location 4 +/- 0.1 Ø 1.5 +/- 0.1 1.52 ST E ST E ST E 0.73 +/- 0.05 4 +/- 0.1 All dimensions in mm User direction of unreeling Note: In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. More packing informations are available in the application note AN1235: Flip-Chip: Package description and recommendations for use AN1751: "EMI Filters: Recommendations and measurements" 5/7

Ordering information 4 Ordering information Ordering code Marking Package Weight Base qty Delivery mode GA Flip-Chip 2.8 mg 5000 Tape and reel 7 5 Revision history Date Revision Changes 03-Oct-2006 1 Initial release 6/7

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