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Description The Parallel ATA Solid State Disk is small in size, has a huge capacity and low power consumption making it perfect for use as a mobile storage solution in devices such as, PDA, Notebook, and MIDs(Mobile Internet Devices). This guide is written to provide general installation and handling information, please use it in conjunction with the Owner s Manual for your device or system. Placement Features RoHS compliant Fully compatible with Parallel-ATA interface (40-Pin FPC ZIF connector, 0.5mm pitch) Non-volatile Flash Memory for outstanding data retention The on-chip hardware 13/24 bit BCH-ECC engines can correct up to 24 bit errors per 1,024 byte data. Support global wear-leveling algorithm which ensures maximum lifespan. Supports Ultra DMA Mode 0 to 5 Multiword DMA mode 0 to 2 PIO Mode 0 to 4 Supports ATA Security Commands Support S.M.A.R.T function (self-definition) Lower Power Consumption Shock resistance Power Supply: 3.3V ± 5%(UDMA mode 5) / 5.0V ± 10%(UDMA mode 4 or lower) Dimensions Side Millimeters Inches A 54.00 ± 0.15 2.126 ± 0.006 B 32.00 ± 0.15 1.260 ± 0.006 C* 2.20 ± 0.15 0.087 ± 0.006 * Please refer detail to Specification in next page. 1

Specifications Physical Specification Form Factor Storage Capacities Dimensions (mm) Weight Connector ZIF Up to 32GB Length 54.00 Width 32.00 Height 2.20 (single side) / 3.40 (double side)) T.B.D. (g) 0.5 mm pitch 40-Pin Zero Insertion Force (ZIF) connector (P-ATA) Environmental Specifications Operating Temperature 0 to 70 Storage Temperature - 40 to 85 Humidity Operating Humidity (Non condensation) 0% to 95% Storage Humidity (Non condensation) 0% to 95% * Note: Reference to the IEC 60068-2-1 and IEC 60068-2-56 Testing procedures; 48-hours chamber test on ASUS M2N-MX, 1GB RAM, Windows XP Version 2002 SP2. Power Consumption Product Power Consumption (DC 5V @25 ) TS8GPSSD10-M Mode Maximum (ma) Standby 1.6 Read 133.9 Write 96.1 2

Reliability Data Reliability Data Retention Connector Durability MTBF 13bit/1K Byte BCH ECC(2k+64 / 4k+128 byte per page flash) 24bit/1K Byte BCH ECC(4k+208 byte per page flash) 10 years 30 times 4,400,000 hours Interface Specification Drivers No Device Driver Required ATA/ATAPI 7 ATA Compatibility PIO Mode 0-4 Multiword mode 0-2 UDMA Mode 0-5 Performance (MB/s) * Note : 25, test on MSI 865G, 512MB RAM, IDE interface support UDMA5, Windows XP Version 2002 SP2, benchmark utility FDBENCH (version 1.01), copied file 100MB Actual Capacity Model P/N Cylinder Head Sector Total Sectors TS8GPSSD-M 15,538 16 63 15,662,304 TS16GPSSD-M 16,383 15 63 31,293,440 TS32GPSSD-M 16,383 15 63 62,537,728 Note: FAT32 format Model P/N Capacity Read Write Random Read Random Write TS8GPSSD-M 8GB 49,254 23,654 43,667 8,140 TS16GPSSD-M 16GB 55,501 23,914 33,257 10,175 TS32GPSSD-M 32GB 56,480 23,315 50,768 10,568 Regulations Compliance CE, FCC and BSMI (T.B.D.) 3

Mechanical Dimensions Below figure illustrates the Transcend PATA Solid State Disk. All dimensions are in mm. Top View Bottom View 4

Lateral View(8GB~32GB) 5

Pin Assignments Pin No. Pin Name Pin No. Pin Name 01 Reserved 21 GND 02 Reserved 22 DMARQ 03 -RESET 23 GND 04 GND 24 -DIOW 05 DD7 25 -DIOR 06 DD8 26 GND 07 DD6 27 IORDY 08 DD9 28 GND 09 DD5 29 -DMACK 10 DD10 30 INTRQ 11 DD4 31 DA1 12 DD11 32 -PDIAG 13 DD3 33 DA0 14 DD12 34 DA2 15 DD2 35 -CS0 16 DD13 36 -CS1 17 DD1 37 -DASP 18 DD14 38 Vin 19 DD0 39 Vin 20 DD15 40 Reserved 6

Block Diagram Data bus D00 ~ D07 Flash Memory 40 PIN FPC Connector Control Signal Power Solid State Disk Controller 5V/3.3V REG -CE0, -CE1 Others D8 ~ D15 -CE0, -CE1 D0 D7 -CE0 -CE1 -WE -RE Flash Memory D0 D7 -CE0 -CE1 -WE -RE DC Characteristics PATA interface I/O at 3.3V Parameter Symbol Min. Max. Unit Remark Supply Voltage V CC 2.97 3.63 V High level output voltage V OH V CC 0.8 V Low level output voltage V OL 0.8 V High level input voltage Low level input voltage V IH V IL 2.4 V Non-schmitt trigger 2.05 V Schmitt trigger 1 0.6 V Non-schmitt trigger 1.25 V Schmitt trigger 1 Pull up resistance 2 R PU 52.7 141 kohm Pull down resistance R PD 47.5 172 kohm 1. Include CS0#, CS1#, DMACK#, HIOR#, HIOW# pins. 2. Include CS0#, CS1#, DMACK#, HIOR#, HIOW#, CSEL#, PDIAG#, DASP# pins. 7

Command Set Command Code FR SC SN CY DH LBA Status Note 1 Check Power Mode E5 or 98h Y Support 2 Execute Drive Diagnostic 90h Y Support 3 Erase Sector C0h Y Y Y Y Y Support 4 Flush Cache E7h Y Support 5 Format Track 50h Y Y Y Y Support 6 Identify Device ECh Y Support 7 Idle E3h or 97h Y Y Support 8 Idle Immediate E1h or 95h Y Support 9 Initialize Drive Parameters 91h Y Y Support 10 Key Management Structure Read B9 (Feature 0-127) Y Y Y Y Y NOT Support #1 11 Key Management Read Keying Material B9 (Feature 80) Y Y Y Y Y NOT Support #1 12 Key Management Change Key Management Value B9 (Feature 81) Y Y Y Y Y NOT Support #1 13 NOP 00h Y Support 14 Read Buffer E4h Y Support 15 Read DMA C8h Y Y Y Y Y Support 16 Read Long Sector 22h or 23h Y Y Y Y NOT Support #2 17 Read Multiple C4h Y Y Y Y Y Support 18 Read Sector(s) 20h or 21h Y Y Y Y Y Support 19 Read Verify Sector(s) 40h or 41h Y Y Y Y Y Support 20 Recalibrate 1Xh Y Support 21 Request Sense 03h Y Support 22 Security Disable Password F6h Y Support 23 Security Erase Prepare F3h Y Support 24 Security Erase Unit F4h Y Support 25 Security Freeze Lock F5h Y Support 26 Security Set Password F1h Y Support 27 Security Unlock F2h Y Support 8

28 Seek 7Xh Y Y Y Y Support 29 Set Feature EFh Y Y Support 30 Set Multiple Mode C6h Y Y Support 31 Set Sleep Mode E6h or 99h Y Support 32 Standby E2 or 96h Y Support 33 Standby Immediate E0 or 94h Y Support 34 Translate Sector 87h Y Y Y Y Y Support 35 Wear Level F5h Y Support #3 36 Write Buffer E8h Y Support 37 Write DMA CAh Y Y Y Y Y Support 38 Write Long Sector 32h or 33h Y Y Y Y Not Support #2 39 Write Multiple C5h Y Y Y Y Y Support 40 Write Multiple w/o Erase CDh Y Y Y Y Y Support 41 Write Sector(s) 30h or 31h Y Y Y Y Y Support 42 Write Sector(s) w/o Erase 38h Y Y Y Y Y Support 43 Write Verify 3Ch Y Y Y Y Y Support #1: This command is optional, depending on the key Management scheme in use. #2: Use of this command is not recommended. #3: If Security command 22~27 are supported, this command is not supported. Definitions FR = Features Register SC =Sector Count register (00H to FFH, 00H means 256 sectors) SN = Sector Number register CY = Cylinder Low/High register DH = Head No. (0 to 15) of Drive/Head register LBA = Logic Block Address Mode Support = Not used for the command Y = Used for the command 9

SMART Command Set SMART Command Set SMART Feature Register Values D0h Read Data D5h Read Log D1h Read Attribute Threshold D6h Write Log D2h Enable/Disable Autosave D8h Enable SMART Operations D3h Save Attribute Values D9h Disable SMART Operations D4h Execute OFF-LINE Immediate DAh Return Status 1. If reserved size is below the Threshold, the status can be read from Cylinder register by Return Status command (DAh). SMART Data Structure BYTE F / V Decription 0-1 X Revision code 2-361 X Vendor specific 362 V Off line data collection status 363 X Self-test execution status byte 364-365 V Total time in seconds to complete off-line data collection activity 366 X Vendor specific 367 F Off-line data collection capability 368-369 F SMART capability 370 F Error logging capability 7-1 Reserved 0 1=Device error logging supported 371 X Vendor specific 372 F Short self-test routine recommended polling time (in minutes) 373 F Extended self-test routine recommended polling time (in minutes) 374 F Conveyance self-test routine recommended polling time (in minutes) 375-385 R Reserved 386-395 F Date Code 396-397 F Number of initial invalid block (396 = MSB, 397 = LSB) 398-399 V Number of run time bad block (398 = MSB, 399 = LSB) 400 V Number of spare block 10

511 V Data structure checksum F=the content of the byte is fixed and does not change. V=the content of the byte is variable and may change depending on the state of the device or the commands executed by the device. X=the content of the byte is vendor specific and may be fixed or variable. R=the content of the byte is reserved and shall be zero. * 4 Byte value : [MSB] [2] [1] [LSB] 11

ID Table Information Word Address Default Value Total Bytes Data Field Type Information 044Ah 2 General configuration Bit Significant with ATA-7 definitions. 1 XXXXh 2 Default number of cylinders 2 0000h 2 Reserved 3 00XXh 2 Default number of heads 4 0000h 2 Obsolete 5 0000h 2 Obsolete 6 XXXXh 2 Default number of sectors per track 7-8 XXXXh 4 Number of sectors per card (Word 7 = MSW, Word 8 = LSW) 9 XXXXh 2 Obsolete 10-19 aaaa 20 Serial number in ASCII (Right Justified) 20 0000h 2 Obsolete 21 0000h 2 Obsolete 22 0004h 2 Number of ECC bytes passed on Read/Write Long Commands 23-26 aaaa 8 Firmware revision in ASCII. Big Endian Byte Order in Word 27-46 aaaa 40 Model number in ASCII (Left Justified) Big Endian Byte Order in Word 47 XXXXh 2 Maximum number of sectors on Read/Write Multiple command 48 0000h 2 Reserved 49 0F00h 2 Capabilities ( Default) 50 0000h 2 Reserved 51 0200h 2 PIO data transfer cycle timing mode (PIO mode 2) 52 0000h 2 Obsolete 53 0007h 2 Field Validity 54 XXXXh 2 Current numbers of cylinders 55 XXXXh 2 Current numbers of heads 56 XXXXh 2 Current sectors per track 57-58 XXXXh 4 Current capacity in sectors (LBAs)(Word 57 = LSW, Word 58 = MSW) 59 0101h 2 Multiple sector setting 60-61 XXXXh 4 Total number of sectors addressable in LBA Mode 62 0000h 2 Reserved 63 0007h 2 Multiword DMA transfer. (Support Multiword mode 0-2) 64 0003h 2 Advanced PIO modes supported (Support PIO mode 3 and PIO mode 4) 65 0078h 2 Minimum Multiword DMA transfer cycle time per word. (120ns) 66 0078h 2 Recommended Multiword DMA transfer cycle time. (120ns) 67 0078h 2 Minimum PIO transfer cycle time without flow control (120ns) 12

Word Address Default Value Total Bytes Data Field Type Information 68 0078h 2 Minimum PIO transfer cycle time with IORDY flow control (120ns) 69-79 0000h 22 Reserved 80 0080h 2 Major revision number 81 0000h 2 Mimor revision number 82 702Bh 2 Command sets supported 0 83 5008h 2 Command sets supported 1 84 4003h 2 Command sets supported 2 85 XXXXh 2 Command sets Enable 0 86 XXXXh 2 Command sets Enable 1 87 0003h 2 Command sets Enable 2 88 003Fh 2 Ultra DMA Mode Supported and Selected 89 0001h 2 Time required for Security erase unit completion (2 min) 90 0000h 2 Time required for Enhanced security erase unit completion 91 0000h 2 Current Advanced power management value 92 0000h 2 Reserved 93 XXXXh 2 Hardware configuration test result 94-127 0000h 68 Reserved 128 0001h 2 Security status (Default) 129-159 0000h 62 Vendor unique bytes 160 0000h 2 Power requirement description 161-255 0000h 190 Reserved 13

Ordering Information Capacity: Transcend Product 8G-32G = 8GB up to 32 GB TS XG PSSD XX Form Factor -S = SLC -M = MLC -I = Industrial (SLC) PATA Solid State Disk The above technical information is based on industry standard data and has been tested to be reliable. However, Transcend makes no warranty, either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product. Transcend reserves the right to make changes to the specifications at any time without prior notice. USA Los Angeles: E-mail: sales@transcendusa.com Maryland: E-mail: sales_md@transcendusa.com www.transcendusa.com CHINA E-mail: sales@transcendchina.com TAIWAN No.70, XingZhong Rd., NeiHu Dist., Taipei, Taiwan, R.O.C TEL +886-2-2792-8000 Fax +886-2-2793-2222 E-mail: sales@transcend.com.tw www.transcend.com.tw www.transcendchina.com GERMANY E-mail: vertrieb@transcend.de www.transcend.de HONG KONG E-mail: sales@transcend.com.hk www.transcendchina.com JAPAN E-mail: sales@transcend.co.jp www.transcend.jp THE NETHERLANDS E-mail: sales@transcend.nl www.transcend.nl United Kingdom E-mail: sales@transcend-uk.com www.transcend-uk.com Korea E-mail: sales@transcend.co.kr www.transcend.co.kr 14