Comparison of Nine SDRAM Devices. Focused Technology Review

Comparison of Nine SDRAM Devices 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel: 613.829.0414 www.chipworks.com

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Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Introduction 1.4 Device Process Feature Comparison 1.5 Device Circuit Feature Summary 2 Micron MT41K512M8RH-125 2.1 Introduction 2.2 Device Summary 2.3 Package 2.4 Die 2.5 Process Features 2.6 Circuit Features 3 Micron MT41J128M16HA-15E 3.1 Introduction 3.2 Device Summary 3.3 Package 3.4 Die 3.5 Process Features 3.6 Circuit Features 4 Micron MT47H128M8CF-3 4.1 Introduction 4.2 Device Summary 4.3 Package 4.4 Die 4.5 Process Features 4.6 Circuit Features

5 Hynix H5TQ2G43BFR-H9C 5.1 Introduction 5.2 Device Summary 5.3 Package 5.4 Die 5.5 Process Features 5.6 Circuit Features 6 Hynix H5TC2G83CFR-H9R 6.1 Introduction 6.2 Device Summary 6.3 Package 6.4 Die 6.5 Process Features 6.6 Circuit Features 7 Hynix H9TKNNN8JDAR-HRNGM 7.1 Introduction 7.2 Device Summary 7.3 Package 7.4 Die 7.5 Process Features 7.6 Circuit Features 8 Samsung K4B1G0846F-HCF8 8.1 Introduction 8.2 Device Summary 8.3 Package 8.4 Die 8.5 Process Features 8.6 Circuit Features 9 Samsung K4B4G0846C-BCK0 9.1 Introduction 9.2 Device Summary 9.3 Package 9.4 Die 9.5 Process Features 9.6 Circuit Features

10 Samsung K3PE7E700M 10.1 Introduction 10.2 Device Summary 10.3 Package 10.4 Die 10.5 Process Features 10.6 Circuit Features 11 Statement of Measurement Uncertainty and Scope Variation About Chipworks

1-1 1 Overview 1.1 List of Figures Figure 2.3.2 Micron MT41K512M8RH-125 Bottom Package Photograph Figure 2.3.3 Micron MT41K512M8RH-125 Package X-Ray Plan View Figure 2.3.4 Micron MT41K512M8RH-125 Package X-Ray Side-View Figure 2.4.1 Micron MT41K512M8RH-125 Die Photograph Figure 2.4.2 Micron MT41K512M8RH-125 Die Markings Figure 2.4.3 Micron MT41K512M8RH-125 Die Photograph Delayered to Polysilicon Figure 2.5.1 Micron MT41K512M8RH-125 Memory Array Capacitor Size Figure 2.5.2 Micron MT41K512M8RH-125 Bitline Pitch Figure 2.5.3 Micron MT41K512M8RH-125 Wordline Pitch Figure 2.6.1 Micron MT41K512M8RH-125 Die Photograph Pinout Figure 2.6.2 Micron MT41K512M8RH-125 Die Photograph Functional Blocks Figure 2.6.3 Micron MT41K512M8RH-125 Memory Array Close-Up Figure 2.6.4 Micron MT41K512M8RH-125 Sense Amplifier Close-Up Figure 3.3.1 Micron MT41J128M16HA-15E Top Package Photograph Figure 3.3.2 Micron MT41J128M16HA-15E Bottom Package Photograph Figure 3.3.3 Micron MT41J128M16HA-15E Package X-Ray Plan View Figure 3.3.4 Micron MT41J128M16HA-15E Package X-Ray Side View Figure 3.4.1 Micron MT41J128M16HA-15E Die Photograph Figure 3.4.2 Micron MT41J128M16HA-15E Die Markings Figure 3.4.3 Micron MT41J128M16HA-15E Die Photograph Delayered to Metal 1 Figure 3.5.1 Micron MT41J128M16HA-15E Memory Array Capacitor Size Figure 3.5.2 Micron MT41J128M16HA-15E Bitline Pitch Figure 3.5.3 Micron MT41J128M16HA-15E Wordline Pitch Figure 3.6.1 Micron MT41J128M16HA-15E Die Photograph Pinout Figure 3.6.2 Micron MT41J128M16HA-15E Die Photograph Functional Blocks Figure 3.6.3 Micron MT41J128M16HA-15E Memory Array Close-Up Figure 3.6.4 Micron MT41J128M16HA-15E Sense Amplifier Close-Up Figure 4.3.1 Micron MT47H128M8CF-3 Top Package Photograph Figure 4.3.2 Micron MT47H128M8CF-3 Bottom Package Photograph Figure 4.3.3 Micron MT47H128M8CF-3 Package X-Ray Plan View Figure 4.4.1 Micron MT47H128M8CF-3 Die Photograph Figure 4.4.2 Micron MT47H128M8CF-3 Die Markings Figure 4.4.3 Micron MT47H128M8CF-3 Die Photograph Delayered to Metal 1 Figure 4.5.1 Micron MT47H128M8CF-3 Memory Array Capacitor Size Figure 4.5.2 Micron MT47H128M8CF-3 Bitline Pitch Figure 4.5.3 Micron MT47H128M8CF-3 Wordline Pitch Figure 4.6.1 Micron MT47H128M8CF-3 Die Photograph Pinout Figure 4.6.2 Micron MT47H128M8CF-3 Die Photograph Functional Blocks

1-2 Figure 4.6.3 Micron MT47H128M8CF-3 Memory Array Close-Up Figure 4.6.4 Micron MT47H128M8CF-3 Sense Amplifier Close-Up Figure 5.3.1 Hynix H5TQ2G43BFR-H9C Top Package Photograph Figure 5.3.2 Hynix H5TQ2G43BFR-H9C Bottom Package Photograph Figure 5.3.3 Hynix H5TQ2G43BFR-H9C Package X-Ray Plan View Figure 5.3.4 Hynix H5TQ2G43BFR-H9C Package X-Ray Side View Figure 5.4.1 Hynix H5TQ2G43BFR-H9C Die Photograph Figure 5.4.2 Hynix H5TQ2G43BFR-H9C Die Markings Figure 5.4.3 Hynix H5TQ2G43BFR-H9C Die Photograph Delayered to Metal 1 Figure 5.5.1 Hynix H5TQ2G43BFR-H9C Memory Array Capacitor Size Figure 5.5.2 Hynix H5TQ2G43BFR-H9C Bitline Pitch Figure 5.5.3 Hynix H5TQ2G43BFR-H9C Wordline Pitch Figure 5.6.1 Hynix H5TQ2G43BFR-H9CDie Photograph Pinout Figure 5.6.2 Hynix H5TQ2G43BFR-H9C Die Photograph Functional Blocks Figure 5.6.3 Hynix H5TQ2G43BFR-H9C Memory Array Close-Up Figure 5.6.4 Hynix H5TQ2G43BFR-H9C Sense Amplifier Close-Up Figure 6.3.1 Hynix H5TC2G83CFR-H9R Top Package Photograph Figure 6.3.2 Hynix H5TC2G83CFR-H9R Bottom Package Photograph Figure 6.3.3 Hynix H5TC2G83CFR-H9R Package X-Ray Plan View Figure 6.3.4 Hynix H5TC2G83CFR-H9R Package X-Ray Side View Figure 6.4.1 Hynix H5TC2G83CFR-H9R Die Photograph Figure 6.4.2 Hynix H5TC2G83CFR-H9R Die Markings Figure 6.4.3 Hynix H5TC2G83CFR-H9R Die Photograph Delayered to Metal 1 Figure 6.5.1 Hynix H5TC2G83CFR-H9R Memory Array Capacitor Size Figure 6.5.2 Hynix H5TC2G83CFR-H9R Bitline Pitch Figure 6.5.3 Hynix H5TC2G83CFR-H9R Wordline Pitch Figure 6.6.1 Hynix H5TC2G83CFR-H9R Die Photograph Pinout Figure 6.6.2 Hynix H5TC2G83CFR-H9R Die Photograph Functional Blocks Figure 6.6.3 Hynix H5TC2G83CFR-H9R Memory Array Close-Up Figure 6.6.4 Hynix H5TC2G83CFR-H9R Sense Amplifier Close-Up Figure 7.3.1 Hynix H9TKNNN8JDAR-HRNGM Top Package Photograph Figure 7.3.2 Hynix H9TKNNN8JDAR-HRNGM Bottom Package Photograph Figure 7.3.3 Hynix H9TKNNN8JDAR-HRNGM Package X-Ray Plan View Figure 7.3.4 Hynix H9TKNNN8JDAR-HRNGM Package X-Ray Side View Figure 7.4.1 Hynix H9TKNNN8JDAR-HRNGM Die Photograph Figure 7.4.2 Hynix H9TKNNN8JDAR-HRNGM Die Markings Figure 7.4.3 Hynix H9TKNNN8JDAR-HRNGM Die Photograph Delayered to Metal 1 Figure 7.5.1 Hynix H9TKNNN8JDAR-HRNGM Memory Array Capacitor Size Figure 7.5.2 Hynix H9TKNNN8JDAR-HRNGM Bitline Pitch Figure 7.5.3 Hynix H9TKNNN8JDAR-HRNGM Wordline Pitch Figure 7.6.1 Hynix H9TKNNN8JDAR-HRNGM Die Photograph Functional Blocks Figure 7.6.2 Hynix H9TKNNN8JDAR-HRNGM Memory Array Close-Up

1-3 Figure 7.6.3 Hynix H9TKNNN8JDAR-HRNGM Sense Amplifier Close-Up Figure 8.3.1 Samsung K4B1G0846F-HCF8 Top Package Photograph Figure 8.3.2 Samsung K4B1G0846F-HCF8 Bottom Package Photograph Figure 8.3.3 Samsung K4B1G0846F-HCF8 Package X-Ray Plan View Figure 8.4.1 Samsung K4B1G0846F-HCF8 Die Photograph Figure 8.4.2 Samsung K4B1G0846F-HCF8 Die Markings Figure 8.4.3 Samsung K4B1G0846F-HCF8 Die Photograph Delayered to Polysilicon Figure 8.5.1 Samsung K4B1G0846F-HCF8 Memory Array Capacitor Size Figure 8.5.2 Samsung K4B1G0846F-HCF8 Bitline Pitch Figure 8.5.3 Samsung K4B1G0846F-HCF8 Wordline Pitch Figure 8.6.1 Samsung K4B1G0846F-HCF8 Die Photograph Pinout Figure 8.6.2 Samsung K4B1G0846F-HCF8 Die Photograph Functional Blocks Figure 8.6.3 Samsung K4B1G0846F-HCF8 Memory Array Close-Up Figure 8.6.4 Samsung K4B1G0846F-HCF8 Sense Amplifier Close-Up Figure 9.3.1 Samsung K4B4G0846C-BCK0 Top Package Photograph Figure 9.3.2 Samsung K4B4G0846C-BCK0 Bottom Package Photograph Figure 9.3.3 Samsung K4B4G0846C-BCK0 Package X-Ray Plan View Figure 9.3.4 Samsung K4B4G0846C-BCK0 Package X-Ray Side View Figure 9.4.1 Samsung K4B4G0846C-BCK0 Die Photograph Figure 9.4.2 Samsung K4B4G0846C-BCK0 Die Markings Figure 9.4.3 Samsung K4B4G0846C-BCK0 Die Photograph Delayered to Metal 1 Figure 9.5.1 Samsung K4B4G0846C-BCK0 Memory Array Capacitor Size Figure 9.5.2 Samsung K4B4G0846C-BCK0 Bitline Pitch Figure 9.5.3 Samsung K4B4G0846C-BCK0 Wordline Pitch Figure 9.6.1 Samsung K4B4G0846C-BCK0 Die Photograph Functional Blocks Figure 9.6.2 Samsung K4B4G0846C-BCK0 Memory Array Close-Up Figure 9.6.3 Samsung K4B4G0846C-BCK0 Sense Amplifier Close-Up Figure 10.3.1 Samsung K3PE7E700M Top Package Photograph Figure 10.3.2 Samsung K3PE7E700M Bottom Package Photograph Figure 10.3.3 Samsung K3PE7E700M Package X-Ray Plan View Figure 10.3.4 Samsung K3PE7E700M Package X-Ray Side View Figure 10.4.1 Samsung K3PE7E700M Die Photograph Figure 10.4.2 Samsung K3PE7E700M Die Markings Figure 10.4.3 Samsung K3PE7E700M Die Photograph Delayered to Metal 1 Figure 10.5.1 Samsung K3PE7E700M Memory Array Capacitor Size Figure 10.5.2 Samsung K3PE7E700M Bitline Pitch Figure 10.5.3 Samsung K3PE7E700M Wordline Pitch Figure 10.6.1 Samsung K3PE7E700M Die Photograph Functional Blocks Figure 10.6.2 Samsung K3PE7E700M Memory Array Close-Up Figure 10.6.3 Samsung K3PE7E700M Sense Amplifier Close-Up

1-4 1.2 List of Tables Table 1.4.1 Micron Die Summary Table 1.4.2 Hynix Die Summary Table 1.4.3 Samsung Die Summary Table 1.5.1 Micron Circuit Features Summary Table 1.5.2 Hynix Circuit Features Summary Table 1.5.3 Samsung Circuit Features Summary Table 2.2.1 Micron MT41K512M8RH-125 Summary Table 3.2.1 Micron MT41J128M16HA-15E Summary Table 4.2.1 Micron MT47H128M8CF-3 Summary Table 5.2.1 Hynix H5TQ2G43BFR-H9C Summary Table 6.2.1 Hynix H5TC2G83CFR-H9R Summary Table 7.2.1 Hynix H9TKNNN8JDAR-HRNGM Summary Table 8.2.1 Samsung K4B1G086F-HCF8 Summary Table 9.2.1 Samsung K4B4G0846C-BCK0 Summary Table 10.2.1 Samsung K3PE7E700M Summary

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