Wht do ll those bits men now? bits (...) Number Systems nd Arithmetic or Computers go to elementry school instruction R-formt I-formt... integer dt number text chrs... floting point signed unsigned single precision double precision............ Questions About Numbers How do you represent relly lrge numbers? relly smll numbers? How do you do rithmetic? identify (e.g. overflow)? Wht is n nd wht does it look klik like? =rithmetic logic unit Introduction to Binry Numbers Consider 4-bit binry number Deciml Binry Deciml Binry 4 5 6 7 Exmples of binry rithmetic: + = 5 + = 6 + +
Negtive Numbers? Some Alterntives We would like tht provides obvious representtion of,,... uses dder for ddition single vlue of equl coverge of positive nd negtive numbers esy detection of sign esy negtion Sign Mgnitude -- MSB is sign bit, rest the sme - == -5 == One s complement -- flip ll bits to negte - == -5 == Two s Complement Representtion s complement representtion ti of negtive numbers Tke the bitwise inverse nd dd Biggest 4-bit Binry Number: 7 Smllest 4-bit Binry Number: -8 Deciml -8-7 -6-5 -4 - - - 4 5 6 7 Two s Complement Binry Two s Complement Arithmetic Deciml s Complement Binry Deciml s Complement Binry - - - -4 4-5 5-6 6-7 7-8 Exmples: 7-6 = 7 + (- 6) = - 5 = + (- 5) = - + +
Detection Instruction Fetch Arithmetic -- The hert of finstruction ti execution -4 Instruction Decode + + - 5-6 Opernd Fetch opertion + 7 + -6 7-4 -5 Execute Store b result So how do we detect overflow? Next Instruction Designing n Arithmetic Logic Unit A B N N op N Zero Control Lines (op) Function And Or Add Subtrct Set-on-less-thn A One Bit This -bit will perform AND, OR, nd ADD - 4 + - -6 b
A -bit -bit -bit b b How About Subtrction? Keep in mind the following: (A - B) is the sme s: s s Complement negte: Tke the of every bit nd dd Bit-wise inverse of B is!b: A - B = A + (-B) = A + (!B + ) = A +!B + Binvert b b b + b Detection Logic Crry into MSB! = Crry out of MSB For N-bit : = [N - ] XOR [N - ] A -bit B A -bit B A -bit B A -bit B X Y X XOR Y Zero Detection Logic Zero Detection Logic is just one BIG NOR gte Any non-zero input to the NOR gte will cuse its output to be zero A B A B A B A B -bit -bit -bit -bit
Set-on-less-thn Binvert b Binvert Full Bnegte Do subtrct use sign bit route to bit of result ll other bits zero. Binvert b b b b b b b wht signls ccomplish: Binvert CIn Oper dd? sub? nd? or? beq? slt? Zero Set b. detection b b Set Set sign bit (dder output from bit ) The Disdvntge of Ripple Crry MULTIPLY The dder we just built is clled Ripple Crry Adder The crry bit my hve to propgte from LSB to MSB Worst cse dely for n N-bit RC dder: N-gte dely A -bit B A -bit B A -bit B A -bit B A B Pper nd pencil exmple: Multiplicnd Multiplier x Product =? m bits x n bits = m+n bit product Binry mkes it esy: => plce ( x multiplicnd) => plce multiplicnd ( x multiplicnd) The point -> ripple crry dders re slow. Fster ddition schemes re possible tht ccelerte the movement of the crry from one end to the other.
MULTIPLY HARDWARE Observtions on Multiply 64-bit Multiplicnd reg, 64-bit, 64-bit Product reg, -bit multiplier reg 64-bit Multiplicnd Shift left 64 bits Multiplier Shift right bits MIPS registers Hi nd Lo re left nd right hlf of Product Gives us MIPS instruction MultU Wht bout multipliction? esiest solution is to mke both positive & remember whether to complement product when done. Product 64 bits Write Control test Divide: Pper & Pencil DIVIDE HARDWARE Divisor Quotient Dividend 64-bit Divisor reg, 64-bit, 64-bit Reminder reg, -bit Quotient reg Divisor 64 bits Shift right Reminder See how big number cn be subtrcted, creting quotient bit on ech step Binry => * divisor or * divisor Dividend = Quotient x Divisor + Reminder 64-bit Reminder 64 bits Write Control test Quotient Shift left bits
Divide Hrdwre Hi nd Lo registers in MIPS combine to ct s 64-bit register for multiply nd divide Signed Divides: id Simplest is to remember signs, mke positive, nd complement quotient nd reminder if necessry Note: Dividend nd Reminder must hve sme sign Note: Quotient negted if Divisor sign & Dividend sign disgree Key Points Instruction Set drives the design performnce, CPU clock speed driven by dder dely Multipliction nd division tke much longer thn ddition, requiring multiple ddition steps. So Fr Binry Frctions Cn do logicl, dd, subtrct, multiply, divide,... But... wht bout frctions? wht bout relly lrge numbers? = x + x + x + x so.... = x + x + x + x - + x - + x - e.g.,.75 = /4 = / = / + /4 =.
sign Recll Scientific Nottion deciml point Mntiss exponent -4 +6. x.67 x rdix (bse) Issues: Arithmetic (+, -, *, / ) Representtion, Norml form Rnge nd Precision Rounding Exceptions (e.g., divide by zero, overflow, underflow) Errors Properties ( negtion, inversion, if A = B then A - B = ) Floting-Point Numbers Representtion of floting point numbers in IEEE 754 stndrd: 8 single precision sign S E M exponent: excess 7 binry integer (ctul exponent is e = E - 7) mntiss: sign + mgnitude, normlized binry significnd w/ hidden integer bit:.m N = (-) S E-7(.M) < E < 55 =... -.5 =... 5 = X =. X 8 =. =... X =... X - =... rnge of bout X -8 to X 8 lwys normlized (so lwys leding, thus never shown) specil representtion of (E = ) (why?) cn do integer compre for greter-thn, sign Double Precision Floting Point Floting Point Addition Representtion of floting point numbers in IEEE 754 stndrd: double precision sign S E M M exponent: mntiss: excess binry integer sign + mgnitude, normlized binry significnd w/ hidden ctul exponent is e = E - integer bit:.m N = (-) S E-(.M) < E < 48 5 (+) bit mntiss rnge of bout X -8 to X 8 How do you dd in scientific nottion? 9.96 x 4 + 5. x Bsic Algorithm. Align. Add. Normlize 4. Round
FP Addition Hrdwre Sign Exponent Significnd Sign Exponent Significnd Floting Point Multipliction Smll Exponent difference Compre exponents How do you multiply in scientific nottion? (9.9 x 4 )(5. x ) = 5.48 x 7 Control Increment or decrement Shift right Rounding hrdwre Big Shift left or right Shift smller number right Add Normlize Round Bsic Algorithm. Add exponents. Multiply. Normlize 4. Round 5. Set Sign Sign Exponent Significnd FP Accurcy Extremely importnt in scientific clcultions Very tiny errors cn ccumulte over time IEEE 754 FP stndrd hs four rounding modes lwys round up (towrd + ) lwys round down (towrd - ) truncte round dto nerest => in cse of tie, round to nerest even Requires extr bits in intermedite representtions Key Points Floting Point extends the rnge of numbers tht cn be represented, t the expense of precision (ccurcy). FP opertions re very similr il to integer, but with pre- nd post-processing. Rounding implementtion is criticl to ccurcy over time.