Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description These devices contain four independent -input positive-or gates. They perform the Boolean functions Y = A B or Y = A + B in positive logic. The SNALS and SNAS are characterized for operation over the full military temperature range of C to C. The SN7ALS and SN7AS are characterized for operation from 0 C to 70 C. FUTION TABLE (each gate) INPUTS OUTPUT A B Y H X H X H H L L L SNALS, SNAS...J PACKAGE SN7ALS, SN7AS...D OR N PACKAGE (TOP VIEW) GND 7 0 V CC B A Y B A Y SNALS, SNAS... FK PACKAGE (TOP VIEW) V CC B 0 7 7 0 A Y B GND Y A No internal connection logic symbol logic diagram (positive logic) A B A B 0 Y Y A B A B 0 Y Y This symbol is in accordance with ANSI/IEEE Std - and IEC Publication 7-. Pin numbers shown are for the D, J, and N packages. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright, Texas Instruments Incorporated POST OFFICE BOX 0 DALLAS, TEXAS 7
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC........................................................................ 7 V voltage, V I............................................................................ 7 V Operating free-air temperature range, T A : SNALS.............................. C to C SN7ALS.................................. 0 C to 70 C Storage temperature range....................................................... C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SNALS SN7ALS MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage 0. 0. V IOH High-level output current 0. 0. ma IOL Low-level output current ma TA Operating free-air temperature 0 70 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNALS SN7ALS MIN TYP MAX MIN TYP MAX VIK VCC =. V, II = ma.. V VCC =. V to. V, IOH = 0. ma VCC VCC V VCC =V. IOL = ma 0. 0. 0. 0. IOL = ma 0. 0. II VCC =. V, VI = 7 V 0. 0. ma IIH VCC =. V, VI =.7 V 0 0 µa IIL VCC =. V, VI = 0. V 0. 0. ma IO VCC =. V, VO =. V 0 0 ma ICCH VCC =. V, VI =. V.. ma IC VCC =. V, VI = 0.... ma All typical values are at VCC = V, TA = C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure ) V FROM (INPUT) TO (OUTPUT) VCC =. V to. V, = 0 pf, RL = 00 Ω, TA = MIN to MAX SNALS SN7ALS MIN MAX MIN MAX AorB Y For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ns POST OFFICE BOX 0 DALLAS, TEXAS 7
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC........................................................................ 7 V voltage, V I............................................................................ 7 V Operating free-air temperature range, T A : SNAS............................... C to C SN7AS................................... 0 C to 70 C Storage temperature range....................................................... C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SNAS SN7AS MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage 0. 0. V IOH High-level output current ma IOL Low-level output current 0 0 ma TA Operating free-air temperature 0 70 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNAS SN7AS MIN TYP MAX MIN TYP MAX VIK VCC =. V, II = ma.. V VCC =. V to. V, IOH = ma VCC VCC V VCC =. V, IOL = 0 ma 0. 0. 0. 0. V II VCC =. V, VI = 7 V 0. 0. ma IIH VCC =. V, VI =.7 V 0 0 µa IIL VCC =. V, VI = 0. V 0. 0. ma IO VCC =. V, VO =. V 0 0 ma ICCH VCC =. V, VI =. V 7. 7. ma IC VCC =. V, VI = 0.... ma All typical values are at VCC = V, TA = C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure ) FROM (INPUT) TO (OUTPUT) VCC =. V to. V, = 0 pf, RL = 00 Ω, TA = MIN to MAX SNAS SN7AS MIN MAX MIN MAX 7.. AorB Y.. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ns POST OFFICE BOX 0 DALLAS, TEXAS 7
MEASUREMENT INFORMATION SERIES ALS/7ALS AND AS/7AS DEVICES VCC 7 V RL = R = R S RL RL R R LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR -STATE OUTPUTS Timing. V. V 0. V High-Level Pulse. V. V. V 0. V Data tsu. V th. V. V 0. V Low-Level Pulse tw. V. V. V 0. V TAGE WAVEFORMS SETUP AND HOLD TIMES TAGE WAVEFORMS PULSE DURATIONS Control (low-level enabling) Waveform S Closed (see Note B) tpzl. V. V tphz. V tplz. V 0. V. V 0. V tpzh Waveform S Open. V 0. V (see Note B) 0 V TAGE WAVEFORMS ENABLE AND DISABLE TIMES, -STATE OUTPUTS In-Phase Out-of-Phase (see Note C). V. V. V. V 0. V. V. V. V TAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. includes probe and jig capacitance. B. Waveform is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of -state outputs, switch S is open. D. All input pulses have the following characteristics: PRR MHz, tr = tf = ns, duty cycle = 0%. E. The outputs are measured one at a time with one transition per measurement. Figure. Load Circuits and Voltage Waveforms POST OFFICE BOX 0 DALLAS, TEXAS 7
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. ing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. ILUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright, Texas Instruments Incorporated