Part II Instruction-Set Architecture Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 1
MiniMIPS Instruction Formats op rs rt 31 25 2 15 1 5 R 6 bits 5 bits 5 bits 5 bits I J Opcode Source register 1 Source register 2 rd Destination register sh 5 bits Shift amount op rs rt operand / offset fn 6 bits Opcode extension 31 25 2 15 6 bits 5 bits 5 bits 16 bits Opcode op Source or base Destination or data 1 jump target address Imm ediate operand or address offset 31 25 6 bits 26 bits 1 1 1 1 1 Opcode Memory word address (byte address divided by 4) Figure 5.4 MiniMIPS instructions come in only three formats: register (R), immediate (I), and jump (J). Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 2
5.3 Simple Arithmetic/Logic Instructions Add and subtract already discussed; logical instructions are similar add $t,$s,$s1 # set $t to ($s)+($s1) sub $t,$s,$s1 $ $ # set $t to ($s)-($s1) and $t,$s,$s1 # set $t to ($s) ($s1) or $t,$s,$s1 # set $t to ($s) ($s1) xor $t,$s,$s1 $ $ # set $t to ($s) ($s1) nor $t,$s,$s1 # set $t to (($s) ($s1)) R op rs rt rd sh 31 25 2 15 1 5 1 1 1 1 1 x ALU instruction Source Source Destination register 1 register 2 register fn Unused add = 32 sub = 34 Figure 5.5 The arithmetic instructions add and sub have a format that is common to all two-operand ALU instructions. For these, the fn field specifies the arithmetic/logic operation to be performed. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 3
Arithmetic/Logic with One Immediate Operand An operand in the range [ 32 768, 32 767], or [x, xffff], can be specified in the immediate field. addi $t,$s,61 # set $t to ($s)+61 andi $t,$s,61 # set $t to ($s) 61 ori $t,$s,61 # set $t to ($s) 61 xori $t,$s,xff # set $t to ($s) xff For arithmetic instructions, the immediate operand is sign-extended op rs rt operand / offset 31 25 2 15 I 1 1 1 1 1 1 1 1 1 Errors 1 addi = 8 Source Destination Immediate operand Figure 5.6 Instructions such as addi allow us to perform an arithmetic or logic operation for which one operand is a small constant. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 4
5.4 Load and Store Instructions op rs rt operand / offset 31 25 2 15 I 1 x 1 1 1 1 1 1 1 1 lw = 35 Base Data Offset relative to base sw = 43 register register Memory A[] A[1] A[2]... A[i] lw $t,4($s3) lw $t,a($s3) Offset = 4i Address in base register Element i of array A Note on base and offset: The memory address is the sum of (rs) and an immediate value. Calling one of these the base and the other the offset is quite arbitrary. It would make perfect sense to interpret the address A($s3) as having the base A and the offset ($s3). However, a 16-bit base confines us to a small portion of memory space. Figure 5.7 MiniMIPS lw and sw instructions and their memory addressing convention that allows for simple access to array elements via a base address and an offset (offset = 4i leads us to the i th word). Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 5
lw, sw, and lui Instructions lw $t,4($s3) # load mem[4+($s3)] in $t sw $t,a($s3) # store ($t) in mem[a+($s3)] # ($s3) ( ) means content of $s3 lui $s,61 # The immediate value 61 is # loaded in upper half of $s # with lower 16b set to s I op rs rt operand / offset 31 25 2 15 1 1 1 1 1 1 1 1 1 1 lui = 15 Unused Destination Immediate operand 1 1 1 1 1 Content of $s after the instruction is executed Figure 5.8 The lui instruction allows us to load an arbitrary 16-bit value into the upper half of a register while setting its lower half to s. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 6
5.5 Jump and Branch Instructions Unconditional jump and jump through register instructions $ra is the symbolic name for reg. $31 (return j verify # go to mem loc named verify jr $ra # go to address that is in $ra; # $ra may hold a return address J op jump target address 31 25 1 1 1 1 1 1 j = 2 address) x x x x 1 1 1 1 1 From PC (incremented) op rs rt R Effective target address (32 bits) 31 25 2 15 1 5 1 1 1 1 1 1 ALU instruction Source register Figure 5.9 The jump instruction j of MiniMIPS is a J-type instruction which is shown along with how its effective target address is obtained. The jump register (jr) instruction is R-type, with its specified register often being $ra. rd sh fn Unused Unused Unused jr = 8 Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 7
Memory Map in MiniMIPS Hex address 4 Reserved Program 1 M words Text segment 63 M words Addressable with 16-bit signed offset 1 18 1ffff Static data Dynamic data Data segment $28 $29 $3 $gp $fp $sp Stack 448 M words Stack segment 7ffffffc 8 Second half of address space reserved for memory-mapped I/O Figure 6.3 Overview of the memory address space in MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 8
Simple Datapath (from BP) Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 9
Conditional Branch Instructions Conditional branches use PC-relative addressing bltz $s1,l # branch on ($s1)< beq $s1,$s2,l # branch on ($s1)=($s2) bne $s1,$s2,l # branch on ($s1) ($s2) op rs rt operand / offset 31 25 2 15 I 1 1 1 1 1 1 1 1 bltz = 1 Source Zero eo Relative ea e branch ds distance in words ods op rs rt operand / offset 31 25 2 15 I 1 x 1 1 1 1 1 1 1 1 1 beq = 4 bne = 5 Source 1 Source 2 Relative branch distance in words Figure 5.1 (part 1) Conditional branch instructions of MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 1
Simple Datapath (from BP) Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 11
Comparison Instructions for Conditional Branching slt $s1,$s2,$s3 # if ($s2)<($s3), set $s1 to 1 # else set $s1 to ; # often followed by beq/bne slti $s1,$s2,61 # if ($s2)<61, set $s1 to 1 # else set $s1 to R op rs rt 31 25 2 15 1 5 1 1 1 1 1 1 1 1 1 1 ALU instruction Source 1 register Source 2 register rd sh fn Destination Unused slt = 42 op rs rt operand / offset 31 25 2 15 I 1 1 1 1 1 1 1 1 1 1 1 slti = 1 Source Destination Immediate operand Figure 5.1 (part 2) Comparison instructions of MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 12
Examples for Conditional Branching If the branch target is too far to be reachable with a 16-bit offset (rare occurrence), the assembler automatically replaces the branch instruction beq $s,$s1,l1$s1 with: bne $s1,$s2,l2 # skip jump if (s1) (s2) j L1 # goto L1 if (s1)=(s2) L2:... Forming if-then constructs; e.g., if (i == j) x = x + y bne $s1,$s2,endif $s2 # branch on i j add $t1,$t1,$t2 # execute the then part endif:... If the condition were (i < j), we would change the first line to: slt $t,$s1,$s2 # set $t to 1 if i<j beq $t,$,endif # branch if ($t)=; # i.e., i not< j or i j Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 13
Compiling if-then-else Statements Example 5.3 Show a sequence of MiniMIPS instructions corresponding to: if (i<=j) x = x+1; z = 1; else y = y 1; z = 2*z Solution Similar to the if-then statement, but we need instructions for the else part and a way of skipping the else part after the then part. slt $t,$s2,$s1 # j<i? (inverse condition) bne $t,$zero,else # if j<i goto else part addi $t1,$t1,1 # begin then part: x = x+1 addi $t3,$zero,1 # z = 1 j endif # skip the else part else: addi $t2,$t2,-1 # begin else part: y = y 1 add $t3,$t3,$t3 # z = z+z endif:... Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 14
Loading and Storing Bytes Bytes can be used to store ASCII characters or small integers. MiniMIPS addresses refer to bytes, but registers hold words. lb $t,8($s3) # load rt with mem[8+($s3)] # sign-extend to fill reg lbu $t,8($s3) # load rt with mem[8+($s3)] # zero-extend to fill reg sb $t,a($s3) # LSB of rt to mem[a+($s3)] op rs rt immediate / offset 31 25 2 15 I 1 x x 1 1 1 1 1 lb = 32 lbu = 36 sb = 4 Base register Data register Address offset Figure 6.6 Load and store instructions for byte-size data elements. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 15
Logical Shifts MiniMIPS instructions for left and right shifting: sll $t,$s1,2 # $t=($s1) left-shifted by 2 srl $t,$s1,2 $ # $t=($s1) right-shifted hif by 2 sllv $t,$s1,$s # $t=($s1) left-shifted by ($s) srlv $t,$s1,$s # $t=($s1) right-shifted by ($s) R op rs rt 31 25 2 15 1 5 1 1 1 1 x ALU Unused Source Destination Shift sll = instruction register register amount srl = 2 rd sh fn R op rs rt 31 25 2 15 1 5 1 1 1 1 1 x ALU instruction Amount register Source register Figure 6.12 The four logical shift instructions of MiniMIPS. rd Destination register sh fn Unused sllv = 4 srlv = 6 Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 16
6.6 Additional Instructions MiniMIPS imips instructions ti for multiplication li and division: i i mult $s, $s1 # set Hi,Lo to ($s) ($s1) div $s, $s1 # set Hi to ($s)mod($s1) # and Lo to ($s)/($s1) mfhi $t # set $t to (Hi) mflo $t # set $t to (Lo) Reg file Mul/Div unit Hi Lo R op rs rt 31 25 2 15 1 5 1 1 1 1 1 x ALU instruction Source register 1 Source register 2 rd sh fn Unused Unused mult = 24 div = 26 Figure 6.1 The multiply (mult) and divide (div) instructions of MiniMIPS. R op rs rt 31 25 2 15 1 5 1 1 x ALU instruction Unused Unused rd Destination register sh fn Unused mfhi = 16 mflo = 18 Figure 6.11 MiniMIPS instructions for copying the contents of Hi and Lo registers into general registers. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 17
The 2 MiniMIPS Instructions from Chapter 6 (4 in all so far) Instruction Usage op Copy Move from Hi mfhi rd Move from Lo mflo rd Add unsigned addu rd,rs,rt Subtract unsigned subu rd,rs,rt Multiply mult rs,rt Arithmetic Multiply unsigned multu rs,rt Divide div rs,rt Divide unsigned divu rs,rt Table 6.2 (partial) Add immediate unsigned addiu rs,rt,imm op rs rt rd sh fn 31 25 2 15 1 5 R 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Opcode Source register 1 Source register 2 Destination register Shift amount Opcode extension op rs rt operand / offset 31 25 2 15 6 bits 5 bits 5 bits 16 bits I J Opcode Source or base Destination or data Immediate operand or address offset op jump target address 31 25 6 bits 1 26 bits 1 1 1 1 1 Opcode Memory word address (byte address divided by 4) Shift Add immediate unsigned addi s t imm Shift left logical sll rd,rt,sh Shift right logical srl rd,rt,sh Shift right arithmetic sra rd,rt,sh Shift left logical variable sllv rd,rt,rs Shift right logical variable srlv rt,rd,rs Shift right arith variable srav rd,rt,rd Load byte lb rt,imm(rs) Memory access 36 Control transfer 9 32 fn 16 18 33 35 24 25 26 27 2 3 4 6 7 Load byte unsigned lbu rt,imm(rs) Store byte sb rt,imm(rs) 4 Jump and link jal L 3 System call syscall 12 Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 18
Table 6.2 The 37 + 3 MiniMIPS Instructions Covered So Far Instruction Usage Instruction Usage Load upper immediate lui rt,imm Move from Hi mfhi rd Add add rd,rs,rt Move from Lo mflo rd Subtract sub rd,rs,rt Add unsigned addu rd,rs,rt Set less than slt rd,rs,rt, Subtract unsigned subu rd,rs,rt, Add immediate addi rt,rs,imm Multiply mult rs,rt Set less than immediate slti rd,rs,imm Multiply unsigned multu rs,rt AND and rd,rs,rt Divide div rs,rt OR or rd,rs,rtrs rt Divide unsigned divu rs,rtrt XOR xor rd,rs,rt Add immediate unsigned addiu rs,rt,imm NOR nor rd,rs,rt Shift left logical sll rd,rt,sh AND immediate andi rt,rs,imm Shift right logical srl rd,rt,sh OR immediate ori rt,rs,imm Shift right arithmetic ti sra rd,rt,sh XOR immediate xori rt,rs,imm Shift left logical variable sllv rd,rt,rs Load word lw rt,imm(rs) Shift right logical variable srlv rd,rt,rs Store word sw rt,imm(rs) Shift right arith variable srav rd,rt,rs Jump j L Load byte lb rt,imm(rs) Jump register jr rs Load byte unsigned lbu rt,imm(rs) Branch less than bltz rs,l Store byte sb rt,imm(rs) Branch equal beq rs,rt,l, Jump and link jal L Branch not equal bne rs,rt,l System call syscall Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 19
5.6 Addressing Modes Addressing Instruction Other elements involved Operand Implied Immediate Some place in the machine Extend, if required Register Reg spec Reg file Reg data Base Reg base Constant offset Reg file Reg data Add Me m addr Me mory Me m data PC-relative Incremented Constant offset PC Add Me m addr Me mory Me m data Pseudodirect PC Me m addr Me mory Me m data Figure 5.11 Schematic representation of addressing modes in MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 2
More Elaborate Addressing Modes Addressing Instruction Other elements involved Operand Indexed Update (with base) Reg f ile Index reg Base reg Increment amount Base reg Reg f ile Add Increment Me m addr Me m addr Me mory Me mory Me m data Me m data x := B[i] x := Mem[p] p := p + 1 Update (with indexed) Increment amount Reg f ile Base reg Index reg Increment Add Me m addr Me mory Me m data x := B[i] i := i + 1 Indirect PC Mem addr This part maybe replaced with any other form of address specification Me mory Me m addr, 2nd access Me m data Me mory Me m data, 2nd access t := Mem[p] x := Mem[t] x := Mem[Mem[p]] Figure 8.1 Schematic representation of more elaborate addressing modes not supported in MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 21
Usefulness of Some Elaborate Addressing Modes Update mode: XORing a string of bytes loop: lb $t,a($s) xor $s1,$s1,$t addi $s,$s,-1 bne $s,$zero,loop Indirect mode: Case statement case: lw $t,($s) # get s add $t,$t,$t # form 2s add $t,$t,$t # form 4s la $t1,t # base T add $t1,$t,$t1 lw $t2,($t1) # entry jr $t2 One instruction with update addressing Branch to location Li if s = i (switch var.) T T+4 T+8 T+12 T+16 T+2 L L1 L2 L3 L4 L5 Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 22
Example: Basic x86 Addressing Modes Two operands per instruction Source/dest operand Register Register Register Memory Memory Second source operand Register Immediate Memory Register Immediate Memory addressing modes Address in register Address = R base + displacement Address = R + scale base 2 R index (scale =, 1, 2, or 3) Address = R base + 2 scale R index + displacement ECE 15B Spring 211
6.1 Simple Procedure Calls Using a procedure involves the following sequence of actions: 1. Put arguments in places known to procedure (reg s $a-$a3) $ 2. Transfer control to procedure, saving the return address (jal) 3. Acquire storage space, if required, for use by the procedure 4. Perform the desired d task 5. Put results in places known to calling program (reg s $v-$v1) 6. Return control to calling point (jr) MiniMIPS instructions for procedure call and return from procedure: jal proc # jump to loc proc and link; # link means save the return # address (PC)+4 in $ra ($31) jr rs # go to loc addressed by rs Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 24
Illustrating a Procedure Call main PC jal proc Prepare to call Prepare to continue proc Save, etc. jr $ra Restore Figure 6.1 Relationship between the main program and a procedure. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 25
$ $1 $2 $3 $4 $5 $6 $7 $8 $9 $1 $11 $12 $13 $14 $15 $16 $17 $18 $19 $2 $21 $22 $23 $24 $25 $26 $27 $28 $29 $3 $31 $zero $at Reserved for assembler use $v Procedure results $v1 $a $a1 Procedure Saved $a2 arguments $a3 $t $t1 $t2 $t3 Temporary $t4 values $t5 $t6 $t7 $s $s1 $s2 Saved $s3 across Operands $s4 procedure $s5 calls $s6 $s7 $t8 More $t9 temporaries $k $k1 Reserved for OS (kernel) $gp Global pointer $sp Stack pointer Saved $fp Frame pointer $ra Return address A 4-byte word sits in consecutive memory addresses according to the big-endian order (most significant byte has the lowest address) 3 2 1 Byte numbering: 3 2 1 When loading a byte into a register, it goes in the low end Doublew ord Word Byte A doubleword sits in consecutive registers or memory locations according to the big-endian order (most significant word comes first) Recalling Register Conventions i t Figure 5.2 Registers and data sizes in MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 26
A Simple MiniMIPS Procedure Example 6.1 Procedure to find the absolute value of an integer. $v ($a) Solution The absolute value of x is x if x < and x otherwise. abs: sub $v,$zero,$a # put -($a) in $v; # in case ($a) < bltz $a,done # if ($a)< then done add $v,$a,$zero # else put ($a) in $v done: jr $ra # return to calling program In practice, we seldom use such short procedures because of the overhead that they entail. In this example, we have 3-4 instructions of overhead for 3 instructions of useful computation. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 27
Nested Procedure Calls main PC jal abc Prepare to call Prepare to continue abc Procedure abc Save xyz Procedure xyz jal xyz Text version is incorrect jr $ra Restore jr $ra Figure 6.2 Example of nested procedure calls. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 28
Fibonacci numbers F(n) = F(n-1)+F(n-2) F(1) = 1 F(2) = 1 n = 1 2 3 4 5 6 F(n) = 1 1 2 3 5 8 /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } ECE 15B Spring 211
6.2 Using the Stack for Data Storage sp b a Analogy: Cafeteria stack of plates/trays Push c Pop x sp c b a sp = sp 4 mem[sp] = c sp b a x = mem[sp] sp = sp + 4 Figure 6.4 Effects of push and pop operations on a stack. push: addi $sp,$sp,-4 sw $t4,($sp) pop: lw $t5,($sp) addi $sp,$sp,4 Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 3
Memory Map in MiniMIPS Hex address 4 Reserved Program 1 M words Text segment 63 M words Addressable with 16-bit signed offset 1 18 1ffff Static data Dynamic data Data segment $28 $29 $3 $gp $fp $sp Stack 448 M words Stack segment 7ffffffc 8 Second half of address space reserved for memory-mapped I/O Figure 6.3 Overview of the memory address space in MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 31
6.3 Parameters and Results Stack allows us to pass/return an arbitrary number of values $sp $fp c b a. Frame for current procedure $sp Local variables Saved registers $fp z y. Old ($fp) c b a. Frame for current procedure Frame for previous procedure Before calling After calling Figure 6.5 Use of the stack by a procedure. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 32
Example of Using the Stack Saving $fp, $ra, and $s onto the stack and restoring them at the end of the procedure proc: sw $fp,-4($sp) # save the old frame pointer addi $fp,$sp, $sp # save ($sp) into $fp addi $sp,$sp, 12 # create 3 spaces on top of stack sw $ra,-8($fp) # save ($ra) in 2nd stack element sw $s,-12($fp) # save ($s) in top stack element $sp. ($s) ($ra). ($fp). $sp lw $s,-12($fp) # put top stack element in $s $fp lw $ra, -8($fp) # put 2nd stack element in $ra addi $sp,$fp, # restore $sp to original state $fp lw $fp,-4($sp) # restore $fp to original state jr $ra # return from procedure Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 33
Ch has 3 pools of memory Static storage: global variable storage, basically permanent, entire program run The Stack: local variable storage, parameters, return address (location of activation records in Java or stack frame in C) The Heap (dynamic malloc storage): data lives until deallocated by yprogrammer C requires knowing where objects are in memory, otherwise things don t work as expectedjava hides location of objects
Address space ~ FFFF FFFF hex A dd stack A program s address space contains 4 regions: stack: local variables, grows downward heap: space requested for pointers via malloc() ; resizes dynamically, grows upward static data: variables declared outside main, does not grow or shrink code: loaded when program starts, does not change ~ hex heap static data code For now, OS somehow prevents accesses between stack and heap (gray hash lines). Wait for virtual memory
Memory Map in MiniMIPS Hex address 4 Reserved Program 1 M words Text segment 63 M words Addressable with 16-bit signed offset 1 18 1ffff Static data Dynamic data Data segment $28 $29 $3 $gp $fp $sp Stack 448 M words Stack segment 7ffffffc 8 Second half of address space reserved for memory-mapped I/O Figure 6.3 Overview of the memory address space in MiniMIPS. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 36
Static variables If declared outside a procedure, allocated in static storage If declared inside procedure, allocated on the stack and freed when procedure returns. NB: main() is a procedure int myglobal; main() { int mytemp; }
The Heap (Dynamic memory) Large pool of memory, not allocated in contiguous order back-to-back requests for heap memory could result blocks very far apart where Java new command allocates memory In C, specify number of bytes of memory explicitly i l to allocate item int *ptr; ptr = (int *) malloc(sizeof(int)); /* malloc returns type (void *), so need to cast to right type */ malloc(): Allocates raw, uninitialized memory from heap
Memory Management How do we manage memory? Code, Static storage are easy: they never grow or shrink Stack space is also easy: stack frames are created and destroyed in last-in, first-out (LIFO) order Managing the heap is tricky: memory can be allocated / deallocated at any time
Heap Management Requirements Want malloc() and free() to run quickly. Want minimal memory overhead Want to avoid fragmentation* when most of our free memory is in many small chunks In this case, we might have many free bytes but not be able to satisfy a large request since the free bytes are not contiguous in memory. * This is technically called external fragmention
Heap Management An example Request R1 for 1 bytes Request R2 for 1 byte Memory from R1 is freed Request R3 for 5 bytes R2 (1 byte) R1 (1 bytes)
Heap Management An example Request R1 for 1 bytes Request R2 for 1 byte Memory from R1 is freed Request R3 for 5 bytes R2 (1 byte) R3? R3?
6.5 Arrays and Pointers Index: Use a register that holds the index i and increment the register in each step to effect moving from element i of the list to element i + 1 Pointer: Use a register that points to (holds the address of) the list element being examined and update it in each step to point to the next element Array index i Base Array A Pointer to A[i] Array A Add 1 to i; Compute 4i; Add 4i to base A[i] A[i + 1] Add 4 to get the address of A[i + 1] A[i] A[i + 1] Figure 6.8 Stepping through the elements of an array using the indexing ing method and the pointer updating method. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 43
Selection Sort Example 6.4 To sort a list of numbers, repeatedly perform the following: Find the max element, swap it with the last item, move up the last pointer A A A first first first max x y last last last y x Start of iteration Maximum identified End of iteration Figure 6.9 One iteration of selection sort. Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 44
Selection Sort Using the Procedure max Inputs to proc max In $a In $a1 Example 6.4 (continued) A A A first first first last Outputs from proc max max x y In $v In $v1 last y Start of iteration Maximum identified End of iteration last x sort: beq $a,$a1,done $ # single-element list is sorted jal max # call the max procedure lw $t,($a1) # load last element into $t sw $t,($v) # copy the last element to max loc sw $v1,($a1) # copy max value to last element addi $a1,$a1,-4 # decrement pointer to last element j sort # repeat sort for smaller list done:... # continue with rest of program Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 45
Finding the Maximum Value in a List of Integers Example 5.5 List A is stored in memory beginning at the address given in $s1. List length is given in $s2. Find the largest integer in the list and copy it into $t. Solution Scan the list, holding the largest element identified thus far in $t. lw $t,($s1) # initialize maximum to A[] addi $t1,$zero, # initialize index i to loop: add $t1,$t1,1 $ 1 1 # increment index i by 1 beq $t1,$s2,done # if all elements examined, quit add $t2,$t1,$t1 # compute 2i in $t2 add $t2,$t2,$t2 # compute 4i in $t2 add $t2,$t2,$s1 # form address of A[i] in $t2 lw $t3,($t2) # load value of A[i] into $t3 slt $t4,$t,$t3 # maximum < A[i]? beq $t4,$zero,loop # if not, repeat with no change addi $t,$t3, # if so, A[i] is the new maximum j loop # change completed; now repeat done:... # continuation of the program Jan. 211 Computer Architecture, Instruction-Set Architecture Slide 46