SRM ARTS AND SCIENCE COLLEGE SRM NAGAR, KATTANKULATHUR 603203 DEPARTMENT OF COMPUTER SCIENCE & APPLICATIONS LESSON PLAN (207-208) Course / Branch : B.Sc CS Total Hours : 50 Subject Name : Digital Electronics & Subject Code : SAE2B Microprocessors Faculty Name : M.Sudharasan /D.Buvaneshwari Designation : Asst.Pressor Semester / Year : EVEN / I : 5 PPT Hours : Minimum Hour per Unit Aim: To make the students understand the Number Systems, Components and working Digital Computer and Microprocessor. Objectives: To describe basic terminology about Digital Computer. Explain various Logic Gates. Describe Flip Flops and Registers. To learn various Number Systems. Text Book(s):. M. Morris Mano, 2005, Digital Logic and Computer Design, Prentice-Hall India Pvt. Ltd. 2. Ramesh S. Gaonkar, 999, Microprocessor Architecture, Programming, and Applications with the 8085, 5 th Edition, Penram International Publishing (India) Pvt. Ltd. Book(s):. D. P. Leach and A. P. Malvino, 2002, Digital Principles and Applications, 5th Edition, Tata McGraw, Hill Publishing Co. Ltd. 2. V. Vijayendran, 2004, Digital Fundamentals, S. Viswanathan (Printers & Publishers) Pvt. Ltd. 3. V. Vijayendran, 2004, Fundamentals Microprocessor 8085, S. Viswanathan (Printers & Publishers) Pvt. Ltd. 4. N. K. Srinath, 2005, 8085 Microprocessor Programming and Interfacing, Prentice-Hall India Pvt. Ltd. Website Link:
Page Nos Sl. Unit Topic(s) Unit-I: Binary Systems & Code conversion,boolean Algebra & Logic Gates Truth Tables Universal Gates Simplification Boolean functions: SOP, POS methods K-map, Combinational Logic: Adders & Subtractors Multiplexer Demultiplexer - Encoder Decoder.. I 2. I i. Binary Systems a. Digital Computers & Systems b. Binary Numbers ii. Code Conversion a. Number Base Conversion b. Complements 3. c. Binary Storage and d. Registers, Binary Logic Boolean Algebra 4. I a. Basic Definitions b. Axiomatic Definitions and Theorems 5. c. Canonical and Standard 6. Forms i. Logic Gates a. Digital Logic Gates b. IC Logic Families 7. I i. Truth Tables ii. Universal Gates Simplification Boolean Fuctions 8. I a. Sum Products (SOP) b. Product Sums (POS) 9. I 0 I. I 2. I 3. I K Map K Map a. Two and Three Variable Maps a. Four Variable Maps K Map a. Five and Six Variable Maps Combinational Logic a. Adders and Subractors b. Multiplexers c. Combinational Logic a. Demultiplexers b. Encoders and Decoders 4. Unit Test I T -6 T 9-0 T -30 T 34-46 T 47-52 T 53-60 T 56-59 T 72-77 T 77-83 T 77-83 T 77-83 T 6-23 T 54-80 2
Page Nos Sl. Unit Topic(s) Unit-II: Sequential Logic: RS, Clocked RS, D, JK, Master Slave JK, T Flip-Flops Shift Registers Types Shift Registers Counters: Ripple Counter Synchronous Counters Up-Down Counter. 5. II 6. II Sequential Logic a. Flip Flops b. RS Flip Flop c. Clocked RS Flip Flop T 202-205 Flip Flops a. D Flip Flop T 207-208 7. b. JK Flip Flop T 209-23 8. II 9. II Flip Flops a. Master Slave JK Flip Flop T 237-245 b. T Flip Flops Shift Registers a. Introduction Registers T 256-26 20. II b. Introduction to Shift Registers T 263-264 2. II 22. II 23. II 24. II Shift Registers a. Types Registers Counters a. Introduction to Counters b. Ripple Counters Synchronous Counters a. Introduction to Synchronous Counters b. Types Synchronous Counters Synchronous Counters a. Timing Sequences b. Up-Down Counters 25. Unit Test II T 265-27 T 272-276 T 276-283 T 284-288 3
Sl. Unit Topic(s) Page Nos Unit-III: Introduction to microprocessor Microprocessor and assembly languages- microprocessor architecture and its operation Memory-I/O Devices-8085 MPU introduction to instructions- data transfer operations-addressing modes-. Arithmetic, Logic and branch operations- Writing assembly level programs. 26 III Introduction to microprocessor a. Microprocessor b. Organization a microprocessor based system c. Computer language d. Machine language 4-4 27 III e. Assembly language f. ASCII code g. High level language h. Operating systems i. Large,Medium size, microcomputers 5-24 28 III Microprocessor and assembly languages a. The 8085 programming model 3-34 b. Instruction classification c. Instruction data format and 30 III storage d. Overview the 8085 instruction set e. Writing and hand assembling a program microprocessor architecture and its operation a. Microprocessor-initiated 3 III operations, 8085 bus organization b. Internal data operations,8085 registers c. Pheripheral or externally initiated operations 32 III Memory and I/O 33 III 8085 MPU a. 8085 micrprocessor b. Microprocessor communication and bus timings c. Demultiplexing the bus AD7- AD0 d. Generating control signals 4 34-53 58-63 63-8 96-08 29
e. Decoding and executing an instruction. 34 III Data transfer operations 76-86 Addressing modes 35 III Arithmetic Logic and branch 86-20 operations Writing assembly level programs 36 III 2-25 37 Unit Test- III Unit-IV: Time Delay Programs: Time Delay Using One Register Using a Register Pair Using a Loop within Loop Technique Counter Design with Time Delay Stack and Subroutines BCD to Binary Conversion and Vice-versa BCD to HEX Conversion and Vice-versa Binary to ASCII Conversion and Vice-versa BCD Addition and Subtraction. 38 IV Time delay programs:time delay 276-278 using one register- 39 IV Using a register pair 278 40 IV Using a loop within loop technique 279-28 4 IV Counter design with time delay 28-282 42 IV Stack and subroutines 295-30 43 IV 44 IV BCD to binary conversion and vice versa Binary to ASCII Conversion and Vice-versa BCD Addition and Subtraction 324-329 332-338 45 Unit Test IV Sl. Unit Topic(s) Page Nos Unit-V: 8085 Interrupt Vectored Interrupts Interfacing I/O Devices: Basic Interfacing Concepts Interfacing Input Devices- Memory-Mapped I/O. 46 V 8085 Interrupt 376-385 47 V Vectored Interrupts 384-386 5
Sl. Unit Topic(s) Page Nos 48 V Interfacing I/O Devices: Basic Interfacing Concepts a. Memory interfaces RAM b. Memory interfaces ROM R 205-222 49 V 50 V Interfacing I/O Devices a. Interfacing Input Devices b. Interfacing output Devices Memory-Mapped I/O. R 224-246 R 24-246 5 Unit Test- V * T Text Book / R Book 6