4-Line Low Capacitance TVS Diode Array Description The is a low capacitance TVS array, utilizing leading monolithic silicon technology to provide fast response time and low ESD clamping voltage, making this device an ideal solution for protecting voltage sensitive high-speed data lines. The has an ultra-low capacitance with a typical value at 1.5pF, and complies with the IEC 6-4-2 (ESD) standard with ±15kV air and ±8kV contact discharge. It is assembled into a 6-Pin lead-free SOT23-6 package. The low capacitance array make it ideal for four high speed data and transmission line. This device is optimized for ESD protection of portable electronics. Features Low capacitance: 1.5pF typical (I/O to I/O) Ultra low leakage: na level Low operating voltage: 5.V Low clamping voltage Up to 4 lines and one power line protects Complies with following standards: IEC 6-4-2 (ESD) immunity test Air discharge: ±15kV Contact discharge: ±8kV IEC6-4-4 (EFT) 4A (5/5ns) IEC6-4-5 (Lightning) 12A (8/2µs) RoHS Compliant Mechanical Characteristics Package: SOT23-6 Lead Finish: Matte Tin Case Material: Green Molding Compound UL Flammability Classification Rating 94V- Moisture Sensitivity: Level 3 per J-STD-2 Terminal Connections: See Diagram Below Marking Information: See Below Applications USB 2. Power and Data Line Protection Video Graphics Cards Monitors and Flat Panel Displays Digital Video Interface (DVI) // Ethernet Notebook Computers SIM Ports ATM Interfaces IEEE 1394 Firewire Ports Ordering Information Part Number Packaging Reel Size 3/Tape & Reel 7 inch Dimensions and Pin Configuration Circuit and Pin Schematic Copyright 214 PN-Silicon Co., Ltd 1 / 5
Absolute Maximum Ratings (TA=25 C unless otherwise specified) Parameter Symbol Value Unit Peak Pulse Power (8/2µs) Ppk 35 W Peak Pulse Current (8/2µs) I PP 12 A ESD per IEC 6 4 2 (Air) V ESD ESD per IEC 6 4 2 (Contact) ±8 ±15 kv Operating Temperature Range T J 55 to +125 C Storage Temperature Range Tstg 55 to +15 C Electrical Characteristics (T A =25 C unless otherwise specified) Parameter Symbol Min Typ Max Unit Test Condition Reverse Working Voltage V RWM 5 V Any I/O pin to ground Breakdown Voltage V BR 6 V I T = 1mA, any I/O pin to ground Reverse Leakage Current I R 5 µa V RWM = 5V, any I/O pin to ground Clamping Voltage V C 12.5 14 V Clamping Voltage V C 17.5 25 V Junction Capacitance C J.9 pf Junction Capacitance C J 1.5 2.5 pf I PP = 1A (8 x 2µs pulse), any I/O pin to ground I PP = 5A (8 x 2µs pulse), any I/O pin to ground V R = V, f = 1MHz, between I/O pins V R = V, f = 1MHz, any I/O pin to ground Note 1: I/O pins are Pin 1, 3, 4 and 6 Copyright 214 PN-Silicon Co., Ltd 2 / 5
Typical Performance Characteristics (T A =25 C unless otherwise Specified) 5. Junction Capacitance_Cj (pf) 4. 3. 2. 1. 1 2 3 4 5 Peak Power_Ppp(W) 1.1. 1 1 Reverse Voltage_V R (V) Pulse Duration_tp(uS) Junction Capacitance vs. Reverse Voltage Peak Pulse Power vs. Pulse Time 25 12 Clamping Voltage_VC (V) 2 15 5 % of Rated Power 8 6 4 2 2 4 6 8 12 14 25 5 75 125 15 Peak Pulse Current_Ipp (A) Ambient Temperature_Ta( ) Clamping Voltage vs. Peak Pulse Current Power Derating Curve 1 % of Peak Pulse Current 9 8 7 6 5 4 3 2 2 3 Time_t(μS) 8 X 2uS Pulse Waveform CH1 5.V M.ns ESD Clamping Voltage 8 kv Contact per IEC6 4 2 Copyright 214 PN-Silicon Co., Ltd 3 / 5
Typical Application The is designed to protect four data lines from transient over-voltages by clamping them to fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode V F ) the steering diodes are for ward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 1, 3, 4 and 6. The negative reference (REF1) is connected at pin 2. This pin should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference (REF2) is connected at pin 5. I/O 1 I/O 2 To Protected IC 1 6 2 5 V CC 3 4 I/O 3 I/O 4 To Protected IC Copyright 214 PN-Silicon Co., Ltd 4 / 5
SOT23-6 Package Outline Drawing D f DIMENSIONS SYM MILLIMETERS INCHES E E1 MIN NOM MAX MIN NOM MAX A.9 1.45.35.57 A1..15..6 e1 A2.9 1.15 1.3.35.45.51 e D 2.8 2.9 3..1.114.122 E 2.8 BSC.1 BSC A1 E1 1.5 1.6 1.75.6.63.69 e 1.9 BSC.75 BSC A2 A e1.95 BSC.37 BSC f.3.5.12.2 Suggested Land Pattern X SYM MILLIMETERS DIMENSIONS INCHES C 2.5.98 C G Z G 1.4.55 P.95.37 Y X.6.24 Y 1..43 P Z 3.6.141 Copyright 214 PN-Silicon Co., Ltd 5 / 5