IT 252 Computer Organization and Architecture Introduction Chia-Chi Teng
What is computer architecture about? Computer architecture is the study of building computer systems. IT 252 is roughly split into four parts. First, we will discusses instruction set architectures the bridge between hardware and software. Second, we introduce more advanced processor implementations. The focus is on pipelining, which is one of the most important ways to improve performance. Next, we talk about memory systems, I/O, and how to connect it all together. We will also introduce you to Assembly and C programming through out the course.
It is interesting. Why should you care? You will learn how a processor actually works! It will help you be a better programmer. Understanding how your program is translated to assembly code lets you reason about correctness and performance. Demystify the seemingly arbitrary (e.g., bus errors, segmentation faults) Many cool jobs require an understanding of computer architecture. The cutting edge is often pushing computers to their limits. Supercomputing, games, portable devices, etc. Computer architecture illustrates many fundamental ideas in all computing discipline. Abstraction, caching, and indirection
Lecturer Prof. Chia-Chi Teng ccteng@byu.edu Office hours Tu 1-2, W 11-12 Or by appointment TA Craig Davis Personnel Course webpage: http://it252.groups.et.byu.net/14fa/it252.php
Administrivia The textbooks provides the most comprehensive coverage "Computer Systems: A Programmer's Perspective" 2nd Edition, by Randal E. Bryant & David R. O'Hallaron The C Programming Language, Kernighan & Ritchie, 2 nd ed. Read the text prior to class class will supplement rather than regurgitate the text Prerequisites CS 142, ECE/CS/IT 124 C++ Linux
Grading Professionalism: Attendance, Attitude, Participation, 5% final grade Homework Usually due on every Friday and Monday, check course website often for detail and update, 25% final grade Quizzes - about 6 8, take home, 10 pts each, 15% final grade Lab reports Due date to be specified by TA, 25% final grade Exams - final and at least one mid-term; usually open-book, take home, untimed 30%
Homework Homework exercises provide added impetus to keep up with the reading. Textbook problems Assignments are listed on course web page by weeks, usually due on Monday of the following week. Turn in: on email or in paper. We really want to encourage discussion, both in class and in lab. But zero tolerance for cheating, don t go there. Don t look for solutions online. 10-13 HW: usually due at midnight on Thursdays (the week after) In paper (to home locker) AND electronically (on gradebook) 5-7 quizzes Take home and grade in class
Labs 10-13 Labs: usually due at noon on Fridays (the week after) Mixtures of Open (software) labs: CTB 365/375 Hardware labs: CTB 335 Cache/VM/IO labs: CTB 365/375 Lab partners
To-Do list Read chapter 1 before Thursday please read the entire course web thoroughly, today Course web is work in progress, please check back often check your email daily keep up with the reading: this week chapter 1 Homework #1, due next week Lab #1, due in 2 weeks, but start now, don t procrastinate Lab #1 is open lab, meaning you just work on your own time You are required to do this lab on the CTB365/375 Linux VM However, it is possible to run compatible VM on your PC while you VPN into the IT network. Just know that if you run into problems, we will not be able to support you.
What is Computer Architecture? It s the study of the of computers Structure: static arrangement of the parts Organization: dynamic interaction of the parts and their control Implementation: design of specific building blocks Performance: behavioral study of the system or of some of its components 9/11/2014 10
Another definition: Instruction Set Architecture (ISA) Architecture is an interface between layers ISA is the interface between hardware and software ISA is what is visible to the programmer (and ISA might be different for OS and applications) ISA consists of: instructions (operations and how they are encoded) information units (size, how they are addressed etc.) registers (or more generally processor state) input-output control 9/11/2014 11
Computer structure: Von Neumann model 1945 CPU Data path + Control Memory hierarchy control ALU I/O Registers PC state Memory bus I/O bus 9/11/2014 12
Computer Organization Organization and architecture often used as synonyms Organization (in this course) refers to: what are the basic blocks of a computer system, more specifically basic blocks of the CPU basic blocks of the memory hierarchy how are the basic blocks designed, controlled, connected? Organization used to be transparent to the ISA. Today more and more of the ISA is exposed to the user/compiler. 9/11/2014 13
Moore s Law In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would double every 18 to 24 months (i.e., grow exponentially with time). Amazingly visionary million transistor/chip barrier was crossed in the 1980 s. 2300 transistors, 1 MHz clock (Intel 4004) - 1971 16 Million transistors (Ultra Sparc III) 42 Million transistors, 2 GHz clock (Intel Xeon) 2001 55 Million transistors, 3 GHz, 130nm technology, 250mm 2 die (Intel Pentium 4) - 2004 140 Million transistors (HP PA-8500) Today: 2.6 Billion transistors (10-core Xeon) http://en.wikipedia.org/wiki/transistor_count
Illustration of Moore s Law
Power Dissipation 9/11/2014 16
Evolution of Intel Microprocessor Speeds 4000 3500 3000 Speed (MHz) 2500 2000 How about today? 1500 1000 500 0 1971 1974 1979 1982 1985 1989 1993 1997 1998 1999 2000 2001 2002 2003 Year 9/11/2014 17
POLL Which type of CPU has the largest worldwide market share? Intel AMD ARM MIPS
Where is the Market? Millions of Computers 1200 1000 800 600 400 200 0 290 93 3 488 114 3 892 135 4 862 129 4 1122 131 5 1998 1999 2000 2001 2002 Embedded Desktop Servers
ISA Type Sales Millions of Processor 1400 1200 1000 800 600 400 200 0 1998 1999 2000 2001 2002 Other SPARC Hitachi SH PowerPC Motorola 68K MIPS IA-32 ARM What s in your cell phone?
Processor Performance Increase Performance (SPEC Int) 10000 Intel Pentium 4/3000 DEC Alpha 21264A/667 DEC Alpha 21264/600 Intel Xeon/2000 1000 DEC Alpha 5/500 DEC Alpha 4/266 DEC Alpha 5/300 100 DEC AXP/500 IBM POWER 100 HP 9000/750 10 IBM RS6000 MIPS M2000 SUN-4/260 MIPS M/120 1 1987 1989 1991 1993 1995 1997 1999 2001 2003 Year
DRAM Capacity Growth 1000000 100000 16M 512M 256M 64M 128M Kbit capacity 10000 1000 100 16K 64K 256K 1M 4M 10 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 Year of introduction
Impacts of Advancing Technology Processor logic capacity: increases about 30% per year performance: 2x every 1.5 years ClockCycle = 1/ClockRate 500 MHz ClockRate = 2 nsec ClockCycle 1 GHz ClockRate = 1 nsec ClockCycle 4 GHz ClockRate = 250 psec ClockCycle Memory DRAM capacity: 4x every 3 years, now 2x every 2 years memory speed: 1.5x every 10 years cost per bit: decreases about 25% per year Disk capacity: increases about 60% per year
Example Machine Organization Typical workstation design target 25% of cost on processor 25% of cost on memory (minimum memory size) Rest on I/O devices, power supplies, box Computer CPU Memory Devices Control Input Datapath Output
PC Motherboard Closeup
Inside the Pentium 4 Processor Chip
Some Computer families Computers that have the same (or very similar) ISA Compatibility of software between various implementations IBM 704, 709, 70xx etc.. From 1955 till 1965 360, 370, 43xx, 33xx From 1965 to the present Power PC DEC PDP-11, VAX From 1970 till 1985 Alpha (now Compaq, now HP) in 1990 s 9/11/2014 27
Intel SUN More computer families Early micros 40xx in early 70 s x86 (086,,486, Pentium, Pentium Pro, Pentium 3, Pentium 4) from 1980 on IA-64 (Itanium) in 2001 Sparc, Ultra Sparc 1985 0n MIPS-SGI Mips 2000, 3000, 4400, 10000 from 1985 on CISC vs RISC Complex Instruction Set vs Reduced Instruction Set What is an instruction? 9/11/2014 28
Where Are We Now? CS142 & IT124 IT252 IT344
Registers Registers are the bricks of the CPU Registers are an essential part of the ISA Visible to the hardware and to the programmer Registers are Used for high speed storage for operands. For example, if variables i,j are in registers ax,cx respectively add ax,cx # i = i + j Easy to name (most computers have limited number of registers visible to the programmer) Used for addressing memory 9/11/2014 30
Registers (ct d) Not all registers are equal Some are special-purpose (e.g. program counter, stack pointer) Some are used for integer and some for floating-point Some have restricted use by convention 9/11/2014 31
Memory system Memory is a hierarchy of devices with faster and more expensive ones closer to CPU Registers Caches (hierarchy: on-chip, off-chip) Main memory (DRAM) Secondary memory (disks) 9/11/2014 CSE378 Gen. Intro 32
Information units Basic unit is the bit (has value 0 or 1) Bits are grouped together in units and operated on together: Byte = 8 bits Word = 2 or 4 bytes Double word = 2 words Etc. Intel: Byte = 8 bits Word = 2 bytes/16 bits Double word (DWORD) = 4 bytes/32 bits Quad word (QWORD) = 8 bytes/64 bits Integer: usually 4 bytes 9/11/2014 CSE378 Gen. Intro 33
Memory addressing Memory is an array of information units Each unit has the same size Each unit has its own address Address of an unit and contents of the unit at that address are different 0 1 2-123 17 0 contents address 9/11/2014 34
Addressing In most of today s computers, the basic unit that can be addressed is a byte. (how many bit is a byte?) MIPS (and pretty much all CPU today) is byte addressable The address space is the set of all memory units that a program can reference The address space is usually tied to the length of the registers Intel 384/486/Pentium has 32-bit registers. Hence its basic address space is 4G bytes MIPS has 32-bit registers. Older micros (minis) had 16-bit registers, hence 64 KB address space (too small) Some current (Intel CoreX, Alpha, Itanium, Sparc, Altheon) machines have 64-bit registers, hence an enormous address space 9/11/2014 35
Addressing words Although machines are byte-addressable, 4 byte integers are the most commonly used units Every 32-bit word starts at an address divisible by 4 int at address 0 int at address 4 int at address 8 9/11/2014 36
Big-endian vs. little-endian Byte order within an int: Memory address 3 int #0 2 1 0 Little-endian (we ll use this) 0 1 2 3 byte int #0 0 1 2 3 Big-endian Little-endian Intel Big-endian Some old CPU Ethernet RS-232 9/11/2014 37
The CPU - Instruction Execution Cycle The CPU executes a program by repeatedly following this cycle 1. Fetch the next instruction, say instruction i 2. Execute instruction i 3. Compute address of the next instruction, say j 4. Go back to step 1 Of course we ll optimize this but it s the basic concept 9/11/2014 38
What s in an instruction? An instruction tells the CPU the operation to be performed via the OPCODE where to find the operands (source and destination) For a given instruction, the ISA specifies what the OPCODE means (semantics) how many operands are required and their types, sizes etc.(syntax) Operand is either register (integer, floating-point, PC) a memory address a constant 9/11/2014 39