Comprehensie Multilayer Substrate Models for Co-Simulation of Power and Signal Integrity Renato Rimolo-Donadio (renato.rimolo@tuhh.de), Xiaomin Duan, Heinz-Dietrich Brüns, Christian Schuster Institut für Technische Uniersität Hamburg-Harburg, Germany TET-IHF Seminar October 30, 2009 Technische Uniersität Hamburg-Harburg
Motiation 2
Motiation Efficient co-simulation of power and signal integrity relying on physics-based ia and trace models R. Rimolo-Donadio, X. Duan, H.-D. Brüns, and C. Schuster, Comprehensie multilayer substrate models for cosimulation of power and signal integrity, in Proceedings 42th International Symposium on Microelectronics IMAPS, San Jose, California, USA, 3-5 Noember, 2009. 3
Content Modeling Approach Study Case Validation against Full-Wae Simulation Via Array Design Example Conclusions & Outlook 4
Content Modeling Approach Study Case Validation against Full-Wae Simulation Via Array Design Example Conclusions & Outlook 5
Physics-Based Models Quasi-analytical representations in terms of microwae network parameters for the main interconnect elements. Partitioning approach allows the utilization of concise model building blocks Insight into the main physical mechanisms and their contribution Most model components can be computed using analytical / quasi-analytical formulae High numerical efficiency Models suitable for fast prototyping and optimization studies 6
Modeling Approach Caity Multilayer Substrate Cross-Section Example 7
Model Components Caity Parallel-Plate Impedance Via-Plane Capacitances Transmission Line Model C Z tl 8
Parallel-Plate Impedance Model propagating modes inside the caity ( computed with e.g. caity resonator model) i i i = pp -1 + pp pp pp + pp i = ui li ; i i = i ui = -i li Expanded pp Matrix 9
Trace Model and Modal Decomposition Transmission Line Model h ui Z h T tl Z tl T li Modal Transformation A. E. Engin, et al. Modeling of striplines between a power and a ground plane, IEEE Trans. Ad. Packag., ol. 29, no. 3, pp. 415 426, Aug. 06 k i = h ui hli + h li Z tl = tl -1 + pp pp pp + pp k + tl 0 0 ( k2 + k) + tl ( k + 1) tl ( k2 + k) tl ( k2 + k) tl ( k2 + k) tl 10
Via-Plane Capacitance C C T Transmission Line Model Z tl Z tl T C Approximation of the fringing fields in the antipad region Connectiity for power ias C C C u 0 0 l + + pp pp pp k + tl + pp 0 0 ( k2 + k) + tl ( k + 1) tl ( k2 + k) tl ( k2 + k) tl ( k2 + k) tl 11
12 Stand-alone Model for a Single Caity C Z tl T Z tl T C C C C C u1 u1 i u 2 u 2 i u3 u3 i l1 l1 i 2 l 2 l i 3 l l3 i u u I V l l I V + + + + + + + + + + = l u pp pp pp pp l u l u V V tl k k tl k k tl k k tl k k tl k 0 0 tl k 0 0 I I ) 2 ( ) 2 ( ) 2 ( ) 2 ( 1) (
Multilayer Substrate Model Decap L interc. Decoupling capacitor model Port 1 Port n Z tl Caity representation S-Parameter Matrix Z tl Caity representation Caities joined by segmentation techniques R. Rimolo-Donadio et al., Physics-based ia and trace models for efficient link simulation on multilayer structures up to 40 GHz, IEEE Trans. Microw. Theory and Techn., ol. 57, no. 8, p.p. 2072-2083, August 2009. 13
Content Modeling Approach Study Case Validation against Full-Wae Simulation Via Array Design Example Conclusions & Outlook 14
Study Case Δ Δ Port 9 0.6 inch Signal ia Power ia Ground ia Port 1 Port 2 Port 3 Port 4 0.6 inch Traces in caity 3 Traces in caity 2 0.8 inch 2 inch Port 8 Port 7 Port 6 Port 5 Port 10 Perfect magnetic conductor (PMC) at board edges 1 inch Via pitch Δ = 50 mil Via radius = 5 mil Antipad radius = 15 mil 1 mil = 0.001 inch 25.4 μm 20 mil coaxial extension for ports Signal ia Power ia Ground ia Ground planes Power plane Ground planes Caity 2 Caity 3 d d = 12 mil ε r = 3.8 tanδ = 0.03 Metallic regions modeled as PEC Via open end 15
Content Modeling Approach Study Case Validation against Full-Wae Simulation Via Array Design Example Conclusions & Outlook 16
Power and Signal Nets Interaction Signal Power Port Interaction Frequency [GHz] Signal Signal Port Interaction Frequency [GHz] 17
Power and Signal Nets Interaction Signal Power Port Interaction Signal Signal Port Interaction Input: 1-V 100-ps full-widthhalf-maximum Gaussian pulse 18
Common-Mode s Differential Signal Power Port Interaction 19
Content Modeling Approach Study Case Validation against Full-Wae Simulation Via Array Design Example Conclusions & Outlook 20
Via Array Configurations Via Array Prototyping Case I Case II Case III Case IV Case V Simulation Time (200 freqs) 9 s (16 ias) 12 s (20 ias) 21 s (28 ias) 40 s (42 ias) 180 s (90 ias) Full-Wae > 40 h (3.0 GHz CPU, 32-bit PC, 4GB RAM ) 21
Single-Ended Crosstalk I Case V shows similar crosstalk with respect to case IV (same local configuration) Crosstalk reduction achieed mainly with nearest neighboring ground ias 22
Single-Ended Crosstalk II Case II, IV, V show similar crosstalk leel Crosstalk reduction achieed mainly with nearest neighboring ground ias 23
Surface Decoupling Capacitors Decap : ESR = 100 mω, ESL+L int = 2 nh, C = 10nF Many capacitors are required to reduce L and to increase C, but it is difficult to achiee an effectie decoupling in the GHz range with surface capacitors for multilayer structures. 24
Content Modeling Approach Study Case Validation against Full-Wae Simulation Example of Via Array Design Conclusions & Outlook 25
Conclusions & Outlook Efficient physics-based models for simulation of multilayer substrates hae been presented (oer three orders of magnitude faster in comparison to full-wae simulations) Approach is suitable for efficient co-simulation of power and signal integrity. Future Work: - Explore model limitations and potential improements (e.g. discontinuities such as split planes, ery dense arrays) - Application of the method for structures with a ery large number of elements and comparison to other hybrid solers. 26
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