CSc 256 Final Spring 2011 NAME: Problem1: Convertthedecimalfloatingpointnumber 4.3toa32 bitfloat(inbinary)inieee 754standardrepresentation.Showworkforpartialcredit.10points Hint:IEEE754formatfor32 bitfloatsconsistsofs E F,whereSisaone bitsign bit,eisan8 bitbias 127exponent,andFisa23 bitfraction,and isthe concatenationoperator. ANS:.3*2=.6.6*2=1.2.2*2=.4.4*2=.8.8*2=1.6 4.3= 100.0100110011001 = 1.000100110011001 *2^2 e=2 E=127+2=129 S=1 F=00010011001100110011010 4.3=11000000100010011001100110011010
Problem2:Considerthe5 stagemipspipelinediscussedinclass.20points a)forar typeinstructionliststheoperation(s)performedineachstage,forallfive stages,inorder. IF:fetchinstructionfrommemoryMEM[PC] ID:readrs,rt,generatecontrolsignals EX:computeresult=rsoprt MEM: WB:rd=result b)supposethedelaytimesforthefivestages,fromstarttofinish,arerespectively 200ps,300ps,300ps,400ps,and250ps.Whatisthecycletimeforthepipeline? 400ps c)whatistheclockrateofthepipelineinmhz?youdon thavetogiveasingle numberasyouranswer;justshowanexpressionthatwillevaluatetotheanswer. Clockrate=1/(400*10^ 12)Hz=10^12/400Hz=10^6/400MHz
Problem3(30points) TranslatethisC/C++functionintoMIPSassemblylanguage.arg0 arg2arein$a0 $a2respectively.theresultisreturnedin$f0. func()callsthefunctionhash()withthefollowingprototype: floathash(intarg0); arg0isin$a0,thereturnvalueisin$f31.youdon'thavetowritethefunction hash(). Makesureyourcodeisefficient;pointswillbedeductedforobviousinefficiencies. YoumustfollowallMIPSregisteruseconventions.Youmayuseanyfloatingpoint registers;don'tworryaboutsaving/restoringfloatingpointregisters. float func(int arg0, int arg1, float *arg2) { float temp; int i; temp = arg2[arg1]; for (i=arg0; i>=0; i--) { } temp = temp + hash(i); if (arg2[i] + arg2[i-1] > temp) break; return temp; }
ANS: # temp $f0 # i $s0 # copy of arg2 $s2 func: sw $31, -4($sp) sw $s0, -8($sp) sw $s2, -12($sp) addi $sp, $sp, -12 move $s2, $a2 sll $t0, $a1, 2 # temp = arg2[arg1]; add $t0, $t0, $a2 l.s $f0, ($t0) li $s0, $a0 # for (i=arg0; i>=0; i--) { blt $s0, $0, exit for: move $a0, $s0 # temp = temp + hash(i); jal hash add.s $f0, $f0, $f31 sll $t0, $s0, 2 # if (arg2[i] + arg2[i-1] > temp) add $t0, $t0, $s2 l.s $f1, ($t0) l.s $f2, -4($t0) add.s $f1, $f2, $f1 c.gt.s $f1, $f0 bc1t exit # break; addi $s0, s0, -1 bge $s0, $0, for # } # return temp; # if you used a different register for temp, # say $f1, you'll need a mov.s $f0, $f1 here addi $sp, $sp, 12 lw $31, -4($sp) lw $s0, -8($sp) lw $s2, -12($sp) jr $31
Problem4(20points) Considera1KBdirect mappedcache,with16 byteblocks,with32 bitmemory addresses. a)showhowamemoryaddressisdividedintotag,index,andoffset.beclearabout howmanybitsareineachfield,andhoweachfieldispositionedwithinthememory address. Offsetis4bits #blocks=1k/16=64=2^6 indexis6bits tagis32 6 4=22bits address=tag index offset b)forthecacheinparta,howmanytotalbitsareinthecache?showworkfor partialcredit. Eachcacheblockcontainsvalidbit,tag(22bits),anddata(16*8bits) Totalbits=64*(1+22+128) c)suppose we have a 32 KB 4-way set associative cache with 8-byte blocks. Showhow amemoryaddressisdividedintotag,index,andoffset.beclearabouthowmany bitsareineachfield,andhoweachfieldispositionedwithinthememoryaddress. Offsetis3bits #sets=32k/(8*4)=1k=2^10 indexis10bits tagis32 10 3=19bits address=tag index offset
Shortquestions(20points) 1)Onaninterrupt/exception,whatdoestheMIPSinterrupthandlersoftwaredo? Print exception code Return to user program 2) What memory technology is usually used for main memory? What memory technology is usually used for caches? DRAM for main memory SRAM for caches
3) Calcuate the average rotational latency in milliseconds for a 4000 rpm disk. You don t have to give a single number as the answer; just show an expression that will evaluate to it. 1 rotation takes 1 / (4000) minutes = 60/4000 seconds = 60 * 1000 / 4000 ms average rotational latency in ms =.5 * 60 / 4 = 15/2 ms 4) Trace this x86 assembly language fragment. Suppose %eax contains 3 and %ebx contains 5. Show the contents of %ebx when the label "end" is reached. movl $2, (%esp) subl (%esp), %eax cmpl %eax, %ebx jle go addl (%esp),%ebx jmp end go: subl (%esp),%ebx end: ANS: 7 Trace: movl $2, (%esp) # MEM[%esp] = 2 subl (%esp), %eax # %eax = %eax MEM[%esp] = 3 2= 1 cmpl %eax, %ebx # if %ebx <= %eax false jle go addl (%esp),%ebx # %ebx = %ebx + MEM[%esp] = 5+2=7 jmp end go: subl (%esp),%ebx
MIPSinstructions op1,op2areregisters,op3isregisterorconstant cont[op1]meanscontentsofop1 moveop1,op2 cont[op1]=cont[op2] addop1,op2,op3 cont[op1]=cont[op2]+cont[op3] subop1,op2,op3 cont[op1]=cont[op2] cont[op3] mulop1,op2,op3 cont[op1]=cont[op2]*cont[op3] divop1,op2,op3 cont[op1]=cont[op2]/cont[op3] remop1,op2,op3 cont[op1]=cont[op2]%cont[op3] notop1,op2 cont[op1]=notcont[op2](bitwise) andop1,op2,op3 cont[op1]=cont[op2]andcont[op3](bitwise) orop1,op2,op3 cont[op1]=cont[op2]orcont[op3](bitwise) nandop1,op2,op3 cont[op1]=cont[op2]nandcont[op3](bitwise) norop1,op2,op3 cont[op1]=cont[op2]norcont[op3](bitwise) xorop1,op2,op3 cont[op1]=cont[op2]xorcont[op3](bitwise) sllop1,op2,amt cont[op1]=cont[op2]shiftleftlogical byamtbits srlop1,op2,amt cont[op1]=cont[op2]shiftrightlogical byamtbits sraop1,op2,amt cont[op1]=cont[op2]shiftrightarithmetic byamtbits rolop1,op2,amt cont[op1]=cont[op2]rotateleftbyamtbits rorop1,op2,amt cont[op1]=cont[op2]rotaterightbyamtbits blabel gotolabel jlabel gotolabel beqop1,op2,label if(cont[op1]==cont[op2])gotolabel bneop1,op2,label if(cont[op1]!=cont[op2])gotolabel bgtop1,op2,label if(cont[op1]>cont[op2])gotolabel bgeop1,op2,label if(cont[op1]>=cont[op2])gotolabel bltop1,op2,label if(cont[op1]<cont[op2])gotolabel bleop1,op2,label if(cont[op1]<=cont[op2])gotolabel beqzop1,label if(cont[op1]==0)gotolabel bnezop1,label if(cont[op1]!=0)gotolabel bgtzop1,label if(cont[op1]>0)gotolabel bgezop1,label if(cont[op1]>=0)gotolabel bltzop1,label if(cont[op1]<0)gotolabel blezop1,label if(cont[op1]<=0)gotolabel lar,label cont[r]=addressoflabel lir,constant cont[r]=constant lwr,?? cont[r]=m[addr] lbr,?? cont[r]=m[addr],sign extended
lbur,?? cont[r]=m[addr],zero extended swr,?? M[ADDR]=cont[R] sbr,?? m[addr]=low8 bitsofcont[r] if??isalabel,addr=addressoflabel if??is(r),addr=cont[r] if??isconstant(r),addr=cont[r]+constant if??islabel(r),addr=cont[r]+addressoflabel mtc0op1,op2 contentsofcoprocessor0registerop1= contentsofmipsregisterop2 mfc0op1,op2 contentsofmipsregisterop1= contentsofcoprocessor0registerop2 Syscallusage: printanint $v0=1,$a0=inttobeprinted printastring $v0=4,$a0=addressofstringtobeprinted readanint $v0=5,inputintappearsin$v0 exit $v0=10 MIPSregisternames: $0 $1 $2,$3 $v0,$v1 $4 $7 $a0 $a3 $8 $15 $t0 $t7 $16 $23 $s0 $s7 $24 $25 $t8 $t9 $26 $27 $k0 $k1 $28 $gp $29 $sp $30 $s8 $31 $ra
0000 00ss ssst tttt dddd d000 0010 0000 add rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0010 sub rd,rs,rt 0000 00ss ssst tttt 0000 0000 0001 1000 mult rs,rt 0000 00ss ssst tttt 0000 0000 0001 1010 div rs,rt 0000 00ss ssst tttt dddd d000 0010 0001 addu rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0011 subu rd,rs,rt 0000 00ss ssst tttt 0000 0000 0001 1001 multu rs,rt 0000 00ss ssst tttt 0000 0000 0001 1011 divu rs,rt 0000 0000 0000 0000 dddd d000 0001 0000 mfhi rd 0000 00ss sss0 0000 0000 0000 0001 0001 mthi rs 0000 0000 0000 0000 dddd d000 0001 0010 mflo rd 0000 00ss sss0 0000 0000 0000 0001 0011 mtlo rs 0000 00ss ssst tttt dddd d000 0010 0100 and rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0111 nor rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0101 or rd,rs,rt 0000 00ss ssst tttt dddd d000 0010 0110 xor rd,rs,rt 0000 00ss ssst tttt dddd d000 0000 0100 sllv rd,rt,rs 0000 00ss ssst tttt dddd d000 0000 0110 srlv rd,rt,rs 0000 00ss ssst tttt dddd d000 0000 0111 srav rd,rt,rs 0010 00ss ssst tttt iiii iiii iiii iiii addi rt,rs,i 0010 01ss ssst tttt iiii iiii iiii iiii addiu rt,rs,i 0011 00ss ssst tttt iiii iiii iiii iiii andi rt,rs,i 0011 1100 000t tttt iiii iiii iiii iiii lui rt,i 0011 01ss ssst tttt iiii iiii iiii iii ori rt,rs,i 0011 10ss ssst tttt iiii iiii iiii iiii xori rt,rs,i 0000 0000 000t tttt dddd diii ii00 0000 sll rd,rt,i 0000 0000 000t tttt dddd diii ii00 0010 srl rd,rt,i 0000 0000 000t tttt dddd diii ii00 0011 sra rd,rt,i 1000 11bb bbbt tttt iiii iiii iiii iiii lw rt,i(rb) 1000 00bb bbbt tttt iiii iiii iiii iiii lb rt,i(rb) 1001 00bb bbbt tttt iiii iiii iiii iiii lbu rt,i(rb) 1010 11bb bbbt tttt iiii iiii iiii iiii sw rt,i(rb) 1010 00bb bbbt tttt iiii iiii iiii iiii sb rt,i(rb) 0000 01ss sss0 0000 iiii iiii iiii iiii bltz rs,i 0000 01ss sss0 0001 iiii iiii iiii iiii bgez rs,i 0001 10ss sss0 0000 iiii iiii iiii iiii blez rs,i 0001 11ss sss0 0000 iiii iiii iiii iiii bgtz rs,i 0001 00ss ssst tttt iiii iiii iiii iiii beq rs,rt,i
0001 01ss ssst tttt iiii iiii iiii iiii bne rs,rt,i 0000 00ss ssst tttt dddd d000 0010 1010 slt rd,rs,rt 0010 10ss ssst tttt iiii iiii iiii iiii slti rt,rs,i 0000 10ii iiii iiii iiii iiii iiii iiii j I 0000 00ss sss0 0000 0000 0000 0000 1000 jr rs 0000 11ii iiii iiii iiii iiii iiii iiii jal I 0000 00ss sss0 0000 dddd d000 0000 1001 jalr rd,rs 0000 0000 0000 0000 0000 0000 0000 1100 syscall
Floating point registers: $f0 to $f31 Floating point load/stores: l.s Ft, ADDR [Ft is any FP register ADDR specified in three ways, like lw] Ft = 32-bit float at MEM[ADDR] s.s Ft, ADDR [Ft is any FP register ADDR specified in three ways, like lw] 32-bit float at MEM[ADDR] = Ft Floating point arithmetic: [Fd, Fs, Ft are any FP registers] add.s Fd, Fs, Ft Fd = Fs + Ft sub.s Fd, Fs, Ft Fd = Fs - Ft mul.s Fd, Fs, Ft Fd = Fs * Ft div.s Fd, Fs, Ft Fd = Fs / Ft Floating point compare and branch: c.lt.s Fs, Ft if (Fs < Ft) FP cond bit = 1 else FP cond bit = 0 c.gt.s Fs, Ft if (Fs > Ft) FP cond bit = 1 else FP cond bit = 0 c.eq.s Fs, Ft if (Fs == Ft) FP cond bit = 1 else FP cond bit = 0 c.ne.s Fs, Ft if (Fs!=Ft) FP cond bit = 1 else FP cond bit = 0 c.le.s Fs, Ft if (Fs <= Ft) FP cond bit = 1 else FP cond bit = 0 c.ge.s Fs, Ft if (Fs >= Ft) FP cond bit = 1 else FP cond bit = 0 bc1t label if (FP cond bit==1) go to label bc1f label if (FP cond bit==0) go to label
x86 assembly language syntax registers have prefix % constants have prefix $ %esp is stack pointer, points to top item in stack an operand can take one of four formats: constant e.g. $4 register e.g. %eax (register) e.g. (%eax) constant(register) e.g. 4(%esp) [instructions ending with l move 32-bit quantities] movl op1,op2 contents of op2 = contents of op1 pushl op push contents of op on the stack popl op pop top of stack into contents of op addl op1,op2 contents of op2 = contents of op2 + contents of op1 subl op1,op2 contents of op2 = contents of op2 - contents of op1 imull op1,op2 contents of op2 = contents of op2 * contents of op1 incl op contents of op2 = contents of op2 + 1 decl op contents of op2 = contents of op2-1 cmpl op1, op2 set condition codes according to result of (op2 - op1) je jump if == jne jump if!= jg jump if > jge jump if >= je jump if == jne jump if!= jl jump if < jle jump if <= jmp jump always jz jump if == 0 jnz jump if!= 0 call label label ret return address pushed on stack, jump to return address popped off top of stack