Von Neumann Architecture Single processor is used Each instruction in a program follows a linear sequence of fetch decode execute cycle Program and data are held in same main memory Stored program Concept Both the instructions (program) and the data on which the instructions were to be carried out are held in a single storage (main memory). Registers Registers are storage unit that operate at very high speed. General purpose Vs Special purpose registers Special Purpose Registers These registers have specific control and data handling task to carry out. They are designed to carry out a specific role and each of them are given a name. General purpose registers These are memory units within the CPU designed to hold temporary data. Few special purposes registers are Program Counter It stores address of next instruction to be fetched. It is normal for the value in PC to be incremented every time an instruction is accessed. Memory Data Register It stores contents fetched from memory and data needs to be loaded in memory. Memory Address Register It stores address of the data in memory to be fetched/stored. CIR(Current Instruction Register) It holds the instruction that is about to be executed. Index Register: It is used for modifying operand addresses during the run of a program. Status Register: It is processor circuit, without address, that contains information about the state of the processor. A status register can be set, equal to the number 1, or cleared, equal to the number 0. ALU (arithmetic Logic Unit) It is circuit that performs arithmetic calculations & logical operations. Control unit (CU): It fetches instructions from memory, decodes them and synchronizes the operations before sending signals to other ports of the computer using control bus.
System Clock: A clock tick is the smallest unit of time in which processing happens, and is sometimes called a cycle. It is measured in MHz or millions of cycles per second. BUS A bus is a group of wires in parallel that acts as an electrical pathway along which data can travel. Different types of bus are: Data bus: It is used to carry data. It is bi directional. It ahs MDR at one end can travel data to from processor. Address bus: It sends address values in only one direction (from processor to memory) Control Bus: It send control signal from control unit to other components. Separate wire is dedicated to particular control signal. E.g: Read/write operation Reset button pressed Bus width & clock speed as factors of the computer system: Bus Width: The size of bus( number of wires making up a bus), known as its width is important because it determines how much data can be transmitted at one time. For e.g:, a 16 bit bus can transmit 16 bit sof data, whereas a 32 bit bus can transmit 32 bits of data. Suppose our processor can understand 32 bit word at a time bus the bus sending words from memory to processor is only 8 bits wide. Then it would involve 4 chunks of data to be sent along the data bus before a processor will have complete word for execution. Clock Speed: It refers to thenumber of ycles that are performed by the CPU per second. With a faster clock speed the processor would be forced to perform more instructions per second. e.g: A clock speed of 800MHz is twice as fast as a clock speed of 400MHz. Port A port serves as an interface between the computer and other computers or peripheral devices. On physical layer computer port is specialized outlet on a piece of equipment to which a plug or cable connect. Electrically, it provides a method to transfer signals between devices. e.g: to connect monitor, webcam, speakers, etc. 1.4.2 The fetch execute cycle The following is an algorithm that shows the steps in the cycle. At the end, the cycle is reset and the algorithm repeated. 1. Load the address that is in the program counter (PC) into the memory address register (MAR). 2. Increment the PC by 1. 3. Load the instruction that is in the memory address given by the MAR into the memory data register (MDR). 4. Load the instruction that is now in the MDR into the current instruction register (CIR).
5. Decode the instruction that is in the CIR. 6. If the instruction is a jump instruction then a. Load the address part of the instruction into the PC b. Reset by going to step 1. 7. Execute the instruction. 8. Reset by going to step 1. Steps 1 to 4 are the fetch part of the cycle. Steps 5 are decode part of the cycle. Steps 6(a) and 7 are the execute part of the cycle and steps 6b and 8 are the reset part. Fetch cycle: Step 1 simply places the address of the next instruction into the memory address register so that the control unit can fetch the instruction from the right part of the memory. The program counter is then incremented by 1 so that it contains the address of the next instruction, assuming that the instructions are in consecutive locations. Now the content of address in MAR is copied from memory into the MDR and is then copied into the current instruction register. Decode Cycle: Now that the instruction has been fetched the control unit can decode it and decide what has to be done on the basis of opcode and operand part. Execute Cycle: This is the execute part of the cycle. If it is an arithmetic instruction, this can be executed and the cycle restarted as the PC contains the address of the next instruction in order. However, if the instruction involves jumping to an instruction that is not the next one in order, the PC has to be loaded with the address of the instruction that is to be executed next. This address is in the address part of the current instruction, hence the address part is loaded into the PC before the cycle is reset and starts all over again. Register Transfer notation It is formal means of describing machine structure & function. It Can be used to describe what a machine does without describing how the machine does it. The operations executed on data stored in registers are called microoperations. A microoperation is an elementary operation performed on the information stored in one or more registers The symbolic notation used to represent microoperation is called a register transfer Notation Few basic and simple conventions for Register Transfer Notation are as follows: Register names (ACC, PC, MAR, MDR) or R1,R2..Rn are used to represent the registers. [ ] represents contents of. Memory is represented as the array M. M[100] represents memory location 100. The assignment operator moves a value from the location on the right hand side to the location on the left hand side. e.g: R2 R1 Information transfer from one register to another P:R2 R1 where P is a control function that can be either 0 or 1 Register transfer Notation for fetch decode execute cycle
1. MAR [PC] load contents of PC in MAR 2. PC [PC] + 1 increment value of PC 3. MBR [[MAR]] or MBR M[MAR] load contents of address in MAR in MBR 4. CIR [MBR] load contents of MBR in CIR 5. DECODE 6. EXECUTE 7. RESET Goto Step 1 Describe how interrupts are handled Definition: Interrupts are signals generated by hardware or software to get the processor s attention. The processor processes program instructions stored in the memory. It fetches instructions one after the other and executes them. If a problem occurs (anywhere in the system) while the processor is busy processing, the processor must respond to the problem as soon as possible in order to avoid damage to data and/or hardware. This requires the processor to stop whatever it is doing and give its attention to the problem. The device (hardware) or software, where the problem has occurred generates a signal, called an interrupt to get processor s attention. There are several methods of servicing Interrupts. One method is to store an interrupt in a queue as it is generated. The queue is then processed in FIFO (First In, First Out) order. Priority is not important in this method. Another method is to have queues of different priorities and store each interrupt according to its priority in the related queue. The interrupts in the high priority queue are given more importance and are serviced first. The processor services or attends to the interrupts in the following manner: The processor stops the execution of the program and attends to the interrupt in the following manner: The processor finishes executing the current instruction. The processor saves the contents of the special registers that hold vital information about the program being executed. The processor then checks the Interrupt Queue to see which interrupt is there and attempts to service the interrupt. If there are more than one interrupts in the queue, they are serviced in order of their priority. After the interrupt queue is empty, the processor reloads the saved contents of the special registers and continues the execution of the program from where it was interrupted.
1.4.3 The processor s instruction set show understanding that the set of instructions are grouped into instructions for: 200 IN 201 ADD 206 202 CMP 50 203 JAE 210 204 JB 220 205 OUT 206 25 IN is input instruction that stores input character into accumulator ADD 206 This instruction performs arithmetic operation. It adds data in address 206 with data in accumulator. While execution, since operand part is address, it is copied in MAR. Contents of address 206, i.e. 25, is copied to MBR and finally added with contents of accumulator. CMP #50 This instruction is compare instruction. It compares contents of accumulator with number 50 JAE 210 It is conditional jump instruction. Its meaning is to goto address 210 if above condition is above or equals to 50
JB 220 It is conditional jump instruction. Its meaning is to goto address 220 if above condition is below 50. modes of addressing: immediate, direct, indirect, indexed, relative Immediate addressing There is no address as such involved. The operand is an actual number. Consider the assembly language instruction: LDM #35 This instruction means to load actual value 35 to accumulator. Hash symbol is used to clarify that this is an immediate value although this is already clear from the LDM mnemonic. Direct addressing Operand part of instruction is not immediate value, but it is address. e.g: LDD 158 This instruction means copy contents of memory address 158 to the accumulator. Indirect Addressing With this type of addressing, the address of the data in memory is held in another memory location, and the operand of the instruction holds the address of this memory location. It means that the address to be used is at the given address. E.g: LDI 158 This instruction means goto address 158, the contents of address 155 is forwarding address, now finally goto this forwarding address and load contents of it in accumulator. Indexed addressing: This assumes that the processor has a special purpose register called the Index Register (IR). Here address to be accessed in memory is calculated by adding operand address of instruction with address held in index register. Relative addressing This type of addressing is often used in branch instructions to specify where the next instruction is located relative to the instruction whose address is held in the PC. e.g: LDR +95 This instruction means copy contents of the memory address 95 locations further on from the location containing this instruction. Workout value of accumulator from the following diagram as per the instructions in the questions followed. a) LDD 101 b) LDI 101 c) LDX 101, where IR is 0000 0100
d) LDR +5, if previous instruction was as in c).