In-System Circuits for AT1 Series Configurators with Atmel and Xilinx s Atmel AT1 (1) series configurators use a simple serial-access procedure to configure one or more Field Programmable Gate Arrays (s) or Field Programmable System Level Integrated Circuits (FPSLIC ) devices. This application note provides the circuits used to program Atmel and Xilinx s with an AT1 series configurator. To perform In-System (ISP), a cable is required in order to provide communication between the programmer and the configurator, see Figure 1 and Figure. Figure 1. ATDH00E In-System Parallel -pin Ribbon Target System AT1 Series Configuration Memory Application Note Parallel Port PC DB-M DB-F ATDH00E In-System Connector Header AT1 Series Device 1. AT1=AT1F/LVXXX AT1A=AT1F/LVXXXA Note: AT1N and AT1A series configurators are not recommended for the ISP circuits in this document. Rev. 1
Figure. ATDH In-System -pin Ribbon Target System PC ATDH Dongle In-System Connector Header AT1 Series Device Figure 3. In-System of AT1LVXXX Series Devices for ATK Applications VCC REBOOT CS ATK D<0> C CON AT1LVXXX Series Device Note: 1. Reset polarity level of the configurator must be set to active High (RESET/OE) by a programmer.. AT1F series configurator s reset polarity level is permanently set to Low, so it can not be used in this circuit. ISP Circuits for Atmel and Xilinx s
ISP Circuits for Atmel and Xilinx s Figure. In-System of AT1 Series Devices for AT0K and ATK FPSLIC Applications (3) VCC RESET AT0K, ATK RESET M1 () 0 C CON INIT AT1 Series Device READY () Note: 1. Reset polarity level of the configurator must be set to active Low (RESET/OE) by a programmer if an AT1LVXXX series configurator is used.. Use of the READY pin is optional. 3. This circuit does not apply to AT1LV00 devices unless a external pull-up resistor is connected to the A pin and the A bit level is set to active High in the programming software.. M1 is not available on ATK devices.. The A bit level must set to High in the ISP programming software if an AT1FXXX series configurator is used. Otherwise, the A bit level must be set to Low.. ATFSXXX series configurators can be used in this circuit for ATK 0FSLIC applications. 3
Figure. In-System of AT1 Series Devices for Xilinx/Lattice Applications () VCC PROGRAM ORCA,VIRTEX-II, VIRTEX-E, VIRTEX, SPARTAN, SPARTAN II, XC000, XC000, XC3000 PROGRAM () M1 DIN C DONE (3) INIT AT1 Series Device READY () Notes: 1. Reset polarity level of the configurator must be set to active Low (RESET/OE) by an ISP programmer if an AT1LVXXX series configurator is used.. Use of the READY pin is optional. 3. A 330Ω external pull-up resistor on the DONE pin is required for Virtex and Virtex-II s. Xilinx s can use LDC instead of the DONE pin.. This circuit does not apply to AT1LV00 devices unless a external pull-up resistor is connected to the A pin and the A bit level is set to active High in the programming software.. Xilinx s can use RESET instead of the PROGRAM pin. ORCA s can use PRGM instead of the PROGRAM pin.. The A bit level must be set to High in the ISP programming software if an AT1FXXX series configurator is used. Otherwise, the A bit level in the ISP programming software must be set to Low. ISP Circuits for Atmel and Xilinx s
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