The Benefits of FPGA-Enabled Instruments in RF and Communications Test Johan Olsson National Instruments Sweden AB 1
Agenda Introduction to FPGAs in test New FPGA-enabled test applications FPGA for test hardware Using FPGA instruments in test applications 2
Software-Defined Test System Architecture Standard Virtual Instrumentation Model NI LabVIEW Software Driver Bus Interface and I/O Control Hardware Measurement Analog or Digital Front End 10011011 3
FPGA-Based Test System Architecture Open FPGA System Model Bus Interface/ Programmable FPGA Measurement Analog or Digital Front End LabVIEW Software Driver NI Hardware System intelligence and decision making can be moved from software to hardware 4
Benefits of FPGAs in Test Systems High Reliability Designs implemented in hardware Low Latency Run algorithms at deterministic rates down to 5 ns Reconfigurable Create DUT / application-specific personalities High Performance Computational abilities open new possibilities for measurement and data processing speed True Parallelism Enables parallel tasks and pipelining, reducing test times 5
New FPGA-enabled test applications 6
RFID Testing Response-Stimulus RFID Reader (Emulated) RFID Tag (DUT) Stimulus Response 7
RFID Testing Response-Stimulus Testing an RFID tag requires emulating the tag reader Interrogates and responds to tag within microseconds Coding/decoding, modulation/demodulation, and decision making must be completed in hardware to meet timing Closed-Loop Test 8
Real-time spectral measurements Processing RF 9
A Simple Digital Protocol: I 2 C 010ZZ01 Pattern Generator SDA SCL Integrated Circuit 0101101 Logic Analyzer Traditional Approach Static stimulus and expected responses Difficult to accommodate multiple clock domains 10
A Simple Digital Protocol: I 2 C Address, Data, Address, Receive Protocol-Aware Tester Response Data SDA SCL Protocols Integrated Circuit Protocol-Aware Approach Intelligence built into the tester Accommodates wait cycles Easy to cross clock domains Test with high-level commands Real-world scenario Inherently easier to program 11
Test System Control Transfer of system timing and decision making from software to hardware PXI Data or Trigger Bus Instrument Controller (SMC) System Controller (FPGA) Instrument Controller (SMC) ADC Digital Communication DAC DUT
FPGA for Test Hardware 13
National Instruments FlexRIO PXI NI FlexRIO Adapter Module Interchangeable I/O Customizable by users Adapter Module Development Kit (MDK) NI FlexRIO FPGA Module Virtex-5 FPGA 132 digital I/O lines 128 MB of DDR2 DRAM PXI Platform Synchronization Clocking/triggers Power/cooling Data streaming 14
NI FlexRIO FPGA Modules for PXI Virtex-5 FPGA LX30, LX50, LX85, LX110 Direct access to FPGA I/O 132 single-ended lines or 66 differential pairs 400 Mbps single-ended 1 Gbps differential 128 MB onboard DRAM 2x 64 MB banks 800 MB/s per bank Adapter module required for IO 15
NI 6581 High-Speed Digital Adapter Module 100 MHz digital I/O 54 single-ended channels Selectable voltage levels 1.8, 2.5, 3.3 V (5 V compatible) External DIO voltage reference 1.8 to 5.5 V Configurable by connector NI 6581 16
NI 6585 200 MHz LVDS Digital Instrument 200 MHz digital I/O 32 / 42 LVDS channels 200 Mbps SDR, 300 Mbps DDR PXI-6585R 17
NI FlexRIO Partner Modules Gigabit Ethernet interfaces MAC and Ethernet frames Fault-injection software Camera Link Interface High-speed image processing Low-latency control IEEE-1394b interface 3 ports at 800 Mbps 100 MHz vector digital I/O 8 ch. per-pin PMU 18
NI PXIe-5641R RIO IF Transceiver 2 IF Inputs and 2 IF Outputs 14-bit ADCs and DACs 20 MHz Instantaneous Bandwidth (25 MS/s I/Q) IFs from 250 khz to 80 MHz Xilinx Virtex-5 SX95T LabVIEW-programmable FPGA 19
How these instruments fit into test applications 20
RFID Testing Response-Stimulus FPGA on PXIe-5641R IF Transceiver can perform necessary processing Upconverterand downconvertercondition the signal for the correct RF frequency of the tag RFID Tag PXI-5610 Upconverter PXI-5600 Downconverter 21
A Real-Time Spectrum Analyzer 22
A Simple Digital Example: I 2 C Address, Data, Address, Receive Protocol-Aware Tester SDA SCL Integrated Circuit Response Data Protocol-Aware Approach Intelligence built into the tester Accommodates wait cycles Easy to cross clock domains Test with high-level commands Real-world scenario Inherently easier to program 23
Digital Filter LabVIEW FPGA Implementation I/O Node FIFO IP Integratio n Node FIFO FIFO FIFO I/O Node 24
NIWeek 2009 Case Study LTE Base Station Emulator Prototype NI PXIe-8108 Real-Time Dual-Core Controller NI PXIe-5641R IF Transceiver NI PXI-5610 2.7 GHz RF Upconverter LTE PHY Base Station Transmitter f c f c Device Under Test Higher-Layer SW and Link Control LTE PHY Base Station Receiver NI PXI-5600 2.7 GHz RF Downconverter 25
Conclusions and additional resources FPGAs enable some types of test applications not previously possible, and make others faster www.ni.com/automatedtest www.ni.com/flexrio www.ni.com/iftransceivers http://www.ni.com/rf 26