Contents 8051 Instruction Set BY D. BALAKRISHNA, Research Assistant, IIIT-H Chapter I : Control Transfer Instructions Lesson (a): Loop Lesson (b): Jump (i) Conditional Lesson (c): Lesson (d): Lesson (e): (ii) Unconditional Address calculation Call Time delays Chapter II : Arithmetic & Logic Instructions Lesson (a): Unsigned numbers Lesson (b): Signed numbers Lesson (c): Logic & Compare Lesson (d): Rotate & Swap

Chapter 1: Control Transfer Instructions While executing the instructions, it is often required to transfer the program control to some different location. There are many instructions available in 8051 to achieve this, named as control transfer instructions. In this chapter we will discuss about control transfer instructions. These control transfer instructions also called branching instructions. All the control transfer instructions deals with the program counter (because program counter contains the address of the next instruction to be executed). 1.1 LOOPING Repeating a sequence of instructions in a certain number of times is called loop. The maximum number of count for loop is 256, means we can t repeat the action more than 256 times. If we want more than 256 times, we should use loop inside loop called as nested loop. In 8051 looping can be performed in two ways. JUMP CALL 1.2 JUMP By using JUMP, we can transfer control of program to specific location, but the control is not returned to the current location after the completion of the desired task. Here stack is not involved. There are mainly two types of JUMPs are available. Conditional (Short jumps) Unconditional (Deliberate jumps) 1.2.1 CONDITIONAL JUMP If only when the certain condition is met, the control jumps to certain location. All conditional jumps are short jumps, meaning that the address

of the target must be within -128 to +127 bytes, i.e. content of the program counter (PC). Here we examine some conditional jump instructions with examples. JZ (Jump if A = 0) In this instruction, if content of the register A is Zero and then control jumps to target address, otherwise continues the next instruction. This JZ can applicable for A-register only. Example 1.2.1(a): MOV A, R5 ; A=R5 JZ NEXT ; jump if A = 0 MOV A, R3 ; A=R3 NEXT: MOV A, R2 ; A=R2 In this program, if the register R5 is zero, it jumps to the label NEXT, Otherwise R3 movies to A. JNC (jump if no carry): While executing this instruction, it checks the carry (CY) flag in PSW register. If CY=0 control transfers to target location, else continues the next instruction. Example 1.2.1(b): MOV A, R0 ; A=R0 ADD A, R1 ; A= A+R1 JNC NEXT ; jump if CY = 0 MOV B, A ; B=A NEXT: CLR A ; A=0 In the above program, the registers R0 & R1 added together and result stored in A. If carry occurred (CY=1) in addition, continues the next instruction. If carry not occurred (CY=0) control jumps to label NEXT.

The lists of conditional jump instructions are given below. Instruction Action JZ Jump if A=0 JNZ Jump if A 0 DJNZ Decrement and Jump if A 0 CJNE A, byte Compare and Jump if A byte CJNE reg, #data Compare and Jump if reg data JC Jump if CY=1 JNC Jump if CY=0 JB Jump if bit=1 JNB Jump if bit=0 JBC Jump if bit=1 and clear bit Table 1.2: Conditional jump instructions 1.2.2 UNCONDITIONAL JUMP This jump transfers the control unconditionally to the target location, meaning that if jump occurs, control is transferred immediately to the target location. There are 2 unconditional jumps are available in 8051: LJMP: LJMP (Long jump) SJMP (Short jump) LJMP can locate up to 64k bytes of program memory (0000 - FFFFH). It is 3-bytes in size, the first byte is the opcode, and the second and third bytes are the 16-bit address of the target location. While using 4k bytes of internal memory LJMP utilizes lots of memory (because it is 3-byte instruction). To avoid this problem we moved to SJMP. SJMP: This is 2-byte instruction, the first byte is the opcode and the second byte is the relative address (00 FFH) of the target location. The relative address is divided into forward and backward jumps.

If the jump is forward, the target address will be a space of 127 bytes from the current PC. If the target address is backward, the target address will be within a space of -128 bytes from the current PC. 1.3 Calculation of short jump address In previous section we studied that Short jump contains forward & backward target addresses. In this section we will discuss about how to calculate these two addresses. Forward target Address: If we consider current PC is 0, the forward target address can be within 0 127 (00 to 7FH). To calculate the target address, the second byte is added to the PC of the instruction immediately below the jump. To understand clearly let us consider the following lst file. In this figure consider JZ & JNC, both are forward jumps. The relative address for a forward jump is calculated by adding the PC of the next instruction to the second byte of the short jump instruction. Figure 1.3: Example lst file

Consider the JZ NEXT instruction; add second byte of the jump (03) to the PC of next instruction (0006). 03 + 06 = 09 this is the address of label NEXT (target of JZ jump). Backward target Address: If we consider current PC is 0, the backward target address can be within 0 to 128 (00 to 7FH). Consider again above figure 2.3 as example. From figure 1.3 consider the jump JNC AGAIN; add second byte of the jump (F2) to the PC of next instruction (0015). F2 + 15 = 07 (carry dropped) this is the address of label AGAIN. 1.4 CALL As we discussed in JUMPS, control is not returned back, whereas in the CALL instruction the control return back to current instruction. When CALL instruction is executed the control jumps to target to execute subroutine. This means the CALL instruction is used to call subroutine. Here stack involved in returning of control back. There are two instructions for call: LCALL (Long call) ACALL (Absolute call) 1.4.1 LCALL This LCALL is 3-byte instruction, the first byte is opcode, the second and third bytes are the address of the target subroutine. By using LCALL we can call subroutines anywhere within the 64K-byte address space. The processor automatically saves on the stack the address of the instruction immediately below the LCALL. So control returns back after execution of the called subroutine. In other words, when a subroutine is called, control is transferred to that subroutine, and the processor saves the PC (program counter) on the stack and begins the execution from the new location. After finishing the

executions of subroutine, the instruction RET (return) transfers control back. Every subroutine needs RET as the last instruction. Example 1.4.1: ORG 0 BACK: MOV A, #55H ; A=55H MOV P1, A ; send 55 to port 1 LCALL DELAY ; call DELAY subroutine MOV A, #AAH ; A= AAH MOV P1, A ; send AA to port 1 LCALL DELAY ; call DELAY subroutine SJMP BACK ; keep doing this infinitely ORG 300H; DELAY subroutine starts at 300H DELAY: MOV R5, #FFH; R5= FFH AGAIN: DJNZ R5, AGAIN ; stay until R5=0 RET ; return to caller END In above program upon executing the first LCALL DELAY, the address of the instruction below of it, MOV A, #AAH, is pushed onto the stack, and starts the execution from address 300H. In DELAY sub routine, when R5 becomes 0, then the RET instruction pops the address from the stack into the program counter and resumes the execution of instructions after the CALL in main routine. NOTE: We must be very careful in any manipulation operation of stack contents, because upon calling subroutine the stack stores the content of PC. The rule is that the number of PUSH and POP instructions must always match in any called subroutine. In other words, for every PUSH there must be a POP.

1.4.2 ACALL: ACALL is a 2-byte instruction, the first byte is opcode and the second byte is the address of the target subroutine. The target address of the subroutine must be within 2K bytes because only 11 bits of the 2 bytes are used for the address. There is no difference between ACALL and LCALL in terms of saving the program counter on the stack and returning function. The only difference is that the target address for LCALL can be anywhere within the 64K-byte address space, the target address of ACALL must be within a 2Kbyte range. The use of ACALL instead of LCALL can save the program ROM space. Example 1.4.2: ORG 0 MOV A, #55H ; A=55H BACK: MOV P1, A ; send register A to port 1 ACALL DELAY ; call DELAY subroutine CPL A ; Complement register A SJMP BACK ; keep doing this infinitely ORG 300H ; DELAY subroutine starts at 300H DELAY: MOV R5, #FFH; R5= FFH AGAIN: DJNZ R5, AGAIN ; stay until R5=0 RET ; return to caller END In above program upon executing the LCALL DELAY, the address of the instruction below of it, CPL A, is pushed onto the stack, and starts the execution from address 300H. In DELAY sub routine, when R5 becomes 0, the RET instruction pops the address from the stack into the program counter and resumes the execution of instructions after the CALL in main routine.

NOTE: While manipulating the stack in subroutine calling, the number of PUSHs can be nullified by number of POPs. 1.5 GENERATING TIME DELAYS The CPU takes a certain number of machine cycles (also called clock cycles) like 1, 2, and 4 etc.., to execute an instruction. The length of the machine cycle depends on the frequency of the crystal oscillator connected to the system. The frequency of the crystal connected to the 8051 can vary from 4 MHz to 30 MHz, depending on the rating and manufacturer. Mostly the 11.0592 MHz crystal oscillator is used in the 8051 -based system. In the original 8051, one machine cycle lasts 12 oscillator periods. Therefore, to calculate the time for one machine cycle of 8051, we take 1/12 of the crystal frequency, and then take its inverse, After simplifying the formula the time taken for 1 instruction is: Tinst =. So time taken for one machine cycle is: T = (1*12) / 11.0592MHz T = 1.085 µs In previous chapter, the example 1.4.1 & example 1.4.2 contains the DELAY subroutines to generate delays. Let us consider that DELAY subroutine: ORG 300H ; DELAY subroutine starts at 300H DELAY: MOV R5, #FFH; R5= FFH AGAIN: DJNZ R5, AGAIN ; stay until R5=0 RET ; return to caller

END Calculation of delay: Note down the instructions and those corresponding machine cycles and time taken to execute shown table below. Instruction Machine Time taken cycles MOV R5, #FFH 1 1 * 1.085µs = 1.085 µs DJNZ R5, AGAIN 2 2 * 1.085µs = 2.17 µs RET 2 2 * 1.085µs = 2.17 µs Table 1.5 The instruction DJNZ R5, AGAIN executes 256 times. The time taken to complete this instruction is: 256 * 2.17 µs = 555.52µs Finally the total time taken to execute the entire DELAY subroutine is: 555.52µs + 2.17µs + 1.085µs = 558.77µs. Example 1.5: Generate delay for 1ms. To reduce the complexity of the code we can use $ symbol in some situations. DJNZ R0, $ This instruction executes itself for 256 times and it required 2 machine cycles for one time execution. Time taken to complete this instruction is: 256 * (2 * 1.085 µs) = 555.52 µs

To get 1ms delay we have to execute this instruction in approximately 500 times. Execution of same code more than 256 is not possible in looping, so here we can use nested loops. The final code becomes: ORG 0 MOV R1, #2 BACK: MOV R0, #250 DJNZ R0, $ DJNZ R, BACK END

CHAPTER 2 ARITHMETIC AND LOGIC INSTRUCTIONS In this chapter we will discuss on how to perform Arithmetic operations like Addition, Subtraction, Multiplication and Division on signed numbers and unsigned numbers. We will also discuss about Logical & data serialization instructions. As we know, in digital systems numbers are represented as Signed numbers and Unsigned numbers. 2.1 UNSIGNED NUMBERS: In Unsigned numbers, all the bits are used to represent data only (no question about Sign). This means, for 8-bit data the operand can be between 00 and FFH (0 to 255 decimal). 2.1.1 ADDITION The accumulator register (A) must be involved in ADDITION operation. The syntax of the ADD instruction is: ADD A, Source ; A A + Source. This ADD instruction adds the source to A and the result will place in A. Here the Source can be Register, Immediate data, or Memory. CY, OV, and AC flags are affected in this operation. Example 2.1.1: MOV A, #05H ADD A, #12H ; A A +12 In above example the immediate value 12H is added to 05H and the result is stored in accumulator (A). The list of other addition instructions is given below.

Instruction Function Machine cycles ADD A, Rn Add to A to content of Rn (A=A+Rn) 1 ADD A, Add to A to content of RAM location 1 direct ADD A, @Ri Add to A to data pointed by Ri (i = 0 or 1) 1 ADD A, Add to A to data 1 #data ADDC A, Rn Add to A with carry to content of Rn 1 (A=A+Rn) ADDC A, Add to A with carry to content of RAM 1 direct location ADDC A, Add to A with carry to data pointed by Ri (i = 1 @Ri 0 or 1) ADDC A, Add to A with carry to data 1 #data Table 2.1.1: Instructions for addition 2.1.2 SUBTRACTION: Many microprocessors/microcontrollers having two different instructions for subtraction: SUB and SUBB (subtract with borrow). In the 8051, we have only SUBB. To make SUB out of SUBB, we have to make CY = 0. Therefore, there are two cases for the SUBB instruction: With CY = 0. With CY = 1. The accumulator register (A) must be involved in SUBTRACTION operation. The syntax of the SUBB instruction is: SUBB A, Source ; A A Source - CY. The SUBB subtract the value of Source from the value of the Accumulator, leaving the result in the Accumulator. Here the Source can be Register, Immediate data, or Memory. CY, OV, and AC flags are affected in this operation.

With CY = 0: In subtraction, the 8051 microprocessors use the 2 s complement method. By using the adder circuitry we can perform subtraction. In this method we make CY = 0 prior to the execution. The steps required to perform subtraction operation: Take the 2 s complement of the subtrahend (source operand). Add it to the minuend (A). Invert the carry. Example 2.1.2(a): Solution: CLR C ; CY = 0 MOV A, #12H ; A = 12H SUBB A, #05H ; A A 05H A = 12H 00010010 00010010 #05H 00000101 11111011 (2 s Compliment) -------------------------------------------------------------- (Addition) 0DH 100001101 (Invert Carry) 0 00001101 The final result after execution of SUBB A, #05H is 0DH. Here we may get confused for whether the result is positive or negative, after inverting the carry: if CY = 0 the result is positive and if CY = 1 the result is negative. With CY = 1: This instruction is used for multi-byte numbers and will take care of borrow of the lower operand. If CY = 1 prior to executing the SUBB instruction, it also subtracts 1 from the result.

Solution: Example 2.1.2(b): = 1 CLR C ; CY = 0 MOV A, #62H ; A= 62H SUBB A, #96H ; 62H 96H = CCH with CY MOV R7, A ; R7 = CCH MOV A, #27H ; A = 27H SUBB A, #12H ; 27H 12H 1 = 14H MOV R6, A ; R6 = A After the first SUBB instruction result is 62H 96H = CCH and the carry flag is set high indicating there is borrow. Since CY = 1, when SUBB is executed the second time A = 27H 12H -1 = 14H. Therefore, we have 2762H 1296H = 14CCH. The list of other subtraction instructions is given below. Instruction Function Machine cycles SUBB A, Rn Subtract content of Rn from A 1 SUBB A, Subtract content of RAM location from A 1 direct SUBB A, Subtract data pointed by Ri (i = 0 or 1) from A 1 @Ri SUBB A, Subtract data from A 1 #data Table 2.1.2: Instructions for subtraction 2.1.3 MULTIPLICATION The 8051 support byte-by-byte multiplication only. The accumulator register (A) and Register B must be involved in MULTIPLICATION operation.

The syntax of the MUL AB instruction is: MUL AB; A * B, Place result in B and A. In multiplication, one of the operands must be in register A, and the second operand must be in register B. After multiplication, the result is stored in the A and B registers (The lower byte is in A, and the upper byte is in B). CY and OV flags are affected in this operation. Example 2.1.3: MOV A, #25H ; A= 25H MOV B, #65H ; B = 65H MUL AB ; A*B After the MUL AB instruction, the result (25H * 65H = 0E99H) is stored in B register (Upper byte: 0EH) and A register (Lower byte: 99H). 2.1.4 DIVISION The 8051 support byte-by-byte division only. The accumulator register (A) and Register B must be involved in DIVISION operation. The syntax of the DIV AB instruction is: DIV AB ; A / B, Place result in B and A. In division, the numerator must be in register A, and the denominator must be in register B. After division, the result is stored in the A and B registers (The Quotient is in A, and the Remainder is in B). CY and OV flags are affected in this operation. Example 2.1.4: MOV A, #25H ; A= 25H MOV B, #10H ; B = 10H DIV AB ; A/B

After the DIV AB instruction, the result (25H / 10H) is stored in B register (Quotient: 02H) and A register (Remainder: 05H). 2.2 SIGNED NUMBERS In previous section we discussed about unsigned numbers and different arithmetic operations along with some related instructions. In this section we will discuss about the concept of signed numbers along with related instructions. As discussed in unsigned numbers, all bits of numbers represent magnitude only. But in case of signed numbers one bit is set aside for sign (Positive or Negative) shown in figure below. Figure 2.2: 8-bit Signed number In daily life, numbers could be used as positive or negative. For example, a temperature of 50 below zero can be represented as -50. To accommodate such numbers (signed positive and negative numbers) the above arrangement is devised. The most significant bit (MSB) is set aside for the sign (+ or -), while the rest of the bits are used for the magnitude. The sign bit of 0 represents positive (+) numbers and 1 represents negative (-) numbers. 2.2.1 POSITIVE NUMBERS: We can represent positive numbers like unsigned numbers. The maximum range of positive numbers for 8-bit operand (one byte) is: 0 to +127. If we required the number more than +127 we should go to 16-bit number.

00000000 0 00000001 +1 00000010 +2 01111111 +127 In next section we will discuss how to represent negative numbers. 2.2.2 NEGATIVE NUMBERS: For negative numbers the magnitude is represented in its 2 s complement and MSB bit must be 1. The assembler does the conversion internally. To convert to negative number representation (2 s complement), follow these steps. Write the magnitude of the number in binary (no sign). Invert each bit. Add 1 to it. Example 2.2.2: To represent the number -25H in 8051 Solution: Step 1: magnitude of the number in binary: 25H = 0010 0101 Step 2: complement each bit: Step 3: Add 1 to result ~ 0010 0101 = 1101 1010 1101 1010 + 1 = 1101 1011 2 s complement representation of -25H is 1101 1011.

2.2.3 INSTRUCTIONS TO CREATE 2 S COMPLEMENT There are no special instructions in 8051 to create 2 s complement number. We can use CPL (Complement) instruction then ADD #1 to the result. Example 2.2.3: MOV A, #25 ; A= 25H CPL A ; A = ~A (1 s complement) ADD A, #1 ; A = ~A+1 (1 s complement + 1 = 2 s complement) By using above code we can get the number 25H in 2 s complement representation. 2.3 LOGIC & COMPARE INSTRUCTIONS In this section we will discuss about digital logic instructions such as AND, OR, Exclusive-OR (XOR), complement and Compare instructions. The logical operations use all the addressing modes for the source of data byte. Many of these operations use direct address, which can include the address of SFR as a destination. Accumulator is mostly used as the destination. No flags are affected by the logical operations unless the direct RAM address is the PSW. These logical instructions can perform logical operation in byte level as well as bit level. 2.3.1 AND This instruction will perform a logical AND on the two operands and place the result in the destination (normally the accumulator). Syntax: ANL Destination, Source AND Source ; Destination = Destination

The source operand can be a register, in memory, or immediate. The ANL instruction is widely used to mask (set to 0) certain bits of an operand. Logical AND operation Figure 2.3.1: AND operation The above figure explains about basic AND operation. 2.3.2 OR: Example 2.3.1: Find the result of following code. Solution: MOV A, #57H ; A = 57H ANL A, #F0H ; A = A AND F0H 57H 01010111 F0H 11110000 ------------------------------------------------- 50H 01010000 This instruction will perform a logical OR on two operands and place the result in the destination (normally the accumulator). Syntax: ORL Destination, Source OR Source ; Destination = Destination

The source operand can be a register, in memory, or immediate. The OR instruction is widely used to non-mask (set to 1) certain bits of an operand. Logical OR operation Figure 2.3.2: OR operation The above figure explains about basic OR operation. Example 2.3.2: Find the result of following code. Solution: MOV A, #15H ; A = 15H ORL A, #70H ; A = A OR 70H 15H 00010101 70H 01110000 ------------------------------------------------- 75H 01110101 2.3.3 XOR: This instruction will perform a logical Ex-OR on the two operands and place the result in the destination (normally the accumulator). Syntax: XRL Destination, Source ; Destination = Destination XOR Source

The source operand can be a register, in memory, or immediate. The XRL instruction is widely used to toggle certain bits of an operand. Logical Ex-OR operation: Figure 2.3.3: Ex-OR operation The above figure explains about basic Ex-OR operation. Example 2.3.3: Find the result of following code. Solution: MOV A, #55H ; A = 55H XRL A, #F0H ; A = A OR F0H 55H 01010101 F0H 11110000 ------------------------------------------------- A5H 10100101 If we observe the output, the upper nibble of the 55H was toggled (0 to 1 & 1 to 0).

2.3.4 COMPLEMENT: This instruction will perform a logical NOT operation on register A. The complement action changes the 0 s to 1 s and the 1 s to 0 s. This is also called 1 s complement. Syntax: CPL A ; A = ~A (Complement) CPL instruction deals with Accumulator (A) register only. Logical NOT operation: Figure 2.3.4: Complement operation The above figure explains about basic NOT operation. Example 2.3.4: Find the result of following code. Solution: MOV A, #55H ; A = 55H CPL A ; A = ~A 55H 01010101 ------------------------------------------------- (Complement)

AAH 10101010 By using this instruction we can implement 2 s complement (1 s complement + 1). 2.3.5 COMPARE The 8051 has an instruction for the compare operation. CJNE (compare and jump if not equal). Syntax: CJNE Destination, Source, Relative Address CJNE performs comparing and jumping as a single task. This instruction compares two operands, and jumps to particular address if they are not equal. Upon executing this instruction the operands themselves remain unchanged. In the CJNE the source operand can be a register, in memory, or immediate and the destination operand can be Accumulator or one of the Rn registers. In addition, this instruction changes the CY flag to indicate if the destination operand is larger or smaller, see the table below. Example 2.3.4: Compare Carry Flag Destination CY = 0 Source Destination < CY = 1 Source Table 2.3.5: Carry Flag setting for CJNE Examine the following code. MOV A, #55H ; A = 55H. CJNE A, #AAH, NEXT ; if A not equal to AAH, then jump. DEC A ; A = A 1. NEXT: INC A ; A = A+1.

In above code, control jumps to label NEXT, because 55H & AAH is not equal. After jump Accumulator remains same (55H). 2.4 ROTATE & SWAP In this section we will discuss about rotation & swap instructions and some examples. Many applications required a bitwise rotation of an operand. In 8051, the instructions RR, RL, RRC, are RLC designed for rotation purpose. These instructions allow a program to rotate accumulator left or right. There are two types of rotations. Simple rotation of the bits of A Rotation through the carry of the bits of A This rotation can perform on Accumulator (A) register only. 2.4.1 SIMPLE ROTATION In simple rotation we can rotate bits in accumulator right or left. Here carry flag is not involved in this operation. There are two instructions involved in simple rotation, these are: RR and RL. RR (Rotate Right) Here the 8-bits of the accumulator are rotated right one bit, and the LSB bit D0 exits and enters into MSB bit D7. The below figure explains clearly about Rotate Right. Figure 2.4.1(a): Rotate right

Example 2.4.1(a): RL (Rotate Left) MOV A, #65H ; A = 01100101 RR A ; A = 10110010 RR A ; A = 01011001 Here the 8-bits of the accumulator are rotated left one bit, and MSB bit D7 exits and enters into LSB bit D0. The below figure explains clearly about Rotate Left. Example 2.4.1(b): Figure 2.4.1(b): Rotate left MOV A, #65H ; A = 01100101 RL A ; A = 11001010 RL A ; A = 10010101 2.4.2 ROTATION THROUGH CARRY In rotation through carry, we can rotate bits in accumulator right or left. Here carry flag is involved in this operation. There are two instructions involved in rotation through carry, these are: RRC and RLC. RRC (Rotate Right through Carry) Here the 8-bits of the accumulator are rotated right one bit, and the LSB bit D0 exits and enters into CY and CY enters into MSB bit D7. The below figure explains clearly about Rotate Right through Carry.

Figure 2.4.2(a): Rotate Right through Carry Example 2.4.2(a): SETB C ; CY = 1 MOV A, #65H ; A = 01100101 RRC A ; A = 10110010, CY = 1 RRC A ; A = 11011001, CY = 0 RRC A ; A = 01101100, CY = 1 RRL (Rotate Left through Carry) Here the 8-bits of the accumulator are rotated by right one bit and MSB bit D7 exits by entering into CY, whereas CY enters into LSB bit D0. The below figure explains clearly about Rotate Left through Carry. Figure 2.4.2(b): Rotate Left through Carry Example 2.4.2(b): SETB C ; CY = 1 MOV A, #65H ; A = 01100101 RRL A ; A = 11001011, CY = 0 RRL A ; A = 10010110, CY = 1 RRL A ; A = 00101101, CY = 1

2.4.3 SWAP: By using this instruction we can swap upper nibble and lower nibble of the byte. In other words the lower 4 bits are put into the higher 4 bits, and the higher 4 bits are put into the lower 4 bits. This instruction can deal only with accumulator. The below figure explains about SWAP instruction. Figure 2.4.3: SWAP instruction SWAP is nothing but a 4-times of RL or 4-times of RR. So by using this instruction we can save program memory. Example 2.4.3(a): MOV A, #65H ; A = 01100101 SWAP A ; A = 01010110 RL A ; A = 10101100 RL A ; A = 01011001 RL A ; A = 10110010 RL A ; A = 01100101 Example 2.4.3(b): MOV A, #65H ; A = 01100101 SWAP A ; A = 01010110 RR A ; A = 00101011 RR A ; A = 10010101 RR A ; A = 11001010 RR A ; A = 01100101 Observe in above examples, after 4 RLs or 4 RRs we get the same number of A. This means SWAP = 4-times of RL or 4-times of RR.