Using MAX II & MAX 3000A Devices as a Microcontroller I/O Expander

Using MAX II & MAX 3000A Devices as a Microcontroller I/O Expander March 2004, ver 2.0 Application Note 265 Introduction Advantages of Using MAX II & MAX 3000A Devices Many microcontroller and microprocessors limit I/O ports and pins to conserve pin counts and reduce package sizes. For many microcontroller- (e.g., PIC, 051, and SX) or microprocessor-based systems, the system design requires more I/O pins without changing the microcontroller. To increase the number of I/O pins without changing the microcontroller, I/O expansion provides a solution. With up to 272 I/O pins and MultiVolt TM I/O capability, Altera MAX II and MAX 3000A devices allow you to implement microcontroller I/O expansion in microcontroller- or microprocessor based systems. This application note explains how to implement a microcontroller I/O expander in MAX II and MAX 3000A devices. A key advantage of using MAX II and MAX 3000A devices as a microcontroller I/O expander is the integration of logic functions across your entire board. The flexibility of a programmable device means that not only can the I/O expansion function be implemented, but other functions can be integrated such as LED drivers or bus-bridging logic. Additionally, with the user flash memory in MAX II devices, functions that use memory also can be implemented. This integration allows you to reduce component count across the board, minimizing cost and maximizing board space efficiency. Another advantage in using MAX II and MAX 3000A devices is the MultiVolt I/O capability which enables MAX II and MAX 3000A devices to interface to multiple-voltage I/O pins (i.e., 5.0 V, 3.3 V, 2.5 V, 1. V, and 1.5 V). This capability allows you to implement voltage-level shifting to interface older 5.0-V devices with newer 3.3-V, 2.5-V, 1.-V, or 1.5-V devices or microcontrollers. Table 1 summarizes the MultiVolt I/O support for MAX II and MAX 3000A devices. Table 1. MAX II & MAX 3000A MultiVolt I/O Support (Part 1 of 2) Device MAX 3000A VCCINT (V) VCCIO (V) Input Signal (V) Output Signal (V) 1.5 1. 2.5 3.3 5.0 1.5 1. 2.5 3.3 5.0 3.3 3.3 v v v v (1) v v 2.5 v v v v Altera Corporation 1 AN-265-2.0

Table 1. MAX II & MAX 3000A MultiVolt I/O Support (Part 2 of 2) Device VCCINT (V) MAX II 3.3 2.5 1. VCCIO (V) Input Signal (V) Output Signal (V) 1.5 1. 2.5 3.3 5.0 1.5 1. 2.5 3.3 5.0 3.3 v (2) v v (3) v (4) v (4) v (4) v v (5), (6) 2.5 v v v (7) v (7) v 1. v v v v () v 1.5 v v v (9) v (9) v Notes to Table 1: (1) When V CCIO is 3.3 V, a MAX 3000A device can drive a 2.5-V device that has 3.3-V tolerant inputs. (2) When V CCIO = 3.3 V and a 2.5-V input signal feeds an input pin, the V CCIO supply current will be slightly larger than expected. (3) MAX II devices can be 5.0-V tolerant with the use of an external resistor and the internal PCI clamp diode available in the EPM1270 and EPM2210 devices. (4) When V CCIO = 3.3 V, a MAX II device can drive a 1.5-V, 1.-V, or 2.5-V device with 3.3-V tolerant inputs. (5) When V CCIO = 3.3 V, a MAX II device can drive a device with 5.0-V LVTTL inputs. (6) MAX II outputs can drive a 5.0-V LVCMOS input if the output is configured as open-drain and pulled up to 5.0 V with an external resistor. For this case, the internal PCI clamping diode must be enabled. (7) When V CCIO = 2.5 V, a MAX II device can drive a 1.5-V or 1.-V device with 2.5-V tolerant inputs. () When V CCIO = 1. V, a MAX II device can drive a 1.5-V device with 1.-V tolerant inputs. (9) When V CCIO = 1.5 V and a 2.5-V or 3.3-V input signal feeds an input pin, higher pin leakage current is expected. The large number of I/O pins on MAX II and MAX 3000A devices make them an ideal device for microcontroller I/O expansion. Tables 2 and 3 show the maximum user I/O pins available in MAX II and MAX 3000A devices. The maximum I/O pins available are 272, which translates to 34, -bit ports. Additionally, in-system programmability (ISP) means that these features come with the flexibility of reprogrammability on the board. Table 2. Maximum User I/O Pins in MAX II Devices EPM240 EPM570 EPM1270 EPM2210 Maximum User I/O Pins 0 160 212 272 Table 3. Maximum User I/O Pins in MAX 3000A Devices EPM3032A EPM3064A EPM312A EPM3256A EPM3512A Maximum User I/O Pins 34 66 9 161 20 2 Altera Corporation

Implementing a Microcontroller I/O Expander in MAX II & MAX 3000A Devices The I/O expander design example includes four ports (A, B, C, and D) which can be independently programmed as I/O ports. Each port is bits wide and is bidirectional, becoming an input port when tri-stated. You can connect the microcontroller unit (MCU) port to or from any port (A, B, C, or D) to perform read and write operations. Figure 1 shows the block diagram of the design example for the microcontroller I/O expander. Figure 1. Block Diagram for Microcontroller I/O Expander Design Example in MAX II & MAX 3000A Devices Input Data Registers Port A Port B MCU Port I/O Ports 4 2 I/O Setting Data Register 2 4 I/O Ports Output Data Registers Port C Port D CLK CS RST CONF LOAD WR RD MODE Altera Corporation 3

Table 4 lists all the functions of the input and output pins. Table 4. Input & Output Pins in a Microcontroller I/O Expander Example Design (Part 1 of 2) I/O Name Type Description Active CLK Input Input clock signal to the trigger Input data registers, output data registers, and I/O setting data registers. Positive Edge MCU port Bidirectional -bit bidirectional data lines that interface with the MCU data bus. The -bit data can be written into or read out of the microcontroller I/O expander on the WR and RD signals with a positive edge clock trigger. Configuration data is also transmitted through this port. The MODE signal determines whether the MCU port is a data or address bus. CS Input Input signal to select the device. Low RST Input Input signal to reset the device and all internal registers Low asynchronously. CONF Input This control signal stores the address[5..0] from the MCU port on the rising edge of CLK into the configuration registers. CONF enables the clock signal to the configuration registers. Data on address[7..6] is ignored. (The operation will be discussed later in this application note.) LOAD Input This control signal stores the address[1..0] from the MCU port the rising edge of CLK into the configuration registers. LOAD enables the clock signal to the configuration registers. Data on address[7..2] is ignored. (The operation will be discussed later in this application note.) WR Input Input signal that causes the data on the MCU port to be written to the enabled port (A, B, C, or D) on the rising edge of CLK. WR enables the clock signal to the output data registers. RD Input Input signal that enables the data bus transfer to the MCU port from the enabled port (A, B, C, or D) on the rising edge of CLK. RD enables the clock signal to the input data registers. MODE Input Tri-states the MCU port when this signal is high. The MCU port setting (input or output) depends on the configuration registers when MODE is low. Port A Bidirectional -bit, general-purpose I/O port that can be programmed to either output or input mode. Port B Bidirectional -bit, general-purpose I/O port that can be programmed to either output or input mode. - Low Low Low Low - - - 4 Altera Corporation

Table 4. Input & Output Pins in a Microcontroller I/O Expander Example Design (Part 2 of 2) I/O Name Type Description Active Port C Bidirectional -bit, general-purpose I/O port that can be programmed to either output or input mode. Port D Bidirectional -bit, general-purpose I/O port that can be programmed to either output or input mode. - - Functional Description The microcontroller I/O expander operates as a slave that sends and receives data through the MCU port. Data is sent through the I/O expander at the rising edge of CLK when the WR signal is low (with CS set to low) and received at the rising edge of CLK when the RD signal is low (with CS set to low). If the WR or RD signal is high, the CLK signal is disabled through the input/output data registers so that no data can be sent or received through the MCU port. Write Mode In write mode, the selected port (Port A to Port D) will be configured as an output port and the MCU port as an input port. When the WR signal is low (with CS set to low), the clock through the output registers is enabled. Therefore, the data from the MCU port will be written to the output data register of the selected port on the rising edge of CLK. Read Mode In read mode, the selected port (Port A to Port D) will be configured as an input port and the MCU port as an output port. When the RD signal is low (with CS set to low), the clock through the input data registers is enabled. Therefore, the data from the selected port will be written to the input data registers of the MCU port on the rising edge of CLK. 1 During read and write operation, the MODE signal control pin must be set to low. See Design Verification on page for an example of read and write operations. Configuration of the Microcontroller I/O Expander Configuration of the microcontroller I/O expander is used to determine whether the port is input or output and enabled or disabled. Activation of the new configuration occurs with a single configuration pulse of the CONF signal for one clock period. Altera Corporation 5

Data controlling the microcontroller I/O expander is stored in a set of 6-bit registers. Data to be written into these registers, consisting of 4 bits for I/O port configuration data and 2 bits of address for the enabled port address data, is placed on the input address bus (MCU port) with the MODE signal set to high and the CS signal set to low. Input data is stored in the configuration registers at the rising edge of CLK when the CONF signal is low (with CS set to low), which enables the clock through the configuration registers. This transition causes the state of the microcontroller I/O expander to be set to the selected configuration. When the LOAD signal is asserted low (with CS set to low) to enable the clock through the configuration registers, only 2 bits of the enabled port address data (bit1 and bit0) are stored in the configuration registers at the rising edge of CLK. Use the LOAD signal when you need to select the enabled port to perform read or write operation instead of configuring the ports. Figure 2 shows the functionality of every bit in the address bus during configuration mode. Figure 2. I/O Expander Address Bus Configuration Function A7 A6 A5 A4 A3 A2 A1 A0 bit 7-6: bit 5: bit 4: bit 3: bit 2: bit 1-0: A7:A6: No functionality A5: Port D configuration bit 0 = Configured as input 1 = Configured as output A4: Port C configuration bit 0 = Configured as input 1 = Configured as output A3: Port B configuration bit 0 = Configured as input 1 = Configured as output A2: Port A configuration bit 0 = Configured as input 1 = Configured as output A1:A0: Port Address 6 Altera Corporation

Table 5 shows the address contents to enable the particular I/O ports. Table 5. Port Addresses A1:A0 Port 00 A 01 B 10 C 11 D MCU port direction, input or output, cannot be directly configured by the user. It is configured internally by the selected enabled port. For example, if the enabled port is in input mode, the MCU port is set to an output mode. However, you can use the MODE signal control pin to tri-state the MCU port so that it becomes an input port, allowing you access to the configuration registers. Reset mode is also supported in the microcontroller I/O expander reference design. When the RST signal is asserted (with CS set to low), the contents of all registers will be reset to zero asynchronously and the entire I/O expander will be in its initial state, where all the ports (including the MCU port) are set to input mode. Microcontroller I/O Expander Implementation The microcontroller I/O Expander design example can be targeted to MAX 3000A devices (EPM312ATC100) or MAX II devices (EPM240T100C3) using the Quartus II software. The design utilization in MAX 3000A and MAX II device is shown in Tables 6 and 7. The data in both Tables 6 and 7 show that there are sufficient resources (I/O pins and macrocells/logic elements) remaining in the device for the implementation of the other logic in the system. Table 6. Microcontroller I/O Expander EPM240 Utilization Resource Available Used Utilization (%) Logic Elements 240 67 27 Flipflops 240 50 20 I/O Pins 0 4 60 Altera Corporation 7

Table 7. Microcontroller I/O Expander EPM312A Utilization Resource Available Used Utilization (%) Macrocells 12 51 39 Flipflops 12 50 39 I/O Pins 0 4 60 Shareable Expanders 12 2 1 Design Verification Design verification of a microcontroller I/O expansion was accomplished by using the Quartus II software. The design was verified both in functional and timing simulation in MAX II (EPM240T100C3) and MAX 3000A (EPM312ATC100) devices. Figures 3 and 4 show the timing simulation of the microcontroller I/O expansion during read and write operation. Altera Corporation

Figure 3. Microcontroller I/O Expansion Write Mode Timing Simulation Configure the Microcontroller I/O Expander The Low Signal of the WR Enables the Clock through the Output Data Registers to Create New Output Values Change the Enabled Port The WR Signal Creates New Output Values With all the I/O pins in tri-state mode, each port is initialized. After initialization, Port A and Port B are configured as output, Port C and Port D are configured as input, and Port B is enabled for write operation. When WR asserts a low signal, the clock through the output data registers is enabled and creates a new output value (146) at the output Port B from the MCU port. Altera Corporation 9

In the last section of simulation, Port A is enabled once the LOAD signal is asserted low. When the WR signal is low to enable the clock through the output data registers, the MCU port data (10) is created at the output Port A. Figure 4. Microcontroller I/O Expansion Read Mode Timing Simulations The RD Signal Creates New Output Values Configure the Microcontroller I/O Expander The Low Signal of the RD Enables the Clock through the Input Data Registers to Create New Output Values Change the Enabled Port 10 Altera Corporation

With all the I/O pins in tri-state mode, each port is initialized. After initialization, all ports (A, B, C, and D) are configured as inputs and Port C is enabled for read operation. When RD asserts a low signal, the clock through the input data registers is enabled and creates a new output value (214) at the MCU port from Port C. While in last part of the simulation, Port D is enabled once LOAD is asserted low. When RD is low to enable the clock through the input data registers, Port D data (146) is created at the MCU Port. Microcontroller I/O Expander Applications Figures 5 shows how to increase the microcontroller s I/O ports using the I/O expander. This microcontroller I/O expander can be targeted or modified to target to any -bit microcontroller (e.g., PIC and 051). Figure 5. Application of Microcontroller I/O Expander Microcontroller I/O Expander RD output WR output RD WR Port A CS output LOAD output CS LOAD Port B CONF output MODE output CONF MODE Port C RST output Microcontroller I/O Port RST MCU Port Port D CLK CLK System Clock Conclusion With up to 272 I/O pins and MultiVolt I/O capability, Altera MAX II and MAX 3000A devices allow you to implement microcontroller I/O expansion in a single device. MAX II and MAX 3000A devices enable you to design custom microcontroller I/O expanders with additional features other than the example provided in this application note. Altera Corporation 11

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