Microcomputers. Outline. Number Systems and Digital Logic Review

Similar documents
BINARY SYSTEM. Binary system is used in digital systems because it is:

D I G I T A L C I R C U I T S E E

EE292: Fundamentals of ECE

CHW 261: Logic Design

Digital Fundamentals

Digital Fundamentals

CO Computer Architecture and Programming Languages CAPL. Lecture 9

MACHINE LEVEL REPRESENTATION OF DATA

Number System. Introduction. Decimal Numbers

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-2700: Digital Logic Design Winter Notes - Unit 4. hundreds.

Digital Circuit Design and Language. Datapath Design. Chang, Ik Joon Kyunghee University

Lecture Topics. Announcements. Today: Integer Arithmetic (P&H ) Next: continued. Consulting hours. Introduction to Sim. Milestone #1 (due 1/26)

CHAPTER V NUMBER SYSTEMS AND ARITHMETIC

Systems Programming. Lecture 2 Review of Computer Architecture I

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-278: Digital Logic Design Fall Notes - Unit 4. hundreds.

ECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012

M1 Computers and Data

Binary Adders: Half Adders and Full Adders

LOGIC DESIGN. Dr. Mahmoud Abo_elfetouh

Binary Addition. Add the binary numbers and and show the equivalent decimal addition.

Data Representation and Binary Arithmetic. Lecture 2

CS 121 Digital Logic Design. Chapter 1. Teacher Assistant. Hadeel Al-Ateeq

SE311: Design of Digital Systems

EE 109 Unit 6 Binary Arithmetic

Number Systems and Conversions UNIT 1 NUMBER SYSTEMS & CONVERSIONS. Number Systems (2/2) Number Systems (1/2) Iris Hui-Ru Jiang Spring 2010

1010 2?= ?= CS 64 Lecture 2 Data Representation. Decimal Numbers: Base 10. Reading: FLD Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9

Lecture 2: Number Systems

ELCT 501: Digital System Design

DIGITAL ELECTRONICS. Vayu Education of India

Digital Systems and Binary Numbers

10.1. Unit 10. Signed Representation Systems Binary Arithmetic

Number Systems. Readings: , Problem: Implement simple pocket calculator Need: Display, adders & subtractors, inputs

Number Systems CHAPTER Positional Number Systems

UNIT-III REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT

Chapter 10 Binary Arithmetics

Number Systems Standard positional representation of numbers: An unsigned number with whole and fraction portions is represented as:

Injntu.com Injntu.com Injntu.com R16

Combinational Circuits

Computer Sc. & IT. Digital Logic. Computer Sciencee & Information Technology. 20 Rank under AIR 100. Postal Correspondence

END-TERM EXAMINATION

Introduction to Digital Logic Missouri S&T University CPE 2210 Multipliers/Dividers

DLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 1 DLD P VIDYA SAGAR

CHAPTER 4: Register Transfer Language and Microoperations

Logic design Ibn Al Haitham collage /Computer science Eng. Sameer

6.1 Combinational Circuits. George Boole ( ) Claude Shannon ( )

Number Systems Base r

DIGITAL ARITHMETIC: OPERATIONS AND CIRCUITS

Arithmetic Logic Unit. Digital Computer Design

Chapter 1. Digital Systems and Binary Numbers

COMPUTER ARCHITECTURE AND ORGANIZATION Register Transfer and Micro-operations 1. Introduction A digital system is an interconnection of digital

UNIT - V MEMORY P.VIDYA SAGAR ( ASSOCIATE PROFESSOR) Department of Electronics and Communication Engineering, VBIT

Computer Organization

DIGITAL SYSTEM DESIGN

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

Number Systems and Binary Arithmetic. Quantitative Analysis II Professor Bob Orr

Binary Systems and Codes

REGISTER TRANSFER LANGUAGE

Semester Transition Point. EE 109 Unit 11 Binary Arithmetic. Binary Arithmetic ARITHMETIC

CPE300: Digital System Architecture and Design

1. Draw general diagram of computer showing different logical components (3)

REGISTER TRANSFER AND MICROOPERATIONS

ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two Solutions 26 February 2014

Introduction to Numbering Systems

Number representations

This tutorial gives a complete understanding on Computer Logical Organization starting from basic computer overview till its advanced architecture.

Chapter 2 Number System

Lecture 6: Signed Numbers & Arithmetic Circuits. BCD (Binary Coded Decimal) Points Addressed in this Lecture

CPE300: Digital System Architecture and Design

Chapter 3: Number Systems and Codes. Textbook: Petruzella, Frank D., Programmable Logic Controllers. McGraw Hill Companies Inc.

Chapter 3: part 3 Binary Subtraction

Inf2C - Computer Systems Lecture 2 Data Representation

IT 1204 Section 2.0. Data Representation and Arithmetic. 2009, University of Colombo School of Computing 1

CSE 140L Final Exam. Prof. Tajana Simunic Rosing. Spring 2008

UNIT - I: COMPUTER ARITHMETIC, REGISTER TRANSFER LANGUAGE & MICROOPERATIONS

Lec-6-HW-3-ALUarithmetic-SOLN

Positional Number System

3. The high voltage level of a digital signal in positive logic is : a) 1 b) 0 c) either 1 or 0

a, b sum module add32 sum vector bus sum[31:0] sum[0] sum[31]. sum[7:0] sum sum overflow module add32_carry assign

CS/COE 0447 Example Problems for Exam 2 Spring 2011

UNIT 2 NUMBER SYSTEM AND PROGRAMMING LANGUAGES

DLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 3 DLD P VIDYA SAGAR

E40M. Binary Numbers, Codes. M. Horowitz, J. Plummer, R. Howe 1

Dec Hex Bin ORG ; ZERO. Introduction To Computing

SWITCHING THEORY AND LOGIC CIRCUITS

Contents. Appendix D Verilog Summary Page 1 of 16

R10. II B. Tech I Semester, Supplementary Examinations, May

Code No: R Set No. 1

BUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book

Read this before starting!

Agenda EE 224: INTRODUCTION TO DIGITAL CIRCUITS & COMPUTER DESIGN. Lecture 1: Introduction. Go over the syllabus 3/31/2010

Chapter 5. Digital Design and Computer Architecture, 2 nd Edition. David Money Harris and Sarah L. Harris. Chapter 5 <1>

Basic Definition INTEGER DATA. Unsigned Binary and Binary-Coded Decimal. BCD: Binary-Coded Decimal

Slide Set 1. for ENEL 339 Fall 2014 Lecture Section 02. Steve Norman, PhD, PEng

Lecture (02) Operations on numbering systems

Chapter 2 Data Representations

Computer Logical Organization Tutorial

Logic Circuits I ECE 1411 Thursday 4:45pm-7:20pm. Nathan Pihlstrom.

Binary Arithmetic. Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T.

Chap 1. Digital Computers and Information

COPYRIGHTED MATERIAL INDEX

Transcription:

Microcomputers Number Systems and Digital Logic Review Lecture 1-1 Outline Number systems and formats Common number systems Base Conversion Integer representation Signed integer representation Binary coded decimal (BCD) representation Binary and Hex arithmetic Logic circuits/boolean algebra Switch inputs NMOS and PMOS transistors and circuits Truth tables Logic networks Tri-state devices Basic combinatorial circuits Clock signals Storage elements Basic sequential circuits Lecture 1-2 1

Review of Number Systems and Formats Computers are based on devices that can take only two states (0 or 1) A single 0 or 1 is called a bit (Binary Digit) Bits may be concatenated to represent many different entities Characters, integers, floating point numbers, etc. In general, n bits can represent 2 n distinct entities (values) Lecture 1-3 Review of Number Systems and Formats Example n=0 2 n =1 n=1 2 n =2 n=2 2 n =4 n=3 2 n =8 n=4 2 n =16 Strings of bits can be used to represent numbers, letters, etc. Numbers are associated with bit combinations according to specific number formats. Lecture 1-4 2

Basic Number Formats Binary (integer) Positive only Signed/unsigned Fractional representation Fixed point notation Floating point (real) In the C programming language this would be data types float and double Binary coded decimal (BCD) Lecture 1-5 Binary (Integer) Format Non-negative integers are represented by choosing a base, x, and x different symbols called digits A string of these digits will represent a number In general, the string of digits: a n-1 a n-2 a n-3...a 2 a 1 a 0 would represent the, base x, number a n-1 x n-1 + a n-2 x n-2 + a n-3 x n-3 +...a 2 x 2 + a 1 x 1 + a 0 x 0 Lecture 1-6 3

Binary (Integer) Format example: base=10 number=65308 would be written as: 6*10 4 + 5*10 3 + 3*10 2 + 0*10 1 + 8*10 0 But, computers are built on 2-state devices and work with BINARY (i.e. BASE 2) numbers: example: base=2 number=10110 would be written as: 1*2 4 + 0*2 3 + 1*2 2 + 1*2 1 + 0*2 0 Lecture 1-7 Number Systems To talk about binary data, we must first talk about number systems The decimal number system (base 10) you should be familiar with A digit in base 10 ranges from 0 to 9. A digit in base 2 ranges from 0 to 1 (binary number system). A digit in base 2 is also called a bit. A digit in base R can range from 0 to R-1 A digit in Base 16 can range from 0 to 16-1 (0,1,2,3,4,5,5,6,7,8,9,A,B,C,D,E,F). Use letters A-F to represent values 10 to 15. Base 16 is also called Hexadecimal or just Hex. Lecture 1-8 4

Common Number Systems (BASES) Used In Computers BINARY OCTAL DECIMAL HEXADECIMAL (Base 2) (Base 8) (Base 10) (Base 16) 0 0-000 0-0000 0-0000 A - 1010 1 1-001 1-0001 1-0001 B - 1011 2-010 2-0010 2-0010 C - 1100 3-011 3-0011 3-0011 D - 1101 4-100 4-0100 4-0100 E - 1110 5-101 5-0101 5-0101 F - 1111 6-110 6-0110 6-0110 7-111 7-0111 7-0111 8-1000 8-1000 9-1001 9-1001 Lecture 1-9 Positional Notation Value of number is determined by multiplying each digit by a weight and then summing The weight of each digit is a POWER of the BASE and is determined by position 953.78 = 9 * 10 2 + 5 * 10 1 + 3 * 10 0 + 7 * 10-1 + 8 * 10-2 = 900 + 50 + 3 +.7 +.08 = 953.78 0b1011.11 = 1*2 3 + 0*2 2 + 1*2 1 + 1*2 0 + 1*2-1 + 1*2-2 = 8 + 0 + 2 + 1 + 0.5 + 0.25 = 11.75 0xA2F = 10*16 2 + 2*16 1 + 15*16 0 = 10 * 256 + 2 * 16 + 15 * 1 = 2560 + 32 + 15 = 2607 Lecture 1-10 5

Base Conversion By expansion For converting base x to base 10 example: (10111011) 2 = 1*2 7 +0*2 6 +1*2 5 +1*2 4 +1*2 3 +0*2 2 +1*2 1 +1*2 0 = 128+0+32+16+8+0+2+1 = (187) 10 example: (51A) 16 = 5*16 2 +1*16 1 +10*16 0 (51Ah) = (1306) 10 Lecture 1-11 Base Conversion Conversion of base 10 to base X Use a successive division approach Convert from base=10 to base=2 2 38 0 2 19 1 2 9 1 2 4 0 2 2 0 2 1 1 0 Remainder (100110) 2 =(38) 10 Convert from base=10 to base=16 Remainder 16 587 11 16 36 4 16 2 2 0 (24B) 16 =(587) 10 Lecture 1-12 6

Conversion Of Binary To Hexadecimal Or Octal Group binary digits into groups of four and assign each group a hexadecimal digit 0110 1011 0111 6 B 7 Binary-to-octal: 011 010 110 111 3 2 6 7 Hexadecimal-to-binary: A 1 9 1010 0001 1001 Octal-to-binary: 5 0 3 1 101 000 011 001 Lecture 1-13 Negative Integer Representation Sign-magnitude format Attach an extra bit to indicate the sign of the number (0=+, 1=-) example: (01011) 2 =(11) 10 (11011) 2 =-(11) 10 Lecture 1-14 7

Negative Integer Representation 2's complement format Negative numbers are assigned as follows: -b = 2 n -b where b is the magnitude and n is the number of bits representing the number example:n=16 b=1234 10 1234 10 = (0000010011010010) 2 = (04D2) 16 -b (in 2's complement) 2 16-1234 10 = (1111101100101110) 2 = (FB2E) 16 Lecture 1-15 Negative Integer Representation In general: If n bits are used in the 2's complement number system, then from -2 n-1 to 2 n-1-1 can be represented. example: n=16 integers from -2 16-1 = -32768 to 2 16-1 -1 = 32767 Forming 2's complement numbers 2 methods Exchange all 1's and 0's and add 1 example: b=0101 (2 4-1)-b = 1010 (1's complement)+1 = 1011 (2's complement) Exchange all 1's and 0's after the first 1 Lecture 1-16 8

Binary Coded Decimal (BCD) Format Numbers are stored in terms in their 4-bit binary equivalent. 2 basic BCD formats Packed BCD - a string of decimal digits are stored in a sequence of 4-bit groups. example: 9502 10 would be stored as: 1001 0101 0000 0010 Unpacked BCD - digits are stored in the low-order half of an 8-bit group (what is in the high half is undefined - usually zero) example: 9502 10 would be stored as: uuuu1001 uuuu0101 uuuu0000 uuuu0010 Lecture 1-17 Codes for Characters Also need to represent Characters as digital data. The ASCII code (American Standard Code for Information Interchange) is a 7-bit code for Character data. Typically 8 bits are actually used with the 8th bit being zero or used for error detection (parity checking). A = %01000001 = 0x41 & = % 00100110 = 0x26 Lecture 1-18 9

ASCII: American Standard Code for Information Interchange https://commons.wikimedia.org/w/index.php?curid=10388973 Lecture 1-19 Binary Arithmetic Recall that N binary digits (N bits) can represent unsigned integers from 0 to 2 N -1 4 bits = 0 to 15 8 bits = 0 to 255 16 bits = 0 to 65535 Besides simply representation, we would like to also do arithmetic operations on numbers in binary form Principle operations are addition and subtraction Lecture 1-20 10

Binary Addition and Subtraction The rules for binary addition are: 0 + 0 = 0, carry = 0 1 + 0 = 1, carry = 0 0 + 1 = 1, carry = 0 1 + 1 = 0, carry = 1 The rules for binary subtraction are: 0-0 = 0, borrow = 0 1-0 = 1, borrow = 0 0-1 = 1, borrow = 1 1-1 = 0, borrow = 0 Borrows, Carries from/to digits to left of current of digit. Binary subtraction, addition works just the same as decimal addition, subtraction. Lecture 1-21 Binary, Decimal addition Decimal 34 + 17 ------ 51 from LSD to MSD: 7+4 = 1; with carry out of 1 to next column 1 (carry) + 3 + 1 = 5. answer = 51. Binary 0b 101011 + 0b 000001 --------------- 101100 From LSB to MSB: 1+1 = 0, carry of 1 1 (carry)+1+0 = 0, carry of 1 1 (carry)+0 + 0 = 1, no carry 1 +0 = 1 0 + 0 = 0 1 + 0 = 1 answer = % 101100 Lecture 1-22 11

Subtraction Decimal 900-001 ------- 899 0-1 = 9; with borrow of 1 from next column 0-1 (borrow) - 0 = 9, with borrow of 1 9-1 (borrow) - 0 = 8. Answer = 899. Binary 0b 100-0b 001 ------- 011 0-1 = 1; with borrow of 1 from next column 0-1 (borrow) - 0 = 1, with borrow of 1 1-1 (borrow) - 0 = 0. Answer = % 011. Lecture 1-23 Hex Addition 0x3A + 0x28 -------- 0x62 A+8 = 2; with carry out of 1 to next column 1 (carry) + 3 + 2 = 6. answer = 0x62 Decimal check. 0x3A = 3 * 16 + 10 = 58 0x28 = 2 * 16 + 8 = 40 58 + 40 = 98 0x62 = 6 * 16 + 2 = 96 + 2 = 98!! Lecture 1-24 12

Hex addition again Why is 0xA + 0x8 = 2 with a carry out of 1? The carry out has a weight equal to the BASE (in this case 16). The digit that gets left is the excess. Ah + 8h = 10 + 8 = 18. 18 is GREATER than 16 (BASE), so need a carry out! Excess is 18 - BASE = 18-16 = 2, so 2 is digit. Exactly the same thing happens in Decimal. 5 + 7 = 2, carry of 1. 5 + 7 = 12, this is greater than 10!. So excess is 12-10 = 2, carry of 1. Lecture 1-25 Hex Subtraction 0x34-0x27 ---------- 0x0D 4-7 = D; with borrow of 1 from next column Decimal check. 0x34 = 3 * 16 + 4 = 52 0x27 = 2 * 16 + 7 = 39 52-39 = 13 0x0D = 13!! 3-1 (borrow) - 2 = 0. answer = 0x0D. Lecture 1-26 13

Hex subtraction again Why is 0x4 0x7 = 0xD with a borrow of 1? The borrow has a weight equal to the BASE (in this case 16). BORROW +0x4 0x7 = 16 + 4-7 = 20-7 = 13 = 0xD. 0xD is the result of the subtraction with the borrow. Exactly the same thing happens in decimal. 3-8 = 5 with borrow of 1 borrow + 3-8 = 10 + 3-8 = 13-8 = 5. Lecture 1-27 Unsigned Overflow In this class we use 8 bit or 16 bit precision most of the time. Overflow occurs when I add or subtract two numbers, and the correct result is a number that is outside of the range of allowable numbers for that precision. I can have both unsigned and signed overflow (more on signed numbers later) 8 bits -- unsigned integers 0 to 2 8-1 or 0 to 255 16 bits -- unsigned integers 0 to 2 16-1 or 0 to 65535 Lecture 1-28 14

Unsigned Overflow Example Assume 8 bit precision; i.e. I can t store any more than 8 bits for each number. Lets add 255 + 1 = 256. The number 256 is OUTSIDE the range of 0 to 255! What happens during the addition? 255 = 0x FF + 1 = 0x 01 ------------------- 256 /= 0x00 /= means Not Equal 0xF + 1 = 0, carry out 0xF + 1 (carry) + 0 = 0, carry out Carry out of MSB falls off end, No place to put it!!! Final answer is WRONG because could not store carry out. Lecture 1-29 Unsigned Overflow A carry out of the Most Significant Digit (MSD) or Most Significant Bit (MSB) is an OVERFLOW indicator for addition of UNSIGNED numbers. The correct result has overflowed the number range for that precision, and thus the result is incorrect. If we could STORE the carry out of the MSD, then the answer would be correct. But we are assuming it is discarded because of fixed precision, so the bits we have left are the incorrect answer. Lecture 1-30 15

Logic Circuits Logic circuits perform operations on digital signals Implemented as electronic circuits where signal values are restricted to a few discrete values In binary logic circuits there are only two values, 0 and 1 The general form of a logic circuit is a switching network X 1 X 2 X 3 X m Switching Network Y 1 Y 2 Y 3 Y n discrete values Lecture 1-31 Boolean Algebra Direct application to switching networks Work with 2-state devices 2-valued Boolean algebra (switching algebra) Use a Boolean variable (X, Y, etc.) to represent an input or output of a switching network Variable may take on only two values (0, 1) X=0, X=1 These symbols are not binary numbers, they simply represent the 2 states of a Boolean variable They are not voltage levels, although they commonly refer to the low or high voltage input/output of some circuit element Lecture 1-32 16

Representing 1 and 0 In the electrical world, two ways of representing 0 and 1 are (these are not the only ways): Presence or absence of electrical current Different Voltage levels Different voltage levels are the most common Usually 0v for logic 0, some non-zero voltage for logic 1 (i.e. > 3 volts) Can interface external sources to digital systems in many ways Switches, buttons, other human controlled input devices Transducers (change a physical quantity like temperature into a digital quantity). Lecture 1-33 Switch Inputs Vdd High True switch Vdd Vdd is power supply voltage, typically 5V or 3.3V L H Gnd is 0 V Gnd Gnd Switch open (negated), output is L Switch closed (asserted), output is H Lecture 1-34 17

Examples of high, low signals Vdd Low True switch Vdd H L Gnd Gnd Switch open (negated), output is H Switch closed (asserted), output is L Lecture 1-35 CMOS transistors (P, N) S: source G: gate D: drain transistor operation of P, N types is complementary to each other Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-36 18

Inverter gate - takes 2 transistors PMOS is open (off) PMOS is closed (on) NMOS is Closed (on) NMOS is Open (off) Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-37 Truth tables Tabular listing that fully describes a logic function Output value for all input combinations (valuations) x 1 x 2 x 1 x 2 0 0 0 0 1 0 1 0 0 1 1 1 AND x 1 x 2 x 1 + x 2 0 0 0 0 1 1 1 0 1 1 1 1 OR x 1 x 1 0 1 1 0 NOT Lecture 1-38 19

Logic gates and networks Each basic logic operation (AND, OR, NOT) can be implemented resulting in a circuit element called a logic gate A logic gate has one or more inputs and one output that is a function of its inputs x 1 x 1 x x 1 x 2 2 x 2 x 1 x 2 x n x n AND gates Lecture 1-39 Logic gates and networks x 1 x 1 x x 1 + x 2 2 x 2 x 1 + x 2 + + x n x n OR gates x x NOT gate Lecture 1-40 20

Logic gates and networks A larger circuit is implemented by a network of gates Called a logic network or logic circuit x 1 x 2 f = x + x x x 1 2 3 3 Lecture 1-41 Analysis of a logic network The function of a logic network can be described by a timing diagram (gives dynamic behavior of the network) x 1 x 2 A B f 1 0 1 0 1 0 1 0 1 0 Timing diagram Time Lecture 1-42 21

Tri-State Buffer A common way to drive a line or bus from multiple sources is to use a TRISTATE buffer. EN EN A Y A Y When EN = 1, then Y = A. When EN = 0, then Y =?????? Y is undriven, this is called the high impedance state. Designate high impedance by a Z. When EN = 0, then Y = Z (high impedance) Lecture 1-43 Using Tri-State Buffers (cont) Only A or B is enabled at a time. S A Y B Implements 2/1 Mux function If S=0 then Y = A If S=1 then Y = B Lecture 1-44 22

Combinational Building Blocks, Mux Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-45 Binary Adder F (A,B,C) = A xor B xor C G = AB + AC + BC These equations look familiar. These define a Binary Full Adder : A B Sum = A xor B xor Cin Cout A Co B Ci Cin Cout = AB + Cin A + Cin B = AB + Cin (A + B) S Sum Full Adder (FA) Lecture 1-46 23

4-Bit Ripple Carry Adder A(3) B(3) A(2) B(2) A(1) B(1) A(0) B(0) Cout A C(4) Co B Ci C(3) A Co B Ci C(2) A Co B Ci C(1) A Co B Ci C(0) Cin S S S S Sum(3) Sum(2) Sum(1) Sum(0) A[3:0] B[3:0] + SUM[3:0] Lecture 1-47 Incrementer A(3) A(2) A(1) A(0) EN xor xor xor xor Y(3) Y(2) Y(1) Y(0) A[3:0] inc Y[3:0] If EN = 1 then Y = A + 1 If EN = 0 then Y = A EN Lecture 1-48 24

Combinational Right Shifter A combinational block that can either shift right or pass data unchanged Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-49 Understanding the shift operation MSB LSB 0x85 = 1 0 0 0 0 1 0 1 SI = 0 0x42 = 0 1 0 0 0 0 1 0 SI = 0 0x21 = 0 0 1 0 0 0 0 1 SI = 0 0x10 = 0 0 0 1 0 0 0 0 1st right shift 2nd right shift 3rd right shift Etc. Lecture 1-50 25

Clock Signal Review P w rising edge falling edge voltage - period (in seconds) P w - pulse width (in seconds) time f - frequency pulse width (in Hertz) f = 1/ duty cycle - ratio of pulse width to period (in %) duty cycle = P w / millisecond (ms) Kilohertz (KHz) 10-3 10 3 microsecond ( s) Megahertz (MHz) 10-6 10 6 nanosecond (ns) Gigahertz (GHz) 10-9 10 9 Lecture 1-51 Storage Element: The D Flip-Flop D: data input CK: clock input S : set input (asynchronous, low true) R: reset input (asynchronous, low true) Lecture 1-52 26

Synchronous vs. Asynchronous Inputs Synchronous input: Output will change after active clock edge Asynchronous input: Output changes independent of clock S D Q C R State elements often have async set, reset control. D input is synchronous with respect to Clk S, R are asynchronous. Q output affected by S, R independent of C. Async inputs are dominant over Clk. Lecture 1-53 Registers The most common sequential building block is the register. A register is N bits wide and has a load line for loading in a new value into the register. Note that DFF simply loads old value when LD = 0. DFF is loaded every clock cycle. Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-54 27

Counter Very useful sequential building block. Used to generate memory addresses, or keep track of the number of times a datapath operation is performed. Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-55 Shift Register Very useful sequential building block. Used to perform either parallel to serial data conversion or serial to parallel data conversion. Copyright 2005. Thomson/Delmar Learning, All rights reserved. Lecture 1-56 28

What You Need to Know Convert hex, binary integers to decimal Convert decimal integers to hex, binary Convert hex to binary, binary to hex Formats/codes and number/character representation Addition, subtraction of binary, hex numbers Detecting unsigned overflow Basic two-input Logic Gate operation NMOS/PMOS Transistor Operations Inverter/NAND transistor configurations Tri-state buffer operation Mux, Adder operation Clock signal definition DFF, Register, Counter, Shifter register operation Lecture 1-57 29