Grundlagen Microcontroller Interrupts Günther Gridling Bettina Weiss 1
Interrupts Lecture Overview Definition Sources ISR Priorities & Nesting 2
Definition Interrupt: reaction to (asynchronous) external or internal events external event: button is pressed, certain position is reached,... internal event: timer reaches given value, analog/digital converter has finished conversion,... handled by an Interrupt Service Routine (ISR) ISR interrupts normal program flow 3
Interrupt Sources Many different interrupt sources how do we know which one occured? how do we select the ones we want to react to? how do we react to them? what happens if more than one interrupt at same time? 4
Interrupt Bits Which interrupt occured? > Interrupt Flag (IF) one flag for each interrupt source flag is set if interrupt condition occurs flag is generally cleared upon call of ISR flag can be cleared by program ( > possible to poll flag instead of calling ISR) 5
Interrupt Bits Selecting interrupt sources: interrupt enable (IE) global IE bit: enables/disables all interrupts at once after reset, global IE is disabled useful to disable all interrupts (atomic actions) dedicated IE bits: one for each interrupt source if IE set and interrupt condition occurs > ISR is called 6
Relationship IF / IE: Interrupt Bits IF says that the interrupt condition occured IE says that an ISR should be called controller checks the IF, and if it is set and IE is set, it calls the ISR 7
Non Maskable Interrupts non maskable interrupt (NMI) cannot be disabled for very important events (emergency stop) normally just one or two NMIs not every microcontroller has NMIs 8
Interrupt Service Routine How do we react? > Interrupt Service Routine like a subroutine, but some differences called by CPU, not by program CPU does some things, before ISR is executed exit through special instruction RETI controller must know location of ISR > interrupt vector table 9
Interrupt Vector Table Interrupt Vector Table: consecutive area in program memory has a fixed starting address (often at start of program memory, directly after reset vector) each interrupt source has its own entry entry: either address of ISR, or jump to ISR application program sets up the entries controller uses table to locate & call ISR 10
Reaction to Interrupts Reaction of microcontroller to interrupt: set IF finish current instruction check global and local IE; if both are enabled save PC, possibly some registers (on stack) (globally disable interrupts) (clear IF) jump to ISR interrupt latency (time from IRQ to ISR) 11
Interrupt Latency: Interrupt Latency synchronization delay (1 or more clock cycles) finish current execution (max. exec. time cycles) preparatory stuff (push PC, possibly registers) jump to ISR several clock cycles! not constant! 12
Return From Interrupt Reaction upon return from interrupt: (globally enable interrupts) possibly restore registers, restore PC (from stack) (check if other IF set) continue execution of interrupted program again some clock cycles until program is resumed (constant) 13
Interrupt Priorities More than one interrupt: priorities interrupt with highest priority is serviced first priority often fixed (address in vector table) sometimes, user can specify priorities 14
Nested Interrupts Nested Interrupts set global IE in ISR > new interrupts may interrupt current ISR same actions as with interrupting program number of interruptions > nesting level there must be enough stack space for worst case if only higher priority can interrupt > no infinite nesting level even in case of errors 15
reaction to events IF indicates that interrupt condition has occured reaction controlled with IE bits (1 global IE) interrupt service routine priorities nested interrupts Lecture Summary 16