APPENDIX-A INTRODUCTION TO OrCAD PSPICE

Similar documents
Getting started. Starting Capture. To start Capture. This chapter describes how to start OrCAD Capture.

PSpice with Orcad 10

1. Working with PSpice:

PSpice Tutorial. Physics 160 Spring 2006

Lesson 2: DC Bias Point Analysis

SCHEMATIC1 SCHEMATIC2 SCHEMATIC1 SCHEMATIC2 SCHEMATIC3 PAGE1 PAGE2 PAGE3 PAGE1 PAGE1 PAGE2 PAGE1 PAGE1 PAGE2

1. INTRODUCTION. PSpice with OrCAD Capture (release 16.6 edition)

There are three windows that are opened. The screen that you will probably spend the most time in is the SCHEMATIC page.

Lab 5: Circuit Simulation with PSPICE

DC Circuit Simulation

PSpice Analog and mixed signal simulation

Simulation examples Chapter overview

Lesson 18: Creating a Hierarchical Block

Lab 1: Analysis of DC and AC circuits using PSPICE

OrCad & Spice Tutorial By, Ronak Gandhi Syracuse University

Getting Started with Orcad Lite, Release 9.2

Cadence simulation technology for PCB design

Cadence Capture and PSpice Tutorial

Setting up an initial ".tcshrc" file

TUTORIAL 1. V1.1 Update on Sept 17, 2003 ECE 755. Part 1: Design Architect IC

ESE 570 Cadence Lab Assignment 2: Introduction to Spectre, Manual Layout Drawing and Post Layout Simulation (PLS)

EEC 118 Spring 2011 Lab #5 Manchester Carry-Chain Adder

Experiment 1 Introduction to PSpice

Fundamentos de Electrónica Lab Guide

EE 210 Lab Assignment #2: Intro to PSPICE

Using P-SPICE Models for Vishay Siliconix Power MOSFETs

Introduction to FCE1

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Andrew Mason and the AMSaC lab group.

Cadence Tutorial D: Using Design Variables and Parametric Analysis Document Contents Introduction Using Design Variables Apply Apply

EE115C Digital Electronic Circuits. Tutorial 2: Hierarchical Schematic and Simulation

Figure 1: ADE Test Editor

Copyright 2008 Linear Technology. All rights reserved. Getting Started

OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator

Analog IC Simulation. Mentor Graphics 2006

Instructions for EE 42 PSpice Assignment

EEC 116 Fall 2011 Lab #3: Digital Simulation Tutorial

Using PSpice to Simulate Transmission Lines K. A. Connor Summer 2000 Fields and Waves I

DOWNLOAD PDF CADENCE WAVEFORM CALCULATOR USER GUIDE

LTSPICE MANUAL. For Teaching Module EE4415 ZHENG HAUN QUN. December 2016

SPICE Models: ROHM Voltage Detector ICs

Cadence Virtuoso Schematic Design and Circuit Simulation Tutorial

Pspice Tutorial for ELEN 3081 Written by Menachem Gielchinsky

SOUTHERN POLYTECHNIC S. U.

CMOS Design Lab Manual

Lab 1 Modular Design and Testbench Simulation ENGIN 341 Advanced Digital Design University of Massachusetts Boston

EE 330 Spring 2018 Laboratory 2: Basic Boolean Circuits

Orcad Tutorial: Oscillator design and Simulation Schematic Design and Simulation in Orcad Capture CIS Full Version

CS755 CAD TOOL TUTORIAL

Cadence Tutorial C: Simulating DC and Timing Characteristics 1

Revision Notes: July2004 Generate tutorial for single transistor analysis. Based on existing schematic entry tutorial developed for ECE410

CPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2)


Parag Choudhary Engineering Architect

EE 471: Transport Phenomena in Solid State Devices

Introduction to laboratory exercises in Digital IC Design.

What s New OrCAD 16.6 Quarterly Incremental Release #7

PSpice Simulation Using isppac SPICE Models and PAC-Designer

Introduction to PSpice

Lesson 19: Processing a Hierarchical Design

SystemVision Example: H-Bridge SPICE Motor Controller

Previous versions supported SIMPLIS only. Now DVM has been enhanced to allow design verification using the SIMetrix simulator.

PDK-Based Analog/Mixed-Signal/RF Design Flow 11/17/05

TUTORIAL How to Use the SPICE Module

Cadence Tutorial: Schematic Entry and Circuit Simulation of a CMOS Inverter

SmartSpice Verilog-A Interface. Behavioral and Structural Modeling Tool - Device Model Development

Figure C-4 Captured PSpice design schematic (via screen capture)

TUTORIAL How to Use the SPICE Module

Generating a hierarchical Part. OrCAD Capture, OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator

MENTOR GRAPHICS IC DESIGN MANUAL. Schematic & Simulation. Gun Jun K Praveen Jayakar Thomas Zheng Huan Qun

OrCAD Lite Products Reference

CS/EE 5720/6720 Analog IC Design Tutorial for Schematic Design and Analysis using Spectre

One possible window configuration preferences for debug cycles

LTspice Getting Started Guide. Copyright 2007 Linear Technology. All rights reserved.

Verilog Design Entry, Synthesis, and Behavioral Simulation

Lab 2. Standard Cell layout.

How to Get Started. Figure 3

GETTING STARTED WITH ADS

10-MINUTE TUTORIAL DIGITAL LOGIC CIRCUIT MODELING AND SIMULATION WITH MULTISIM

Using Cadence Virtuoso, a UNIX based OrCAD PSpice like program, Remotely on a Windows Machine

OrCAD && PSPICE

EXPERIMENT NUMBER 7 HIERARCHICAL DESIGN OF A FOUR BIT ADDER (EDA-2)

Cadence Tutorial. Introduction to Cadence 0.18um, Implementation and Simulation of an inverter. A. Moradi, A. Miled et M. Sawan

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group.

Cadence SPB: What s New in 16.6 QIR 8 (HotFix 38)

PSpice Optimizer. User s Guide

How To Plot Transconductance and Even More. By Ruida Yun

EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25

Parameter Sweep. Description. Setup. Parameters. Modified by on 13-Sep-2017

EECS 211 CAD Tutorial. 1. Introduction

Lab 1: Cadence Custom IC design tools- Setup, Schematic capture and simulation

Appendix. Using OrCAD. Setup OrCAD

Verilog Tutorial (Structure, Test)

TUTORIAL II ECE 555 / 755 Updated on September 11 th 2006 CADENCE LAYOUT AND PARASITIC EXTRACTION

Defining & Running Circuit Simulation Analyses

Laboratory 3. EE 342 (VLSI Circuit Design) - Using Spectre netlist and Calculator for simulation

Some of the above changes have been made to accommodate Windows Vista User Access Control which write protects the Program Files tree.

6. Latches and Memories

Tutorial 3: Using the Waveform Viewer Introduces the basics of using the waveform viewer. Read Tutorial SIMPLIS Tutorials SIMPLIS provide a range of t

FACULTY OF ENGINEERING MULTIMEDIA UNIVERSITY LAB SHEET DIGITAL INTEGRATED CIRCUIT

Intro to Cadence. Brady Salz. ECE483 Spring 17

Transcription:

220 APPENDIX-A INTRODUCTION TO OrCAD PSPICE

221 APPENDIX-A INTRODUCTION TO OrCAD PSPICE 1.0 INTRODUCTION Computer aided circuit analysis provides additional information about the circuit performance that is some times difficult to obtain with laboratory prototype measurements. A brief over view of PSPICE is given below. 1.1 BRIEF OVER VIEW OF PSPICE Simulation Program for Integrated Circuits Emphasis (SPICE) is a powerful general purpose analog and mixed-mode circuit simulator that is used to verify circuit designs and to predict the circuit behavior. SPICE was originally developed at the Electronics Research Laboratory of the University of California, Berkeley (1975). PSpice is a PC version of SPICE (which is currently available from OrCAD Corporation of Cadence Design Systems, Inc.). The PSpice platform used depends on the SPICE version. There are three platforms available for PSpice. They are 1) PSpice Schematics (version 9.1 or below), 2) PSpice A/D or OrCAD PSpice A/D (version 9.1 or above) and 3) OrCAD Capture (version 9.2 or above). In this thesis OrCAD Capture 10.3 has been used for carrying out simulation of electro-optical hybrid logic circuits. The OrCAD Capture software package has three major interactive programs: Capture, Pspice and Probe. Capture is a powerful program that allows to build circuits by drawing them within a window on the monitor. Pspice A/D allows to specify the type of simulation and analyze the circuit created by Capture and to generate the voltage and current solutions. In addition, PSpice has analog and digital libraries of standard components. This makes it a useful tool for a wide range of analog and digital applications. PSpice simulator is closely integrated with OrCAD Capture to provide you with a rapid design-and-simulate iterative cycle. Probe is a graphic postprocessor that allows to display plots of voltages, currents and power. Capture is not on-

222 ly intended to generate the input for PSpice but also for PCB layout design programs. The circuit drawn using Capture is run from the PSpice menu. The simulation type and settings are specified from the PSpice menu. After the simulation run is completed, Capture automatically opens the PSpice A/D platform for displaying and viewing the output results. 1.2 TYPES OF CIRCUIT ANALYSIS PSpice can be used to perform several types of circuit analyses. Some of the important ones: 1) DC Analysis, 2) AC Analysis and 3) Transient Analysis. These three types of analysis have been used in the thesis and are explained briefly explained in the following. 1.2.1 DC analysis DC Analysis includes the following: can be carried out using DC sweep analysis and bias point analysis depending on the requirement. 1.2.1.1 DC sweep analysis The DC sweep analysis causes a DC sweep to be performed on the circuit that allows to sweep a source (voltage or current), a global parameter, a model parameter, or the temperature through a range of values. The bias point of the circuit is calculated for each value of the sweep. 1.2.1.2 Bias point analysis The bias point is calculated for any analysis whether or not the Bias Point analysis is enabled in the simulation settings dialog box. 1.2.2 AC sweep analysis AC sweep is a frequency response analysis. PSpice calculates the small-signal response of the circuit to a combination of inputs by transforming it around the bias point and treating it as a linear circuit. 1.2.3 Transient analysis A transient analysis calculates the behavior of the circuit as a function of time. The processer for simulating a circuit with PSpice has been explained in the following section.

223 1.3 PROCEDURE FOR SIMULATING A CIRCUIT WITH PSPICE There are four main steps involved in circuit simulation using PSpice. They are: 1) Creating a new project and schematic diagram 2) Instantiating circuit components, connecting them together and setting component values and properties and saving the schematic diagram. 3) Creating a New Simulation Profile and setting up the simulation 4) Simulating the circuit and observing the simulation results 1.3.1 Procedure for creating a new project A new project will be created using the following steps: 1) Start ORCAD 10.3 2) Start All Programs OrCAD 10.3 Capture CIS. 3) Create a New Project: File New Project. 4) Enter Project Name and Location. 5) Select Analog or Mixed A/D. 6) Click OK. 7) Select Create a blank project and Click OK. A blank schematic diagram is created and will be popped up. 1.3.2 Procedure for drawing a schematic diagram To draw a schematic in Pspice, the following steps are generally need: 1) Select the required libraries and choose the required parts/components from the libraries. 2) Place the part in the schematic. 3) Select Wire option in parts menu and connect the parts in the schematic. 4) To place the ground on the circuit: Go to Place => Ground and connect the ground to the circuit. 5) Save the schematic. Now the schematic is ready for simulation.

224 1.3.3 Procedure for setting up a new simulation profile Simulation profiles tell PSpice what type of analysis is desired. Use the PSpice -> New Simulation Profile command to invoke the simulation setting window. If simulation profile is already created and would like to edit it, go to Edit Simulation Profile option. Choose required analysis type from the drop down menu. Adjust the settings as per requirements and say OK. The required simulation profile is created. 1.3.4 Procedure for running the PSpice simulation After creating the new simulation profile, the circuit is ready to simulate. It is done by using the PSpice -> Run command. A new window (the simulation window) will pop up. Any errors in the circuit will be displayed on the bottom left text window. Debug the errors before proceeding furthur. If there are no errors, do one of two things: plot data on the simulation window or display the DC calculations on your schematic. 1.3.5 Procedure for viewing the simulation results 1) Add traces to the probe window 2) Use cursors to analyze waveforms 3) Check the output file, if needed 4) Save or print the results 1.4 PROCEDURES REQUIRED FOR CARRYING OUT DIFFERENT TYPES OF CIRCUIT ANALYSES 1.4.1 Procedure for bias point analysis (DC Calculations) Bias point analysis is carriedout using the following steps: 1) Create a new simulation profile for bias point analysis 2) Choose the analysis type from the drop down menu as: General Settings 3) Press OK and then simulate the circuit using run option.

225 4) To display DC bias voltages and currents on the circuit after running the simulation, go to PSpice => Bias Points, and check Enable, Enable Bias Current Display, and/or Enable Bias Voltage Display. Current and/or voltage values are displayed in the circuit. 1.4.2 Procedure for DC sweep analysis The DC sweep analysis causes a DC sweep to be performed on the circuit that allows you to sweep a source (voltage or current), through a range of values. The following steps are used to perform the DC sweep analysis. 1) Use the PSpice -> New Simulation Profile command to invoke the simulation setting window. If you already have a profile and would like to edit it, go to Edit Simulation Profile 2) Choose the analysis type from the drop down menu as DC sweep. 3) Adjust the settings as per requirements. 4) Options: Primary Sweep 5) Sweep Variable: Voltage Source 6) Type in the name of the source you are sweeping (V 1 or V 2 ). 7) Select Sweep Type: Linear (this is so you can sweep through a range of values) 8) Set the Start, End, and Increment Values and Press OK. 9) Simulate the circuit using run command. 10) Once the simulation is finished a Probe window will open. From the TRACE menu select ADD TRACE and select the voltages and current required to display. 1.4.3 Procedure for transient response Transient analysis deals with the behavior of a circuit as a function of time. It calculates the behavior of the circuit over time. The transient response analysis causes the response of the circuit to be calculated from TIME = 0 to a specified time. Pulse source is used for transient analysis of the Hybrid NOT gate. The symbol of pulse source is PULSE, and the general form is: PULSE (V 1 V 2 TD TR TF PW PER), where, V 1 and V 2 must be

226 specified by the user and can be either voltages and currents. TD is delay time, TR is rise time, TF is fall time, PW is pulse width and PER is period. The transient analysis is carried out using the following steps: 1) Use the PSpice -> New Simulation Profile command to invoke the simulation setting window. If you already have a profile and would like to edit it, go to Edit Simulation Profile. 2) Select the analysis type from the drop down menu as Time Domain (Transient). 3) Adjust the settings as per requirements. Set the appropriate value for Run to time. 4) Select PSpice -> Run from the top menu bar to run the simulation. 1.5 CREATING MODELS USING PSPICE A model defines the behavior of a part. PSpice has built-in algorithms or models that describe the behavior of many device types. The behavior of these built-in models is described by a set of model parameters. One can define the behavior for a device that is based on a built-in model by using the corresponding model parameters. The simulation models are based on PSpice-provided templates and are a new addition to the PSpice model library. Simulation models that are based on PSpice provided templates are also referred to as parameterized models. Parameterized models are specified in terms of model parameters. Changing a parameter changes the behavior of the model. Template-based PSpice models describe the analog simulation behavior of a device in terms of parametric equations. The PSpice-provided templates are available in the TEMPLATES. LIB file. The main advantage of using template-based models is that simulation parameter values can be passed as properties from Capture. Model editor tool can be used to create models in OrCAD Capture. The model editor can be used to derive models from data sheet curves

227 provided by manufacturers or to create models based on PSpice-provided templates. The Model Editor converts information that you enter from the device manufacturer's data sheet into model parameter sets using PSpice.MODEL syntax. The most common way to characterize models is to enter data sheet information for each device characteristic. After satisfied with the behavior of each characteristic, one can have the Model Editor estimate (or extract) the corresponding model parameters and generate a graph showing the behavior of the characteristic. This is called the fitting process. Repeat this process, and when satisfied with the results, save them; the Model Editor creates model libraries containing appropriate model and subcircuit definitions. 1.5.1 Procedure for creating models based on PSpice templates An important advantage of using the template-based PSpice models is that you can pass simulation parameters as properties from the schematic editor. To create a template-based PSpice model, complete the following steps. 1) In Model Editor, create a new library or open an existing library. 2) From the Model menu, choose New. 3) Specify the name of the new model in the Model Name text box. 4) Select the Use Templates option. 5) From the Model drop-down list, select the device type.depending of the device type, you may have to provide some other details. For example, if the device type is Bipolar Transistor, it is also required to specify if the BJT will be of NPN or PNP type. 6) Click OK. The Simulation parameters window appears with the default values of all simulation parameters. These values are editable and can be modified as required.

228 1.6 IMPLEMENTATION OF HIERARCHICAL HYBRID CIRCUITS USING ORCAD CAPTURE Combinational hybrid circuits like half adder, full adder, 4 bit adder and sequential hybrid circuits like clocked hybrid RS latch, hybrid JK flip flop, master slave hybrid JK flip flop, hybrid D latch and clocked hybrid D latch have been implemented using hierarchical design procedure with OrCAD Capture. A bottom up design procedure is used for implementing the hybrid combinational circuits. Creating larger and complex circuit blocks by instantiating smaller circuit blocks is called hierarchical design. A design procedure in which first create lowest level smaller circuit block and then create larger and complex hierarchical circuit blocks for these lowest-level circuit blocks is called bottom up design procedure. To create a hierarchical design using the bottom-up procedure, the following steps are required. -Create the lowest-level design. -Create higher-level designs that instantiate the lower-level designs in the form of hierarchical blocks. The steps involved are: 1) Creating a project in Capture. 2) Creating the lowest-level design. In the full adder design example, the lowest-level design is the half adder design. 3) Creating the higher-level design. Create a schematic for the full adder design that uses the half adder design created in the previous step. In the following, the procedure for creating hierarchical design of full adder is explained. 1.6.1 Procedure for implementing full adder circuit An example To begin with, create a design in Capture by name for example fulladd.dsn. Then follow the steps given below to create hierarchical full adder design using bottom up methodology.

229 1) In the Project Manager window, right-click on fulladd.dsn and select New Schematic. 2) In the New Schematic dialog box, specify the name of the new schematic folder as FULLADD and click OK. 3) In the Project Manager window, the FULLADD folder appears below fulladd.dsn. 4) Save the design. 5) To make the full adder circuit as the root design (high-level design), right-click on FULLADD and from the pop-up menu select Make Root. The FULLADD folder moves up and a forward slash appears in the folder. 6) Right-click on FULLADD and select New Page. 7) In the New Page in schematic: FULLADD dialog box, specify the page name as FULLADD and click OK. A new page, FULLADD, gets added below the schematic folder FULLADD. 8) Double-click the FULLADD page to open it for editing. 9) From the Place menu, choose Hierarchical Block. 10) In the Place Hierarchical Block dialog box, specify the reference as HALFADD_A1. 11) Specify the Implementation Type as Schematic View. 12) Specify the Implementation name as HALFADD and click OK. The cursor changes to a crosshair. 13) Draw a rectangle on the schematic page. A hierarchical block with input and output ports is displayed on the page. X Y SUM CARRY HALFADD_B1 14) If required, resize the block. Also, reposition the input and output ports on the block.

230 To verify if the hierarchical block is correct, right-click on the block and select Descend Hierarchy. The half adder design you created earlier should appear. 15) Place another instance of the hierarchical block on the schematic page. a) Select the hierarchical block. b) From the Edit menu, choose Copy. c) From the Edit menu, choose Paste. d) Place the instance of the block at the desired location. 16) By default, the reference designator for the second hierarchical block is HALFADD_A2. Double-click on the reference designator, and change the reference value to HALFADD_B1. 17) Using the Place Part dialog box, add an OR gate to the schematic. 18) To connect the blocks, add wires to the circuit. From the Place menu, choose Wire. 19) Draw wires from all four ports on each of the hierarchical blocks. 20) Add wires until all the connections are made as shown in the figure below. 21) Add stimulus and input and output ports. 22) Save the design. Now the full adder hierarchical design is ready for simulation and it can be simulated using the simulation procedure already explained.

231 APPENDIX-B PAPER PUBLICATION FROM JOURNAL