Overview of Mechanical Reliability Testing Board-Level Temperature Cycling Monotonic Bend Testing Drop/Shock Testing References and Comments

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June 2011 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. 2011 Freescale Semiconductor, Inc.

Overview of Mechanical Reliability Testing Board-Level Temperature Cycling Monotonic Bend Testing Drop/Shock Testing References and Comments Freescale on Facebook Tag yourself in photos and upload your own! Tweeting? Please use hashtag #FTF2011 2 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. 2011 Freescale Semiconductor, Inc.

Freescale Semiconductor Internal experiments Evaluate effect of material changes Ball alloy, mold compound, substrate supplier, etc. Evaluate PCB pad styles and sizes For customers Industry standard tests Telecommunications: IPC-9701A, IPC-9702 Consumer: JEDEC JESD22-B111 General experiments by FSL FSL standards but data shared with customers Joint experiments with customers FSL cycling Customer assembly FSL Goal: Obtain solder-joint reliability data per industry standards that customers can rely on. Customer Responsibility: Interpreting the data and making a decision if the data is applicable. 4 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Market Segment Drop/Shock Industry Standards Bend Temperature Cycling Telecom Customer specific IPC-9702 IPC-9701A Portable/ Consumer JESD22- B111/Customer specific N/A Customer specific Automotive N/A Customer specific Freescale standard N/A = Typically not performed Mechanical Reliability Testing commonly known as: Board-Level Reliability (BLR), Solder-Joint Reliability (SJR), Temperature Cycling on Board (TCoB) and/or 2 nd Level Reliability 5 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

1st Level Reliability Component Supplier Electrical Function stable with time Package Integrity stable with time Industry standards for test and results Final Assembly Reliability OEM Electrical Function stable with time Solder-Joint life acceptable OEM internal rules { { 2nd Level Reliability Component Supplier Solder-Joint life with time Few industry standards OEM Solder-Joint life with time OEM internal rules 6 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Package Ball Grid Array PCB Electrical Path Example PCB Daisy Chain Pattern Package would have complementary daisy chain. 7 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Attaching Piece Parts to Printed Circuit Boards Comments for most common steps in the assembly industry. Solder Paste Print Solder paste printed on the PCB. Provides a tacky agent to hold parts to boards temporarily. Provides the solder needed to join part to board. Piece Part Placement Automated machinery to accurately place piece parts. Both microprocessors and passives placed by machines. Reflow Joining PCB + solder paste + piece parts go through reflow oven. Reflow oven melts the solder paste and solder balls. The melt causes a solder-joint to form and which freezes upon cool down. The frozen solder is the solder-joint that must mechanically survive. 8 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. 2011 Freescale Semiconductor, Inc.

IPC-9701A Industry Standard Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments Responsible committee mostly telecommunications oriented Can be purchased at www.ipc.org Other Standards FSL internal Automotive Consumer Customer Specific Unique cycling requirements Unique printed circuit board requirements Must use daisy chain packages 10 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Chambers Air Temperature Cycling (ATC) Single chamber - air temperature changed inside chamber Long ramp times, about 10 C/minute For automotive FSL uses -40/125 C condition Large capacity In excess of 100 PCBs, many experiments running together Air-to-Air Thermal Shock (AATS) Dual chamber - move boards/parts between chambers Short ramp times, less than 5 minutes For automotive FSL uses -40/125 C condition Smaller capacity - 6 to 10 experiments running together Monitoring Continuous In-Situ Use event detectors to monitor daisy chain continuity 300 Ohms or higher is considered a failure IPC-SM-785 Typically start resistance is about 1 Ohm Record cycle at which a net/part fails Single Chamber TC System Dual Chamber AATS System 11 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Racks with PCBs Event Detectors Computers Log Failure Data Ribbon Cables for Edge Connectors 12 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Vent with Ribbon Cables PCBs with Ribbon Cables Hot Chamber Computer/ Event Monitor Cold Chamber 13 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Each part is 27x27 mm sq. 14 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Package Package Solder Joint Solder Joint PCB Rest state PCB Raised temperature state Rest state start position Expansion shift for package because of CTE Expansion shift for PCB because of CTE PCB CTE > Package CTE e.g. 14 ppm/k versus 10 ppm/k The CTE mismatch between package and PCB creates shear forces in the solder-joint. The solder-joint acts as the shock absorber and takes the shear by cracks which release the shear force. With enough cycling the crack propagation will in sum break through the solderjoint, part fails. 15 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

% packages failed. From the line fit, the theoretical % of parts that have failed at some cycle count. W/rr: Weibull distribution with the data in Rank Regression order (lowest to highest). Fitted lines to experimental data. Eta: 63.2% failure cycle. A simple number to compare between sample groups, higher is better. Beta: The slope of the fitted line to the actual experimental values. Want this value to be above 4.0. Logarithmic scale for cycles. If linear scale then fitted line is not straight. r^2: Goodness of fit of theoretical line to the experimental values. Definitely want something above 0.9. n/s: total Number of samples/ Suspended (unfailed) samples. (Censored used instead of Suspended sometimes.) 16 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

17 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Dye-n-Pry Failure Analysis Useful for identifying cracks in solder-joints Leaves a visible mark Quick failure analysis technique Process Apply the dye at the gap between package and PCB Dye will flow under the part and creep into solder-joint cracks Make sure to have the dye flow back and forth to push out air Can use a small vacuum chamber for same effect Cure the dye in a bake oven Pry the package from the PCB Practice helps The more damage the solder-joints have the easier to pry free Parts with thermal exposed pad can be very difficult to pull free Inspect solder-joints for evidence of dye color 18 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Solder-joint stronger than PCB so pads rip out of PCB. Red color on solder-joint shows the extent of a crack. Towards the end of the experiment very few solder-joints are alive. For some BGA packages failure locations are at first near the die edge inside the package. (100 MAP) With increasing numbers of Cycles more solder joints are Broken. 19 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. 2011 Freescale Semiconductor, Inc.

Industry Standard Document IPC/JEDEC-9702 Monotonic Bend Characterization of Board-Level Interconnects Developed by standards committee with emphasis on telecommunications Can be purchased at www.ipc.org Document Details Board design for arrangement of parts, size and stackup Description of strain rate and general test methodology 4-point bend test Must use daisy chain packages 21 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Strain gage Daisy chain package Daisy chain net connections 22 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Package Package Solder Joint PCB Rest state Rest state Bend state Solder Joint PCB Bend state Difference between Rest state and Bend state is the length change in the solder-joint for corner solder-joints. The length change is tension forces pulling the part from the PCB. At mechanical limits something in the solder-joint will fail. Slow rate of strain for the test. 23 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Upper Anvil Set PCB Lower Anvil Set 1.) 4-point bend test 2.) Pair of upper and lower anvils 3.) PCB sits between anvils 4.) Rules for spacing between anvils and edge of piece part 5.) Parts face down for bend 6.) Daisy chain resistance net monitoring wires removed 7.) Strain gage monitoring wires removed for clarity 8.) Bend to load cell limit, distance limit or resistance failure (Video may not show in all file formats.) 24 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

25 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Edge Crack 783 IO FC-CBGA Die Crack Dye for Visualization 26 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. 2011 Freescale Semiconductor, Inc.

Industry Standard Board Level Drop Test Method of Components for Handheld Electronic Products Intended for consumer final products Available at www.jedec.org Document Contents Board design: part placement, stackup Maximum size for part is 15x15 mm sq. General test procedure Failure analysis Has not kept up with rapid changes in consumer market. 28 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Video courtesy of Motorola, Inc. (Video may not show in all file formats.) 29 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Package Package Solder Joint PCB Rest state Rest state Shock state Solder Joint PCB Shock state Difference between Rest state and Bend state is the length change in the solder-joint for corner solder-joints. The length change is tension forces pulling the part from the PCB. At mechanical limits something in the solder-joint will fail. VERY FAST rate of strain for the test. 30 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Example JEDEC style drop test printed circuit board 14x14 mm sq., 0.5 mm pitch, 521 IO, Package-on-Package (PoP) 31 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

2 PCBs with parts facing down Drop mass for impact force 1.) G-force impact test 2.) Specific G-forces for impact 3.) FSL uses 1500 G 4.) Two PCBs at a time for throughput 5.) Accelerometer cable not shown 6.) Triax strain gage not shown 7.) Daisy chain resistance net wiring not shown Impact block First drop shows overall behavior Second drop shows boards at impact (Video may not show in all file formats.) 32 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

IPC-9701A Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments IPC/JEDEC-9702 Monotonic Bend Characterization of Board-Level Interconnects IPC-SM-785 Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments JESD22-B111 Board Level Drop Test Method of Components for Handheld Electronic Products Dye Penetrant Analysis Solder Joint Failure Analysis http://dpwsa.electroiq.com/index/display/packaging-article- display/165957/articles/advanced-packaging/volume-12/issue- 1/features/solder-joint-failure-analysis.html 33 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

Mechanical reliability testing becoming more common. Driven by increasing warranties and consumer expectations. Not all areas are covered by industry standards. FSL completes testing on parts and provides the data to FSL customers upon request. Not all products covered. At mechanical limits something will fail. Not immediately a fault for the assembly. Session materials will be posted @ www.freescale.com/ftf Look for announcements in the FTF Group on LinkedIn or follow Freescale on Twitter 34 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.