ELCT 501: Digital System Design

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Transcription:

ELCT 501: Digital System Lecture 4: CAD tools (Continued) Dr. Mohamed Abd El Ghany,

Basic VHDL Concept Via an Example Problem: write VHDL code for 1-bit adder 4-bit adder 2

1-bit adder Inputs: A (1 bit) B (1 bit) Cin (1 bit) Cout A B Cin Outputs Sum = A xor B xor Cin Cout = AB + BC + AC SUM 3

1-bit adder 4

1-bit adder VHDL Code (1-Bit Adder) entity <File Name> is Port ( <Define Inputs & Outputs>); end <File Name>; architecture < > of <Entity Name> is begin {Code implementation} end < >; 5

4-bit adder A3 B3 A2 B2 A1 B1 A0 B0 Cout 1-Bit Adder w3 1-Bit Adder w2 1-Bit Adder w1 1-Bit Adder Cin= 0 SUM 3 SUM 2 SUM 1 SUM 0 Unit 4 Unit 3 Unit 2 Unit 1 6

4-bit adder A3 B3 A2 B2 A1 B1 A0 B0 Cout 1-Bit Adder 1-Bit Adder 1-Bit Adder w3 w2 w1 1-Bit Adder Cin= 0 SUM 3 Unit 4 SUM 2 SUM 1 SUM 0 Unit 3 Unit 2 Unit 1 7

4-bit adder - VHDL entity adder4 is Port ( A : in STD_LOGIC_VECTOR (3 downto 0); B : in STD_LOGIC_VECTOR (3 downto 0); sum : out STD_LOGIC_VECTOR (3 downto 0); cout : out STD_LOGIC); end adder4; 8

Basic VHDL Concept Via an Example Problem: write VHDL code to specify the circuit of one-digit BCD (Binary Coded Decimal) adder (shown in the following figure) 9

Binary Coded Decimal Representation Z= X+Y IF Z <= 9, then S = Z and carry-out = 0 IF Z > 9, then X = Z + 6 and carry-out = 1 X 0 1 1 1 7 +Y + 0 1 0 1 +5 Z 1 1 0 0 12 + 0 1 1 0 1 0 0 1 0 S = 2 10

Binary Coded Decimal Representation Z= X+Y IF Z <= 9, then S = Z and carry-out = 0 IF Z > 9, then X = Z + 6 and carry-out = 1 X 1 0 0 0 8 +Y + 1 0 0 1 +9 Z 1 0 0 0 1 17 + 0 1 1 0 1 0 1 1 1 S = 7 11

Binary Coded Decimal Representation 12

Basic VHDL Concept Via an Example Problem: write VHDL code to specify the circuit in the following figure comparator circuit 13

Comparator Circuit X< Y is detected by N xor V=1 X=Y is detected by Z=1 X Y is detected by Z+(N xor V)=1 X>Y is detected by Z+(N xor V)=1 X Y is detected by N xor V=1 14

Comparator Circuit 15

Digital Logic Classification Digital Logic Combinational o/p s depend on i/p s only E.g. Logic Gates Sequential o/p s depend on i/p s & state of storage elements Asynchronous E.g. Latches Synchronous E.g. Flip Flops 16

VHDL for Combinational Circuit Selected Signal Assignment A selected signal assignment allows a signal to be assigned one of several values, based on a selection criterion W0 f W1 s 2-to 1 multiplexer 17

VHDL for Combinational Circuit Selected Signal Assignment W0 W1 W2 W3 f 2 s 4-to 1 multiplexer 18

VHDL for Combinational Circuit Conditional Signal Assignment Similar to the selected signal assignment, a conditional signal assignment allows a signal to be set to one of several values The priority level associated with each WHEN clause in the conditional signal assignment is a key difference from the selected signal assignment 19

VHDL for Combinational Circuit Think about the efficient code Less efficient code 20

VHDL for Combinational Circuit CASE Statement Similar to the selected signal assignment- the case statement has a selection signal and includes WHEN clause for various valuations of this selection signal. 2-to-4 binary decoder 21

VHDL for Combinational Circuit VHDL operators. Operator category Operator symbol Operation performed Logical AND OR NAND NOR XOR XNOR NOT AND OR Not AND Not OR XOR Not XOR NOT 22

VHDL for Combinational Circuit VHDL operators. Operator category Operator symbol Operation performed = Equality /= Inequality Relational > Greater than < Less than >= Greater than or equal to <= Less than or equal to 23

VHDL for Combinational Circuit VHDL operators. Operator category Operator symbol Operation performed Arithmetic + Addition - Subtraction Concatenation & Concatenation Examples:. C <= A B; Puts the difference of A and B into C D <= A & B; using three-bit vectors; A(2 downto 0), B(2 downto 0), the output D will be: D= a 1 a 2 a 3 b 1 b 2 b 3 (six-bit vector) 24

VHDL for Combinational Circuit VHDL operators. Operator category Operator symbol Operation performed SLL Shift left logical Shift and Rotate Examples:. B <= A SLL; SRL ROL ROR B <= A ROR 2; Shift right logical Rotate left Rotate right b2=a1, b1= a0, and b0= 1 b2=a1, b1= a0, and b0= a2 25

VHDL for Sequential Circuit With the info we encountered so far, can we build this? button When the button is pushed: 1) Turn on the light if it is off 2) Turn off the light if it is on light The light should change state within a second of the button press No! 1. state i.e. the circuit should have memory 2. The o/p changes by an i/p event (pushing a button) 26

What is a latch? 27

D Latch Logic diagram Function table 28

VHDL for D Latch Function table 29

What is a FF? Simply, it is a clocked latch Function table 30

Alternative code for a D Flip-flop A process that uses a WAIT UNTIL statement is a special case because the sensitivity list is omitted Function table 31

D Flip-flop with Asynchronous reset Function table 32

D Flip-flop with synchronous reset 33

Four bit up-counter 34

Four bit up-counter : testing 35

Four bit up-counter : testing 36

Four bit up-counter 37