ELEC 301 Lab 2: Cadence Basic

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ELEC 301 Lab 2: Cadence Basic Revision: 2.1 Last modified: Aug. 98 Introduction In this class, you will be introduced to the Cadence suit of IC design tools. These tools are a very powerful set of tools. They are very popular in industry and can do everything from schematic entry, circuit simulation and layout all the way to design a complete microprocessor. Consider that the Power PC group and Pentium group both use a subset of the tools that we will use in this class. Obviously, these tools are very powerful, but because of that they also have a pretty high learning curve. In the next lab, the basics of Cadence Design Framework and schematic capture of a simple inverter in transistor level will be covered. Notice that unlike most of the other design courses, we will not be working with discrete components (i.e. TTL parts, transistors, LEDs, etc.) in this class. Instead, we will design the actual chips themselves, thus giving us greater flexibility. Design Specification Schematic Entry (Lab 3 & 4) Circuit Simulation (Lab 3 & 4) Post-layout Simulation (Lab 7) Layout Verification (Lab 7) Physical Layout Editing (Lab 5 & 6) ELEC301 I.C. Design Flow Starting Cadence Step 1. Change directory to your Cadence working directory by typing cd ~/cadence 1.1 Start Cadence Design by typing icfb & This step will take few seconds to execute. After that, the main Cadence window, the Command Interpreter Window (CIW) appears. ELEC301 Dept. of ELEC, HKUST Page 1 of 6

The title of the window will be icfb Log: /afs/ee.ust.hk/ /CDS.log. This CDS.log file will store all the Cadence commands you use during this session. It is also very useful to help you figure out why some problems occur. You should always watch the messages in the CIW window very carefully during the lab session and report any errors or warnings to the lab instructor. 1.2 Quit Cadence by clicking the left mouse button on the menu File -> Exit of the CIW. Click on Yes to answer the confirmation box to finally exit Cadence. IMPORTANCE: Never attempt to quit Cadence by other means. It will leave the Cadence program running even you logout. 1.3 To logout of the workstation, hold down the right mouse button on the screen background (an area where no windows exist), drag the mouse to the Exit command and click on Exit. You are now logged off the system. Creating Cadence Library You will now create your own design library. You can think of libraries as being analogous to directories in a file system. Like grouping related files in a directory, we will group all our related design data in a Cadence library. For example, you may want to create a new library for your project to put all related designs in it. Step 2. Start Cadence again in your Cadence working directory. 2.1 In CIW, click on HKUST -> MOSIS -> Change/Set Default Technology A window entitled Change/Set Technology Form will appear as below Click on this button ELEC301 Dept. of ELEC, HKUST Page 2 of 6

2.2 Then, click the button next to HP 0.8um to change the technology to HP 0.8um process and click on the OK button. This brings up another window entitled Information. Click on the Close button. Quit and restart Cadence. The technology defines the design rules, physical layer names, colors, SPICE simulation parameters, etc. The choice of technology depends on the process that your designs are using. In this course, you will be using a MOSIS 0.8um process and all the information regarding that process is stored in a technology library. 2.3 In CIW, click on HKUST -> MOSIS -> Create Library. This brings up another window entitled Create Library Form. Click on the Library Name field (not on the words themselves, but rather in the box opposite to it). The box should be highlighted now with a black border. Type in the library name, mylib. Also, notice that, next to the Current Technology field, it should display "HP 0.8um" that you have just selected. Type mylib 2.4 Click on OK in the Create Library Form. The Create Library Form will disappear. Look for the following message in the CIW window: Info: Creating library... Info: Library created. Info: Click on View->Reflesh in Library Manager for reflesh library list If there are any warnings or errors in the CIW, show them to the lab instructor to ask for remedial action. Using Library Manager Cadence uses the Library Manager to do all of its file management tasks such as opening a file, creating a new file, deleting files, copying files, etc. Step 3. In the CIW, click on Tools -> Library Manager. The library manager will appear as shown below: ELEC301 Dept. of ELEC, HKUST Page 3 of 6

libraries cellviews cells Step 4. Create new design. 4.1 In CIW, click File -> New -> Cellview The Create New File form will appear. Choose the Library Name and Tool to be mylib and Composer-Schematic respectively. Also, enter the Cell Name and View Name as shown below. 4.2 Click on OK. A blank schematic window will appear. You will learn about schematic entry in Lab 3. You should also notice that the newly created cellview appears in the Library Manager. 4.3 In the schematic window, click on Window -> Close. 4.4 Create one more design for exercise. Repeat 4.1 except View Name and Tool are changed to layout and Virtuoso. ELEC301 Dept. of ELEC, HKUST Page 4 of 6

4.5 We will discuss the layout editor in Lab 5. Close the layout window with the same procedure as you just done before. You have one Cell called test and 2 Views associate with it under mylib. Step 5. Open existing designs using Library Manager. 5.1 In the Library Manager, expand the design by clicking on mylib, test and schematic under Library, Cell and View entries in sequence. 5.2 Hold down the middle mouse button at the expanded schematic. A sub-menu will appear. 5.3 Drag the mouse pointer to Open and release the mouse button. The schematic shows up. 5.4 Try to open test layout and other cellviews under different directories. Notice that for designs not owned by you, you should drag the mouse pointer to Open (Read-Only) instead of Open. Step 6. Copy design. 6.1 Hold down the middle mouse button at the cellview mylib - test schematic. 6.2 Drag the mouse pointer to Copy and then release the mouse button. A Copy View form will appear. 6.3 Fill in the form as shown below. ELEC301 Dept. of ELEC, HKUST Page 5 of 6

6.4 Click on OK. You will see that there is a cell called test1 with cellview schematic in the Library Manager. Step 7. Rename design. 7.1 Hold down the middle mouse button at the cell mylib - test. 7.2 Drag the mouse pointer to Rename and then release the mouse button. A Rename Cell mylib/test form shows up. 7.3 Fill in the form as shown below. 7.4 Click on OK. You will see that the original cell test is renamed to test2 in the Library Manager. Step 8. Delete design. 8.1 Hold down the middle mouse button at the cellview mylib test2 - layout. 8.2 Drag the mouse pointer to Delete and then release the mouse button. 8.3 Click on OK on the Delete Cellviews form. The Delete Confirmation box will pop up. Click on Yes. You will notice that the cellview layout of test2 disappears in the Library Manager. IMPORTANT NOTES Never start two icfb simultaneously. It will make you Cadence data corrupted and can t be recovered. End of Lab ELEC301 Dept. of ELEC, HKUST Page 6 of 6