Arithmetic Logic Unit (ALU) Introduction to Computer Yung-Yu Chuang with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken (www.nand2tetris.org) and Harris & Harris (DDCA)
Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. We build 4-bit adder: 9 inputs, 4 outputs. Same idea scales to 28-bit adder. Key computer component. 2 4 8 7 + 3 5 7 9 6 6 6 2
Binary addition Assuming a 4-bit system: + + no overflow overflow Algorithm: exactly the same as in decimal addition Overflow (MSB carry) has to be dealt with. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 2: Boolean Arithmetic slide 3
Representing negative numbers (4-bit system) - 2-2 3-3 4-4 5-5 6-6 7-7 -8 The codes of all positive numbers begin with a The codes of all negative numbers begin with a To convert a number: leave all trailing s and first intact, and flip all the remaining bits Example: 2-5 = 2 + (-5) = + = -3 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 2: Boolean Arithmetic slide 4
Let's Make an Adder Circuit Step. Represent input and output in binary. + x 3 x 2 x x + y 3 y 2 y y z 3 z 2 z z 5
Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. Step 2. [first attempt] Build truth table. 4-Bit Adder Truth Table c out + c in x 3 x 2 x x y 3 y 2 y y z 3 z 2 z z c x 2 x y 2 y y z 3 z 2 z z x 3 x y 3 2 8+ = 52 rows!............. Q. Why is this a bad idea? A. 28-bit adder: 2 256+ rows >> # electrons in universe! 6
-bit half adder We add numbers one bit at a time. x y ADD c s x y s c 7
x y -bit full adder x y s C in C out ADD C in C out s 8
8-bit adder 9
Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. c out c 3 c = c 2 c Step 2. [do one bit at a time] Build truth table for carry bit. Build truth table for summand bit. + x 3 x 2 x x y 3 y 2 y y z 3 z 2 z z Carry Bit x i y i c i c i+ Summand Bit y i c i z i x i
Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. Step 3. Derive (simplified) Boolean expression. Carry Bit Summand Bit y i x i c i c i+ MAJ y i c i z i ODD x i
Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. Step 4. Transform Boolean expression into circuit. Chain together -bit adders. 2
Adder: Interface 3
Adder: Component Level View 4
Adder: Switch Level View 5
Subtractor Subtractor circuit: z = x y. One approach: design like adder circuit
Subtractor Subtractor circuit: z = x y. One approach: design like adder circuit Better idea: reuse adder circuit 2 s complement: to negate an integer, flip bits, then add 7
Subtractor Subtractor circuit: z = x y. One approach: design like adder circuit Better idea: reuse adder circuit 2 s complement: to negate an integer, flip bits, then add 8
Shifter Only one of them will be on at a time. s s s 2 s 3 x x x 2 SHIFT x 3 z z z 2 z 3 4-bit Shifter 9
Shifter s s s 2 s 3 z z z 2 z 3 2
Shifter z z z 2 z 3 s x x x 2 x 3 s x x x 2 s 2 x x s 3 x z = s x + s + s2 + s3 z = s x + s x + s2 + s3 z2 = s x2 + s x + s2 x + s3 z3 = s x3 + s x2 + s2 x + s3 x 2
Shifter z = s x + s + s2 + s3 z = s x + s x + s2 + s3 z2 = s x2 + s x + s2 x + s3 z3 = s x3 + s x2 + s2 x + s3 x 22
N-bit decoder N-bit Decoder N address inputs, 2 N data outputs Addresses output bit is ; all others are 23
N-bit decoder N-bit Decoder N address inputs, 2 N data outputs Addresses output bit is ; all others are 24
2-Bit Decoder Controlling 4-Bit Shifter Ex. Put in a binary amount r r to shift. 25
Arithmetic Logic Unit Arithmetic logic unit (ALU). Computes all operations in parallel. Add and subtract. Xor. And. Shift left or right. Q. How to select desired answer? 26
Hot OR hot OR. All devices compute their answer; we pick one. Exactly one select line is on. Implies exactly one output line is relevant. adder xor x. = x shifter x. = x + = x 27
Hot OR adder x. = x x. = x + = x decoder xor shift 28
Bus 6-bit bus Bundle of 6 wires Memory transfer Register transfer 8-bit bus Bundle of 8 wires TOY memory address 4-bit bus Bundle of 4 wires TOY register address 29
Bitwise AND, XOR, NOT Bitwise logical operations Inputs x and y: n bits each Output z: n bits Apply logical operation to each corresponding pair of bits 3
TOY ALU Big combinational logic 6-bit bus TOY ALU Add, subtract, and, xor, shift left, shift right, copy input 2 3
Device Interface Using Buses 6-bit words for TOY memory Device. Processes a word at a time. Input bus. Wires on top. Output bus. Wires on bottom. Control. Individual wires on side. 32
Arithmetic logic unit. Add and subtract. Xor. And. Shift left or right. ALU Arithmetic logic unit. Computes all operations in parallel. Uses -hot OR to pick each bit answer. How to convert opcode to -hot OR signal? 33
34
35
Hack ALU x y 6 6 6-bit adder 6 out zx nx zy ny f no out(x, y, control bits) = x+y, x-y, y x, x y 6 bits 6 bits ALU 6 bits out,, -, x, y, -x, -y, x!, y!, x+, y+, x-, y-, x&y, x y zr ng
Hack ALU
The ALU in the CPU context (a sneak preview of the Hack platform) c,c2,,c6 D register D A register A a ALU out RAM M Mux A/M (selected register) Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 2: Boolean Arithmetic slide 38
Perspective Combinational logic Our adder design is very basic: no parallelism It pays to optimize adders Our ALU is also very basic: no multiplication, no division Where is the seat of more advanced d math operations? a typical hardware/software tradeoff. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 2: Boolean Arithmetic slide 39