Intel Stress Bitstreams and Encoder (Intel SBE) HEVC Getting Started

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Intel Stress Bitstreams and Encoder (Intel SBE) 2017 - HEVC Getting Started (Version 2.3.0) Main, Main10 and Format Range Extension Profiles Package Description This stream set is intended to validate a decoder for HEVC Main, Main10 and some of Format Range Extension Profiles (Main 4:2:0 12, Main 4:2:2 10, Main 4:2:2 12, Main 4:4:4 10, Main 4:4:4 12, Monochrome and Monochrome 12 profiles) compliance. It covers features of these profiles bit stream format and makes it easy to verify that the decoder's compliance to standard. The package contains: HEVC compressed bitstreams o Package includes files of 500 frames at 432 240 resolution files of 100 frames at 1920 1080 resolution file with variable resolution from 4 4 to 128 128 files of 20 frames of 3840x2160 resolution (UHD streams package) files of 20 frames of 7680x4320 resolution (UHD streams package) MD5 check sums for decoding results of each encoded file all_bitstreams.md5 file with check sums for all encoded files number of bytes read from reconstructed buffer while decoding evaluated by simple memory model and number of bytes read per source sample Table with detailed description of each bitstream: enabled coding tools and possible values. The decoding result is assumed correct if it binary-matches to the result of the reference decoder. This can be verified with the md5-files included within the package. All the streams are HEVC compliant - this package doesn t contain any invalid streams for error-resilience testing. Also this package is not intended for decoder-performance testing since a lot of bitstream features have distributions not typical for real-world video: many long motion vectors pointing out of frame, areas with random noise, highly variable QP values, etc. The stream package consists of several buckets. Some buckets validate the features presumably related to intra and inter prediction correspondingly, and other buckets contains streams covering other HEVC format features not directly related to intra or inter prediction. There are some types of streams like Syntax, Stress, Smaller etc. Syntax streams are designed to test a certain subset of features, for example, all the intra-prediction modes or all loop-filter related parameters. Stress streams include all the features covered by the bucket, so they are useful for smoke testing: if a decoder passes the Stress stream, it is likely to pass all the Syntax streams from the bucket. A Smaller stream is similar to a Stress stream of INTER bucket, the major purpose is to test the decoder s ability to handle very small resolutions. Syntax streams are provided in two versions: 500 frames of 432 240 and 100 frames of 1920 1080. Stress streams include Memaccess streams that are provided for testing memory consumption of the decoder when it uses reconstructed pixel storage. 501 and 60x streams are provided to validate Format Range Extension specific syntax. *Other names and brands may be claimed as the property of others. Page 1 of 7

File name pattern All files are named corresponding to the following pattern: (Purpose)_HEVC_(level)_(resolution)_(frame rate)_ (id)_ (bucket/name)_ (encoder_version).hevc (purpose) is Syntax, Stress, Smaller etc; (level) is HEVC main profile level (See HEVC specification Appendix A) (resolution) is pair of frame width and height joint with x (frame rate) is number of frames per second followed by fps (id): either an index of stream in the bucket; (bucket/name): INTRA, INTER or EXTRA / special feature name, e.g. tiles or wpp ; (encoder_version): version of encoder used for stream generation. Package may contain streams of different encoder versions. For example, Syntax_HEVC_Main10HT50_1920x1080_30fps_003_intra_1.0.hevc is the third stream from INTRA bucket. Pair of (id) and (bucket/name) is a short description of the content of the stream. Video content Each bitstream is encoded from a synthetic video sequence. Encoded sequences may have strong visual artifacts, mostly due to high QP values, random prediction, blocks with random residual data and randomly placed skip flag. Bitstreams contain frame sequences with bit depth varying from 8 to 12 both in luma and chroma independently. Stream Description Stream name Description INTRA bucket Resolution, number of frames 001_intra All intra prediction modes for CU size 64x64, PUs 2Nx2N and all TU sizes 002_intra All intra prediction modes for CU size 64x64 and 32x32, all PUs and all TU sizes. Intra smoothing is enabled. 003_intra All intra prediction modes for CU size 64x64, 32x32 and 16x16, all PUs and all TU sizes. 004_intra All intra prediction modes for CU size 64x64, 32x32, 16x16 and 8x8, all PUs and all TU sizes. 005_intra 006_intra All intra prediction modes for all CU size, all PUs and all TU sizes. Transform skip, transquant bypass and sign hiding are enabled. *Other names and brands may be claimed as the property of others. Page 2 of 7

007_intra 008_intra 009_intra 010_intra Enabled delta QP. Enabled IPCM. Enabled scaling list. Enabled deblocking. INTER bucket 101_inter 102_inter 103_inter 104_inter 105_nter 106_inter 107_inter 108_inter 109_inter 110_inter 111_inter 112_inter P frames with AMVP PUs and intra CTBs. 64x64 CU sizes. No skip blocks. One reference. P frames with AMVP PUs and intra CTBs. All CU sizes. Several references. TMVP enabled. P frames with AMVP and merge PUs and P frames with AMVP and merge PUs and Enabled deblocking. P frames with AMVP and merge PUs and Enabled scaling list. P frames with all PUs and all CU sizes. Several references. P frames with all PUs and all CU sizes. Several references. Enabled dependent slices. Many slices. B frames with AMVP PUs and intra CTBs. 64x64 CU sizes. No skip blocks. One reference. B frames with AMVP PUs and intra CTBs. All CU sizes. Several references. TMVP enabled. B frames with AMVP PUs and intra CTBs. All CU sizes. Several references. TMVP enabled. B frames with AMVP and merge PUs and Several references. Enabled deblocking and scaling list. *Other names and brands may be claimed as the property of others. Page 3 of 7

113_inter 114_inter 115_inter 116_inter Several references. Enabled dependent slices. Many slices. Several references. Enabled SAO. Several references. Enabled dependent slices and SAO. Many slices. Several references. Enabled weighted prediction. EXTRA bucket 201_inter_tile 202_inter_wpp 203_inter_sei 204_temporal 301_intra 302_inter 401_memaccess Several references. Enabled tiles. Several references. Enabled wavefront. Several references. Enabled many different SEI messages. Several references. Enabled temporal layers. STRESS bucket Enabled dependent slices. Many slices. Several references. Enabled all of the above. Maximized number of motion vectors, no skip and merge modes, maximized split to small coding units, used AMP; maximized deblocking and SAO usage. 3840 2160, 20 frames; 3840 2160, 20 frames; 1920x1080, 100 frames; 402_slicess Maximized number of slices. 1920x1080, 100 frames; 403_tiles Maximized number of tile columns. 1920x1080, 100 frames; *Other names and brands may be claimed as the property of others. Page 4 of 7

404_tiles Maximized number of tile rows. 1920x1080, 100 frames; 608_rext Enabled all technologies of RExt profiles; extended QP range. 1920x1080, 100 frames; MIXED bucket smaller Enabled everything 1300 frames of resolution from 4x4 to 128x128. REXT bucket 501_main422_10bit High precision offsets and chroma QP offset lists are enabled 1920x1080, 100 frames; 601_rext Enabled cross color component prediction 1920x1080, 100 frames; 602_rext Enabled transform skip rotation 1920x1080, 100 frames; 603_rext Enabled transform skip context modification 1920x1080, 100 frames; 604_rext Enabled RDPCM modes 1920x1080, 100 frames; 605_rext Disabled intra smoothing 1920x1080, 100 frames; 606_rext Enabled persistent Rice adaptation 1920x1080, 100 frames; 607_rext Enabled CABAC bypass alignment 1920x1080, 100 frames; 001-501 These streams are provided for Monochrome and Monochrome 12 Same resolution and frames Longterm bucket 701_longterm Enabled longterm frames generation 1920x1080, 100 frames; *Other names and brands may be claimed as the property of others. Page 5 of 7

Error resilience streams Error resilience streams are of 432x240 resolution, each named according to specific problem it aimed at reference JCT-VC HM Decoder. *Other names and brands may be claimed as the property of others. Page 6 of 7

Legal Information No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps. The products and services described may contain defects or errors known as errata which may cause deviations from published specifications. Current characterized errata are available on request. Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548-4725 or by visiting www.intel.com/design/literature.htm. HEVC (H.265), MPEG-1, MPEG-2, MPEG-4, H.261, H.263, AVC (H.264), MP3, DV, VC-1, MJPEG, AC3, AAC, G.711, G.722, G.722.1, G.722.2, AMRWB, Extended AMRWB(AMRWB+), G.167, G.168, G.169, G.723.1, G.726, G.728, G.729, G.729.1, GSM AMR, GSM FR are international standards promoted by ISO, IEC, ITU, ETSI, 3GPP and other organizations. Implementations of these standards, or the standard enabled platforms may require licenses from various entities, including Intel Corporation. Intel, the Intel logo, Intel Core are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. Optimization Notice Intel's compilers may or may not optimize to the same degree for non-intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 *Other names and brands may be claimed as the property of others. Page 7 of 7