CS 261 Fall Mike Lam, Professor. Combinational Circuits

Similar documents
CS 261 Fall Mike Lam, Professor. Logic Gates

CS429: Computer Organization and Architecture

Henry Lin, Department of Electrical and Computer Engineering, California State University, Bakersfield Lecture 7 (Digital Logic) July 24 th, 2012

Digital Logic Design Exercises. Assignment 1

6.1 Combinational Circuits. George Boole ( ) Claude Shannon ( )

BUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book

6.1 Combinational Circuits. George Boole ( ) Claude Shannon ( )

QUESTION BANK FOR TEST

Computer Organization and Levels of Abstraction

EXPERIMENT #8: BINARY ARITHMETIC OPERATIONS

Computer Organization and Levels of Abstraction

Topics of this Slideset. CS429: Computer Organization and Architecture. Digital Signals. Truth Tables. Logic Design

Systems Programming. Lecture 2 Review of Computer Architecture I

Reference Sheet for C112 Hardware

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 3, 2015

Lecture #21 March 31, 2004 Introduction to Gates and Circuits

GC03 Boolean Algebra

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 2, 2016

Many ways to build logic out of MOSFETs

LECTURE 4. Logic Design

Boolean Logic CS.352.F12

Let s put together a Manual Processor

UC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks

UC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks

Basic Arithmetic (adding and subtracting)

CSC 220: Computer Organization Unit 10 Arithmetic-logic units

Combinational Circuits

Chapter 2 Logic Gates and Introduction to Computer Architecture

Injntu.com Injntu.com Injntu.com R16

Von Neumann Architecture

Arithmetic-logic units

Arithmetic Logic Unit. Digital Computer Design

CS101 Lecture 25: The Machinery of Computation: Computer Architecture. John Magee 29 July 2013 Some material copyright Jones and Bartlett

Lecture Topics. Announcements. Today: Integer Arithmetic (P&H ) Next: continued. Consulting hours. Introduction to Sim. Milestone #1 (due 1/26)

History of Computing. Ahmed Sallam 11/28/2014 1

Combinational Logic II

Computer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra

Code No: R Set No. 1

CS140 Lecture 03: The Machinery of Computation: Combinational Logic

Code No: R Set No. 1

CONTENTS CHAPTER 1: NUMBER SYSTEM. Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii)

6. Combinational Circuits. Building Blocks. Digital Circuits. Wires. Q. What is a digital system? A. Digital: signals are 0 or 1.

Digital Systems. John SUM Institute of Technology Management National Chung Hsing University Taichung, ROC. December 6, 2012

3. The high voltage level of a digital signal in positive logic is : a) 1 b) 0 c) either 1 or 0

DIGITAL ELECTRONICS. P41l 3 HOURS

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

CO Computer Architecture and Programming Languages CAPL. Lecture 9


CS 31: Intro to Systems Digital Logic

COMP combinational logic 1 Jan. 18, 2016

Introduction to Computer Science. Homework 1

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 09 MULTIPLEXERS

Lecture 10: Combinational Circuits

1. Boolean algebra. [6] 2. Constructing a circuit. [4] 3. Number representation [4] 4. Adders [4] 5. ALU [2] 6. Software [4]

ECE 550D Fundamentals of Computer Systems and Engineering. Fall 2017

COMPUTER ARCHITECTURE AND ORGANIZATION Register Transfer and Micro-operations 1. Introduction A digital system is an interconnection of digital

ECEN 468 Advanced Logic Design

ECE468 Computer Organization & Architecture. The Design Process & ALU Design

Arab Open University. Computer Organization and Architecture - T103

UPY14602-DIGITAL ELECTRONICS AND MICROPROCESSORS Lesson Plan

1. Mark the correct statement(s)

END-TERM EXAMINATION

EE292: Fundamentals of ECE

DIGITAL ELECTRONICS. Vayu Education of India

Lecture (05) Boolean Algebra and Logic Gates

Topics. Computer Organization CS Exam 2 Review. Infix Notation. Reverse Polish Notation (RPN)

Digital Design with FPGAs. By Neeraj Kulkarni

Midterm Project Design of 4 Bit ALU Fall 2001

211: Computer Architecture Summer 2016

Introduction to Boole algebra. Binary algebra

REGISTER TRANSFER LANGUAGE

Boolean Algebra and Logic Gates

ECE 331: N0. Professor Andrew Mason Michigan State University. Opening Remarks

Parallel logic circuits

COMBINATIONAL LOGIC CIRCUITS

CS 261 Fall Mike Lam, Professor Integer Encodings

Sample Exam I PAC II ANSWERS

Chapter 4 Arithmetic

CS 24: INTRODUCTION TO. Spring 2015 Lecture 2 COMPUTING SYSTEMS

FPGA Design Challenge :Techkriti 14 Digital Design using Verilog Part 1

(ii) Simplify and implement the following SOP function using NOR gates:

Review. Pipeline big-delay CL for faster clock Finite State Machines extremely useful You ll see them again in 150, 152 & 164

Overview. CSE372 Digital Systems Organization and Design Lab. Hardware CAD. Two Types of Chips

CS 2630 Computer Organization. Meeting 13: Faster arithmetic and more operations Brandon Myers University of Iowa

R10. II B. Tech I Semester, Supplementary Examinations, May

Digital Circuit Design and Language. Datapath Design. Chang, Ik Joon Kyunghee University

Electronic Engineering Part 1 Laboratory Experiment. Digital Circuit Design 1 Combinational Logic. (3 hours)

ECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012

Music. Numbers correspond to course weeks EULA ESE150 Spring click OK Based on slides DeHon 1. !

HANSABA COLLEGE OF ENGINEERING & TECHNOLOGY (098) SUBJECT: DIGITAL ELECTRONICS ( ) Assignment

ECE 341 Midterm Exam

Chapter 4. The Processor

DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES

UNIT - V MEMORY P.VIDYA SAGAR ( ASSOCIATE PROFESSOR) Department of Electronics and Communication Engineering, VBIT

Mark Redekopp, All rights reserved. EE 352 Unit 8. HW Constructs

Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic

Code No: R Set No. 1

COSC 243. Computer Architecture 1. COSC 243 (Computer Architecture) Lecture 6 - Computer Architecture 1 1

Unit 2: Data Storage CS 101, Fall 2018

Submitted by 1

Transcription:

CS 261 Fall 2017 Mike Lam, Professor Combinational Circuits

The final frontier Java programs running on Java VM C programs compiled on Linux Assembly / machine code on CPU + memory??? Switches and electric signals

Aside: Relays From Code recommended reading: Question: what happens if we connect the light bulb to the other contact? Relay

Aside: Relays From Code recommended reading: Regular relay Inverted relay (NOT)

Aside: Relays From Code recommended reading: ON ON ON

Aside: Relays From Code recommended reading: ON ON ON Relays in series (AND) Relays in parallel (OR)

Digital hardware Digital signals are transmitted via electric signals by varying voltages 1.0 V (high) = binary 1 0.0 V (low) = binary 0 Use a threshold to distinguish Images from https://learn.sparkfun.com/tutorials/transistors

Digital hardware Digital signals are transmitted via electric signals by varying voltages 1.0 V (high) = binary 1 0.0 V (low) = binary 0 Use a threshold to distinguish AND OR Images from https://learn.sparkfun.com/tutorials/transistors

Transistors Transistors are the fundamental hardware component of computing Similar to relays; replaced vacuum tubes Smaller, more reliable, and use less energy Primary functions: switching and amplification Mostly silicon-based semiconductors now Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) n-channel ( on when Vgate = 1V) vs. p-channel ( off when V gate = 1V) Mass-produced on integrated circuit chips For convenience, we abstract their behavior using logic gates

Logic gates Primary gates: & 0 0 0 1 0 1 1 1! 1 0 1 1 1 0 0 1 0 0 ^ 0 1 1 0

Logic gates Primary gates: &! 0 0 0 0 1 1 1 1 1 0 AND OR NOT ^ 1 0 0 1 1 0 1 0 0 1 1 0 NAND NOR XOR

Important properties Identity: a AND 1 = a (a OR 0) = a Constants: a AND 0 = 0 (a OR 1) = 1 Also: a NAND 0 = 1 (a NOR 1) = 0 Inverses: a NAND 1 =!a (a NOR 0) =!a Also: a NAND a =!a a NOR a =!a Double inverse:!!a = a Or: NOT(NOT(a)) = a De Morgan s law:!(a & b) =!a!b Alternatively:!(a b) =!a &!b (remember this from CS 227?)

Lab Part 1

Basic combinatorial circuits Circuits are formed by connecting gates together Inputs and outputs Link output of one gate to input of another Some gates have multiple inputs and/or outputs Textbook uses Hardware Description Language (HDL) Equivalent to boolean formulas or functions f(g(x, y)) means apply operation f to the result of operation g on x and y In a diagram: x,y g f (i.e., ordering is g first, then f)

Basic combinatorial circuits Circuits are formed by connecting gates together In a diagram: x,y g f (i.e., ordering is g first, then f) NAND example: (similarly for NOR) Infix/boolean notation: a NAND b =!(a & b) Function notation: NAND(a, b) = NOT(AND(a, b)) a b 0?? 1?? 0 0 0 1 a AND b

Basic combinatorial circuits Circuits are formed by connecting gates together In a diagram: x,y g f (i.e., ordering is g first, then f) NAND example: (similarly for NOR) Infix/boolean notation: a NAND b =!(a & b) Function notation: NAND(a, b) = NOT(AND(a, b)) a b 1 0 0 0 1 a AND b 1 1 0 1 1 1 0 a NAND b

Basic combinatorial circuits Circuits are equivalent if the truth tables are the same a XOR b = (a OR b) AND (a NAND b) XOR(a, b) = AND(OR(a,b), NAND(a,b)) ^ 0 1 1 0 XOR

Basic combinatorial circuits Circuits are equivalent if the truth tables are the same a XOR b = (a OR b) AND (a NAND b) XOR(a, b) = AND(OR(a,b), NAND(a,b)) ^ 0 0 1 1 1 a OR b 1 1 0 XOR 1 1 1 0 a NAND b

Basic combinatorial circuits Circuits are equivalent if the truth tables are the same a XOR b = (a OR b) AND (a NAND b) XOR(a, b) = AND(OR(a,b), NAND(a,b)) 0 1 1 1 a OR b ^ 0 1 1 0 XOR 1 1 1 0 a NAND b 0 1 1 0 (a OR b) AND (a NAND b)

Basic combinatorial circuits Circuits are equivalent if the truth tables are the same a XOR b = (a OR b) AND (a NAND b) XOR(a, b) = AND(OR(a,b), NAND(a,b)) 0 1 1 1 a OR b a b a ^ b f(a,b) 0 0 0 0 1 1 1 1 1 1 0 0 ^ 0 0 1 1 0 1 1 0 XOR f(a,b) 1 1 1 0 (a OR b) AND (a NAND b) a NAND b

Universal gates NAND and NOR gates are universal Each one alone can reproduce all other gates Example: a AND b = a & b =!(!(a & b)) =!(a NAND b) = (a NAND b) NAND (a NAND b) 1 1 1 0 a NAND b 0 0 0 1 (a NAND b) NAND (a NAND b) 0 0 0 1 a AND b

Universal gates NAND and NOR gates are universal Each one alone can reproduce all other gates Example: a AND b = a & b =!(!(a & b)) =!(a NAND b) = (a NAND b) NAND (a NAND b) Similarly: a AND b =!(!(a & b)) =!(!a!b) =!a NOR!b = (a NOR a) NOR (b NOR b) 1 1 1 0 0 0 0 1 0 0 0 1 a NAND b (a NAND b) NAND (a NAND b) a AND b (a NOR a) NOR (b NOR b)

Lab Part 2

Circuits Two main kinds of circuits: Combinational circuits: outputs are a boolean function of inputs Not time-dependent Used for computation Sequential circuits: output is dependent on previous inputs Time-dependent Used for memory

Computation Goal: identify circuits that perform useful computation Testing bits to see if they re equal Selecting between multiple inputs Adding or subtracting bits Bitwise operations (AND, OR, XOR) Make them work on bytes instead of bits

Equality

Equality a EQ b = (a & b) (!a &!b)

Multiplexor ( selector )

Multiplexor ( selector ) MUX (a, b, s) = (s & a) (!s & b)

Half adders A B S C 0 0???? 1 0?? 1 1?? Half Adder

Half adders A B S C 0 0 0 0 1 0 1 0 1 1 Half Adder a + b = a ^ b + a & b

Half adders sum carry A B S C 0 0 0 0 1 0 1 0 1 1 Half Adder a + b = a ^ b + a & b sum carry

Abstraction Name circuits, then use them to build more complex circuits E.g., use bit-level EQ to build a word-level equality circuit:

Word-level 2-way multiplexer

Word-level 4-way multiplexer How many selector inputs would be required for eight data inputs? How many data inputs could be supported using four selector inputs?

Full adders Full Adder Connect full adders to build a ripple-carry adder that can handle multi-bit addition:

Adder/subtractor D=0: Addition D=1: Subtraction In two's complement: B A = B +!A + 1

ALUs and memory Combine adders and multiplexors to make arithmetic/logic units Combine flip-flops to make register files and memory Basic Arithmetic Logic Unit (ALU) 4-bit Register

CPUs Combine ALU with registers and memory to make CPUs

Computers Combine CPU with other electronic components and devices (similarly constructed) communicating via buses to make a computer

Big picture Basic systems design approach: exploit abstraction Start with simple components Combine to make more complex components Repeat using the new components as black box simple components This is true of most areas in systems CS 261: transistors gates circuits adders/flip-flops ALUs/registers CPUs/memory computers CS 261: machine code assembly C code Java/Python code CS 361/470: threads processes nodes networks/clusters CS 432: scanner parser analyzer code generator optimizer CS 450: files + processes + I/O kernel operating system

Course status We ve hit the bottom Or at least as far down as we re going to go (logic gates) from here we go back up! Next week Sequential circuits CPU architecture Suggestion: download Logisim (already installed on lap machines) and play around with some circuits!

Lab Part 3