Developing the basic building blocks of mathematics to be employed in practical embedded systems

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Journal of Physics: Conference Series Developing the basic building blocks of mathematics to be employed in practical embedded systems To cite this article: A J Tickle et

1 Journal of Physics: Conference Series Developing the basic building blocks of mathematics to be employed in practical embedded systems To cite this article: A J Tickle et al 2009 J. Phys.: Conf. Ser View the article online for updates and enhancements. This content was downloaded from IP address on 06/10/2018 at 17:28

2 Developing the Basic Building Blocks of Mathematics to be employed in Practical Embedded Systems Andrew J. Tickle 1, Fan Wu 2, Paul K. Harvey 1 and Jeremy S. Smith 1 1 Intelligence Engineering and Industrial Automation Research Group, Department of Electrical Engineering and Electronics, The University of Liverpool, Liverpool L69 3GJ, United Kingdom 2 RF Engines Ltd, Innovation Centre, St. Cross Business Park, Newport, Isle of Wight, PO30 5WB, United Kingdom a.j.tickle@liverpool.ac.uk Abstract. Mathematics is vitally important as it is used in many areas of science and engineering, in particular are functions such as sine, cosine and the exponent in addition to being to able to carry out such tasks as decimal division. The sine wave is vitally important in physics and communications due to its ability to retain its waveshape when added to another sine wave of the same frequency and arbitrary phase. It is the only periodic waveform that has this property and leads to techniques such as Fourier analysis. Unfortunately these blocks are not included in the standard DSP Builder blockset in Simulink and so a method of creating these operations must be created if this methodology is to be employed in real world tasks such as power relay protection and stereo vision systems. Shown here is a method of performing these calculations using the limited blocks provided for a 50-bit based embedded system with a discussion about the accuracy when compared to traditional digital system counterparts. The order of the equations used and the scaling factors of the blocks are investigated to provide evidence of why certain values need to be changed depending upon the calculation being performed. 1. Introduction and Motivation The most common and traditional method of calculating numerical solutions to issues such as trigonometry and exponents is to use a lookup table or to call another file with the required data contained within. Simple tasks such as decimal division were considered too trivial to be bothered with as these could easily be encoded within many different programming languages from C to VHDL to MATLAB. DSP Builder unfortunately only provides a limited Blockset in which only a fractional division is available and there are no sines or exponents provided. In addition, the blocks in Simulink can be used effectively in simulations, however, when these blocks are attempted to be compiled by the Signal Compiler block in DSP the compilation will always fail as the Simulink blocks are not identified as being valid. In order for systems to be developed that are user independent for people of various backgrounds to understand, a way of solving this problem must be created. The modern Taylor Series Method is used in many different situations, some examples of this include being integrated as part of a neural network learning function [1], real-time methods in control theory [2], analysis of systems [3], Field Programmable Gate Array (FPGA) based parallel hardware [4] and c 2009 Ltd 1

3 approaches implemented in the TKSL simulation language [5 6]. It therefore seemed logical to pursue the development of a Taylor series mathematical based block for use in the various embedded systems that this methodology will be used for. The desire is to create a fast calculation of these factors (within 1 2 clock cycles) with an accuracy of 2 to 4 decimal points. Covered in this paper are how a decimal division, an exponent and sine mathematical blocks are created and how the order and associated parameters affect the accuracy of the results produced. 2. Conventional Embedded System Mathematics 2.1. Lookup Tables and Other Methods A lookup table is a data structure, usually an array or associative array, often used to replace a runtime computation with a simpler array indexing operation. In C, a lookup table searches for the given paremeter in the table, and returns a pointer to the place where it is found, or NULL if it was not found. The operation is a hash search, where the incoming string is converted into a small nonnegative integer, this is then used to index an array of pointers. An array element points to the beginning of a linked list of blocks describing names that have that hash value. It is NULL if no names have hashed that value [7]. In the application of digital signal/image processing, i.e. the computation of Fast Fourier Transform, trigonometric functions are often used. However, when implemented in hardware such as in FPGAs and ASICs, it is unpractical to compute the results based on their mathmatical terms due to the expensive hardware resources needed for the large amount of multiplication and division operations. Another disavantage is that they can substantially slow a system down due to the expansion of the overall system size. However, if a lookup table which contains all of the possible results of these trigonometric functions were to be used, then to retrieve a value from this lookup table would give it a big advantage as it can greatly save on resources and produces its result quicker. Due to the periodicity of trigonometric functions, only a fixed range of inputs are covered which means there is a limit for the size of the lookup table, and this size is often determined by the precision and input range. For example, to calculate the full range of the sine function, it is only necessary to calculate sin( π) to sin(π). Therefore it only needs about 628 lookup table elements in memory if the step size is 0.01; when implemented in embedded memory which would normally take 2^10 words of memory. So rather than compute a unique result every time using the mathematical fomula, this lookup table method only requires one entry address in memory and then the closest sine value can be retrieved in the next 1 or 2 cycles.national Instruments LabVIEW, a similar graphical block methodology like Altera s DSP Builder allows the user to generate a waveform containing a sine wave generator with a null time stamp. The.vi file produced as a result can be used to write data to a conventional Excel binary file and this can then be used to create a sine wave by reading from this file [8]. Similar files can be created using DSP Builder but these cannot have a value directly input to them for it to produce an output, this is another reason why the work presented in this paper was carried out Taylor Series Expansion It is known that y and its first n derivatives evaluated at x = a match p n (x) and its first n derivatives evaluated a+t x = a, further information about the difference between y(x) and p n (x), known as the error term, R n (x), can be obtained from any good mathematics book such as [9 11]. As more terms are included in the Taylor polynomial, an infinite series is obtained called the Taylor series, this is denoted by p(x) and the general formula is shown in Equation 1: ( ) ( ) ( )( ) ( ) ( ) 2 ( ) ( ) ( ) 3 ( L ) ( ) ( = ) n x a 3 x a n x a p x y a y' a x a y'' a y a y a + L 2! 3! n! Equation 1 2

4 For some Taylor series, the value of the series equals the value of the generating function for every value of x. For example, the Taylor series for e x, sin x and cos x equal the values of e x, sin x and cos x for every value of x. However, some functions have a Taylor series which equals the function only for a limited range of x values; these are given in [11]. The Taylor series for the exponent and sine functions are now given along with an example which is used in the DSP Builder blocks that will be discussed in the later sections. n 2 3 x x x x e = = 1+ x L n! 2! 3! sin ( x) = n= 0 n= 0 n ( 1) ( 2n + ) Equation 2 x 1! 2n+ 1 Equation x x = x + L 3! 5! The example cases that will be discussed are e 2 = and sin(20) = , it was determined that at least an 8 th order equation was required in order to obtain a 2 d.p. accuracy for the exponent and 4 th order equation was required in order to obtain a 4 d.p. accuracy for the sine wave. With regard to the latter block, the values must first be converted to radians before the sine calculation can be performed and so this operation will be a combination of the division and the Taylor series expansion. 3. Design of a Mathematical Block in DSP Builder All the systems in this section were designed with the bus type set to Signed Fractional due to the nature of the calculations and in order to provide the greatest accuracy possible. The ratio between the whole number and decimal number was set to 25 bits each, exactly half of the allocated number of bits that DSP Builder allows. This should be more than enough for standard operations, if a greater number of bits are required in either the whole or decimal direction then the ratio can simply be adjusted by double clicking the blocks/ports and adjusting them manually, however, every block would need to be upgraded in order to prevent data from being lost via mismatched bus widths Decimal Division Possibilities The original approach considered when designing this section was to implement the division by a process of continuous subtraction; it was later deemed however that this would be too computationally expensive due to the variable nature of the numbers that could be considered. The second approach was to utilise the built in fractional divisional blocks. These were cascaded together as shown in the dashed area of Figure 1. The numerator and denominator are input into the system, the quotient is then sent into the product blocks while the remainder is sent into the numerator of the next block, the denominator remains constant for all blocks and the final remainder is terminated. The product blocks have constant tags of 1, 0.1, 0.01 and sent into them respectively in order to reduce the value of the quotients coming out of the blocks so that decimal accuracy can be obtained in the result. These signals are then added to together using 3 pipeline adders in a cascading effect as to minimise any propagation delay in the circuitry that may cause errors in the result. The final matter to be considered are the two highlighted areas shown in Figure 1. These are scaling factors that had to be introduced into the system because if the denominator was greater in value than the numerator then the output would always be zero and so these blocks were added to compensate for this. The left hand block in the figure scales up the incoming data while the one on the right drops it back down to the original value and allows very precise decimal data to be created as a result. 3

5 Figure 1: Gate level layout for the division block 3.2. Exponential Taylor Series Mechanism For this operation, it is very similar to Equation 2 shown earlier; the solid area at the bottom of Figure 2 uses a chain of product blocks to create the powers from x 2 to x 10 for use in the calculations. The first product block has the input going into both terminals in order to create the x 2 term, from then onwards one input comes from the original input (delays blocks can be added if propagation delay is deemed to have become a problem) and the other from the product block before it. This works effectively to create any power required, provided that it lies within the operational range of the number of bits being used. The un-highlighted area in Figure 2 is where the factorial values have been inverted and so instead of being divided by the power term in the equation, the inverse is multiplied to the power term by means of a value tag (with the inverse for each factorial set to it) and a product block. By calculating these factorial values beforehand, computation power is saved and can help keep the speed of the system as fast as possible, this also keeps resource usage low as division takes up more resources on an FPGA than multiplication. The dashed area then adds together all the power terms after they have been combined with their factorial parts to create the final answer. Figure 2: Gate level layout for the exponent block 3.3. Sine Taylor Series Mechanism The sine operation is basically a combination of the previous two sections, everything to the left of the line in Figure 3 is a division block which divides input value by 180 using the division already presented and then a product block to multiply this by π to finish the conversion to radians. The Taylor series calculation is then done to the right of the line in Figure 3 completing the sine operation. 4. Results Analysis 4

6 All the systems performed correctly and produced the correct results, when these results were obtained it was decided to investigate if the efficiency or accuracy of these systems could be increased any further. The order of the equation for the Taylor series exponent was investigated as the sine series produced results accurate to 4.d.p. as already stated, however, for the exponent, the 8 th order equations accuracy started to fall off after e 1 and so a 10 th order equation was then simulated for various inputs and plotted against the results for the 8 th, the results are shown in Figure 4. These state quite clearly that for lower exponent values, an 8 th order equation is accurate enough, for higher values a 10 th or higher order equation is required. This can help reduce the resources when considering the application if the math is pre-calculated before the operation, this would allow the correctly ordered block to be used. However, if an 11 th or higher order equation is required then the factorial decimal values will becoming smaller than 10-8 and so this starts to present a problem with the 25:25 bit ratio meaning for higher order this would have to be adjusted. Figure 3: Gate level layout for the sine block Figure 4: Effect of varying the Taylor Series equation order The next investigation concerned the scaling factor for the division blocks, various scaling factors were used and simulations run; the results are displayed in Figure 5. For different sets of input data, the same trend occurs and shows that an optimum scaling factor exists for the division block which is surprising as it would be expected that the higher the scaling factor, the better the results would be! The optimum scaling factor was determined to be ; this was verified by both sets of result data. Another fact that occurred in both the exponent and sine blocks was that the higher the data value, the lower the accuracy of the system, this does not present an immediate issue as even for the higher data values, the accuracy is still above 99% for 2.d.p. 5

5. Conclusions and Future Work In this paper, the Taylor series approach has been extended to creating accurate Graphical User Interface Circuitry (GUIC) for mathematical operations on FPGAs in

7 5. Conclusions and Future Work In this paper, the Taylor series approach has been extended to creating accurate Graphical User Interface Circuitry (GUIC) for mathematical operations on FPGAs in addition to using the blocks already provided to create a method for more accurate division of data. The main advantage of this work is that more complicated work can be undertaken now that these mathematical operations have been completed and have proven to be effective. Future work will be to include these into practical Embedded System Robotics and other real-world operations that employ this kind of technology. Figure 5: Effect of the scaling factor on the results Acknowledgements The authors would like to thank the associate editor and anonymous reviewers for their valuable comments and suggestions. Mr Tickle and Mr Harvey would like to thank the EPSRC (Engineering and Physical Science Research Council) for funding this research work. References [1] Hanselmann T, Zaknich A and Attikiouzel Y 1999 Learning Functions and Their Derivatives Using Taylor Series and Neural Networks Proc. International Joint Conference on Neural Networks, Volume 1, pp [2] Kraus M, Kunovský J, Pindryc M and Šátek V 2008 Taylor Series in Control Theory Tenth International Conference on Computer Modelling and Simulation, pp [3] Chung H Y and Sun Y Y 1988 Analysis and Parameter Estimation of Nonlinear Systems with Hammerstein Model Using Taylor Series Approach IEEE Transactions on Circuits and Systems, Volume 35, Issue 12, pp [4] Kraus M, Kunovsky J and Satek V 2008 Taylor Series Numerical Integrator Second UKSIM European Symposium on Computer Modeling and Simulation, pp [5] Kopriva J, Kraus M, Kunovsky J and Satek V 2008 Semi-Analytical Computations Based on TKSL Second UKSIM European Symposium on Computer Modeling and Simulation, pp [6] Kaluza V, Kraus M, Kunovsky J and Satek V 2008 Accuracy and Word Width in TKSL Second UKSIM European Symposium on Computer Modeling and Simulation, pp [7] Kermighan B W and Ritchie D M The C Programming Langage Prentice Hall Software Series, pp [8] Travis J and Kring J 2006 LabVIEW for Everyone: Graphical Programming Made Easy and Fun 6

8 Prentice Hall, pp [9] Stroud K A 2003 Advanced Engineering Mathematics Palgrave Macmillan, pp [10] James G 1999 Advanced Modern Engineering Mathematics Prentice Hall, pp [11] Croft A, Davidson R and Hargreaves M 2001 Engineering Mathematics Prentice Hall, pp

1. Let n be a positive number. a. When we divide a decimal number, n, by 10, how are the numeral and the quotient related?

1. Let n be a positive number. a. When we divide a decimal number, n, by 10, how are the numeral and the quotient related? Black Converting between Fractions and Decimals Unit Number Patterns and Fractions. Let n be a positive number. When we divide a decimal number, n, by 0, how are the numeral and the quotient related?.