MICROTRAX CODED TRACK CIRCUIT SYSTEM SERVICE MANUAL 6470A APPLICATION LOGIC PROGRAMMING

Transcription

1 UNION SWITCH & SIGNAL 645 Russell Street Batesburg, SC SERVICE MANUAL 6470A MICROTRAX CODED TRACK CIRCUIT SYSTEM CODED TRACK CIRCUIT/ END-OF-SIDING CONTROLLER CODED TRACK CIRCUIT/ CAB SIGNAL CONTROLLER APPLICATION LOGIC PROGRAMMING April 1996 COPYRIGHT 1996, UNION SWITCH & SIGNAL INC. PRINTED IN USA An ANSALDO Affiliated Company

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3 TABLE OF CONTENTS I. GENERAL INFORMATION PURPOSE INTRODUCTION Track Communications Local Inputs and Outputs Serial Communications Internal/Programming-Related Functions General Site-Specific Programming System-Level Programming Hardware Configuration SPECIFICATIONS (PROGRAMMING-RELATED) Track Communications Serial Communications Local I/O II FUNCTIONAL DESCRIPTION BASIC OPERATING PRINCIPLES Vital Design Diagnostics Stable System Function ERRORS AND EVENT LOGGING Critical Errors Static and Dynamic Warnings Track Shunting Events User-Defined Events VITAL LOCAL COMMUNICATIONS Acquiring Inputs Vitality of Inputs Redundant Reading Input Instability Check Verification of Less Restrictive Bit Bit Latching Stuck Bit Check Shorted Input Check SM 6470A 4/96 i

4 TABLE OF CONTENTS Delivering Outputs Vitality of Outputs Stability Interval Reading Monitors Stuck Output ("Flip") Check Lamp Filament Tests Conditional Power Supply Basic Function VITAL SERIAL COMMUNICATIONS General Communications Modes OPERATING MODES Basic Prior State Routine CPS Powered Down Recovery System Loading Track Communications General Message Validity Application Logic - Track Interface Information Track Code Types Transmission Code Selection Receive Code Acceptance Shunting and Code Reception System Bit Operations III SYSTEM-LEVEL PROGRAMMING PROCEDURES INTRODUCTION PROGRAMMING LANGUAGE - GENERAL DESCRIPTION Main Program Sections and Statements Introductory Sample Program Basic Format Comments General Compiler Switches ii SM 6470A 4/96

5 TABLE OF CONTENTS Tokens Reserved Words Delimiters User-Defined Bits Bit Uses and Types Status in an Assign Statement Timer Bits Pre-Defined Bits Configuration Bits PROGRAMMING LANGUAGE - DETAILED DESCRIPTION Introduction Program Statement Interface Section Track Interface Section Local I/O Interface Section Slave Interface Section Non-Vital /IO /Local Control Panel Configuration Section Internal Bit Definitions Timer Section Begin Statement Logic Specification General Expression End Statement SUMMARY OF PROGRAMMING GUIDELINES DETAILED PROGRAM EXAMPLE PROGRAMMER GUIDELINES - PROGRAM EXECUTION General Timer List Trigger List General Breaks-Before-Makes Rule Sample Execution - Timer and Trigger Lists Cyclic Logic SM 6470A 2/96 iii

6 TABLE OF CONTENTS IV DEVELOPMENT SYSTEM INTRODUCTION M.T.D.S. AVAILABLE FILES ENVIRONMENT TABLE M.T.D.S. - COMPILER General Symbol Table Listing Comments Symbol and Page Generator Compiler Switch M.T.D.S. - SIMULATOR General Access to Simulator Standard Formats Simulator Operation General Sample Program Help Screen Display I/O Command Display Triggers Command Display Relays Command Display Timers Command Display Configuration Value Command Remove Command No Display Command Color/Monochrome Commands Run Command Execute Command Increment Command Trace Command Relay Set and Clear Commands Input Command Print Command Read Command Pause and Continue Commands Reset Command iv SM 6470A 4/96

7 TABLE OF CONTENTS Reconfiguration Command Quit Command Simulator Diagnostics EPROM FILE FORMAT & PROGRAMMING V SUPPLEMENTAL DATA COMPILER ERROR MESSAGES Token Errors Syntax Errors Semantic Errors SUMMARY OF HARDWARE ADJUSTMENTS CPU Module Circuit Board CPU Module Front Control Panel Color Light and Searchlight Lamp Driver Modules - Front Control Panel APPENDIX A PARTS LIST (DEVELOPMENT SYSTEM COMPONENTS) APPENDIX B EOS SERIAL LINK BOARD AND CABLE DIAGRAMS B.1 Introduction... B-1 B.2 Development System for EOS Serial Link Board... B-1 B.3 Switch Settings and Displays on the EOS Serial Link Board... B-2 B.4 Important Notes... B-7 B.4.1 Additional Error Codes... B-7 B.4.2 Differences between MICROLOK and the EOS Serial Link Board... B-7 APPENDIX C EOS M.T.D.S. - EPROM PROGRAMMER C.1 General...C-1 C.2 Initial Set-up...C-1 C.3 Programmer Operation...C-2 SM 6470A 2/96 v

8 TABLE OF CONTENTS APPENDIX D USING THE CHIPLAB TO PROGRAM MICROTRAX APPLICATION PROMS D.1 Background...D-1 D.2 Programming an Application...D-1 D.3 Selecting the Type of PROM...D-2 D.4 Performing A Blank Check of the Device...D-2 D.5 Selecting the File and Programming the PROM...D-2 D.6 Obtaining the Checksum of the PROM...D-4 D.7 Exiting the Driver...D-5 APPENDIX E MICROTRAX SLEEP MODE DESCRIPTION E.1 Introduction... E-1 E.2 Detailed Description... E-1 E.3 Application Notes... E-2 ILLUSTRATIONS Figure 1-1 General System Application Figure 1-2 General Configuration of Equipment Figure 3-1 Introductory Program Example Figure 3-2 ASSIGN Operators, Sample Execution Figure 3-3 Advanced Program Example Figure 3-4 Route Aspect Table (Per Figure 3-3) Figure 3-5 Color Light Wiring - Board 1 (Per Figure 3-3) Figure 3-6 Color Light Wiring - Board 2 (Per Figure 3-3) Figure 3-7 Isolated I/O Wiring - Board 3 (Per Figure 3-3) Figure 3-8 Searchlight Wiring - Board 1 (Per Figure 3-3) Figure 3-9 Searchlight Wiring - Board 2 (per Figure 3-3) Figure 4-1 MICROTRAX Development System Basic Diagram vi SM 6470A 4/96

9 Section I GENERAL INFORMATION 1.1 PURPOSE This manual provides instructions for system-level application logic programming of the MICROTRAX Coded Track Circuit System. Refer to SM-6470B for the following information: 1. Hardware installation, adjustment, application and maintenance 2. Signal lamp voltage and track circuit shunting sensitivity adjustment 3. Site-specific configuration set-up and monitoring (using portable PC) 4. The various types of MICROTRAX hardware configurations. 1.2 INTRODUCTION (see Figure 1-1) Track Communications The MICROTRAX Coded Track Circuit is a solid-state, microprocessor-based track and line circuit system designed to work in non-electrified territory. It combines the functions of train detection and line wire circuitry, with all communications carried through the rails. Vital integrity is maintained through detection of broken rails and failed insulated rail joints. A single MICROTRAX unit can be used to control two ends of track circuits at an intermediate or end (control) point location. The track code signal format is AC. This signal is connected to the rails through a Track Interface Panel consisting of a transformer and a heavy current inductor. Impedance is 10 ohms at 150 Hz and rises with increasing frequency. This makes the MICROTRAX system compatible with highway crossing motion and predictor equipment without requiring external blocking units. Additionally, the track is terminated at a very low impedance to the frequency components of the coded messages. This enables compatible operation with wide-band terminating shunts and track circuits that range up to 22,000 ft. in length (@ 3 ohms ballast/1000 ft.). An optional Quick Shunt Module reduces the system's 6-12 second shunt response time to less than 0.10 seconds (comparable to relay-based track circuits). Track circuit user adjustments available with the MICROTRAX system include: 1. Enable/disable of each adjacent track circuit 2. Length definition: 0 to 36,000 ft. in 1000 ft. increments 3. Track length adjustment and disabling using on-site PC or unit front panel switches user-defined standard codes with 12 second acceptance time 5. 2 user-defined fast codes with 6 second acceptance time (typically used for tumble-down and sleep) 6. Forced shunt using shunt/link-up code. 6470A 4/96 1-1

10 Section I GENERAL INFORMATION Figure 1-1. General System Application 1-2 SM 6470A 4/96

11 Section I GENERAL INFORMATION Local Inputs and Outputs The MICROTRAX system provides direct drive of color or searchlight signals. Signal lamp outputs are regulated and can be adjusted for the desired lamp voltage (refer to SM-6470B). Hot and cold filament checks and searchlight mechanism checks are provided. Orderly signal downgrades in advance can be provided (selected in the application logic) and communication through the track is uninterrupted. The application program can be written such that a lamp-out condition that does not affect the intended aspect can be reported to the control point for maintainer attention. The user can program a signal downgrade if a failed lamp prevents display of an intended aspect. The MICROTRAX system also provides logic inputs and outputs that are isolated from battery. Isolation is required for I/O running outside the MICROTRAX equipment case/house in accordance with double-break circuit design. Isolated outputs can be used to operate a 250-ohm load such as a switch lock coil, but can be used to operate any 12 volt relay. Typical uses of isolated inputs include: 1. NWP inputs from a remote location. 2. Set signal to red in response to high water or reversed switch input. 3. Fast train shunt detection (in conjunction with Quick Shunt Module) The MICROTRAX system also provides logic inputs and outputs that do not require isolation from battery. These are used for I/O within the MICROTRAX equipment house/case. Non-Isolated I/O are typically used in an interface to a relay-based interlocking control system. At any location where a MICROTRAX unit is driving a vital external output, the unit is equipped with a vital cut-off relay (VCOR), which controls power to these outputs. (The VCOR is internal to the MICROTRAX Coded Track and Cab Signal units, and external to the EOS unit.) This relay is energized so long as CPU internal diagnostics are passed. Any vital failure causes the relay to drop, thus removing power from all outputs. An optional circuit (EOS unit only) can be set up to light a red signal lamp through the back contact of the VCOR when a vital shutdown occurs Serial Communications The MICROTRAX system can be connected to the US&S MICROLOK Vital Interlocking Control system, MICROLOK PLUS Vital + Non-Vital Control Package or EOS Serial Link Module through a dedicated serial communications link. Dual serial ports on the MICROTRAX unit permit daisy-chain connection of up to 16 units under the control of the vital link master. The serial communications port wiring can also be used for signal cross-lighting on double-track rightof-way. (Two hand-shake signals are used to pass one bit of information back and forth; actual serial communications is not used.) This eliminates the need for complex cross-lighting set-ups Internal/Programming-Related Functions General The MICROTRAX system is controlled by a single microprocessor and standard Executive software. The system CPU constantly performs internal and external diagnostics and generates a conditional output signal so long as diagnostics are successful. Failure of any vital diagnostic results in removal of the conditional signal which, in turn, results in removal of power to all outputs. The MICROTRAX unit provides various normal and fault event displays such as power status, lamp and misc. I/O on/off, serial communications status and CPU diagnostics. Additional displays assist the user with on-site programming and hardware adjustments. 6470A 4/96 1-3

12 Section I GENERAL INFORMATION Site-Specific Programming Site-specific programming (e.g. unit ID, number of signal heads) is contained in an EEPROM mounted in the cardfile (inside of motherboard), not the CPU module. This arrangement allows CPU modules to be interchanged between MICROTRAX cardfiles, without having to transfer EPROMs between CPU boards. Site-specific programming is accomplished through a separate RS-232 serial port on the CPU module, using a portable computer. This same port is also available for system debugging and maintenance. The computer runs a special software package that provides the following functions: 1. Read/set of system clock 2. Display unit configuration 3. Reconfiguration of unit 4. Display memory addresses 5. Monitor application logic and application bits 6. Display logged errors and events 7. Capture data into disk files System-Level Programming System-level application functions such as unit type (e.g. end point or intermediate) are contained in an EPROM on the CPU module. The MICROTRAX Development System (M.T.D.S.) allows the user to design and program system-level logic in familiar relay-logic terms. Development system components include compiler software, EPROM "burn-in" software and program simulation. The MICROTRAX unit is capable of operating with various I/O configurations using the same application program. The flexibility of the application program enables one program to be used in different locations with varying I/O. Two different types of configuration items are available: predefined and user defined. User defined items are used solely by the application program. Pre-defined items control unit operations. These include: 1. I/O board configurations 2. Track A/B enable/disable 3. Track circuit length 4. Lamp head 2 enable/disable 5. Vital slave link parameters Resulting capabilities include: 1. Writing an application logic program that does not permit any field re-configurations. 2. Writing an application logic program that permits various I/O configurations using the same application logic program. 3. Defining defaults so that units do not require reconfiguration unless changes are required. 4. User-defined configurations under the complete control of the application. 1-4 SM 6470A 4/96

13 Section I GENERAL INFORMATION Hardware Configuration Each MICROTRAX system consists of an electronics cardfile, one or two Track Interface Panels and an optional Quick Shunt Module. The system cardfile houses various combinations of plug-in printed circuit modules, each with its own front edge control/display panel. A US&S PN-150HD relay is used for those applications with vital outputs (e.g. to signal lamps). This relay is controlled by the system logic and controls power to all vital local outputs. (The relay does not affect the operation of track communications or the vital serial link.) The Track Interface Panel carries all track code communications between the rails and the cardfile and serves as a filter for unwanted track signals and voltage transients. The optional Quick Shunt Module is provided for heavy traffic applications where the fastest possible train shunt response is needed. It reduces the detection time (of the MICROTRAX cardfile system only) from approximately 6-12 seconds to approximately 100 milliseconds. MICROTRAX system component options are listed in Service Manual 6470B. Table 1-1 and Figure 1-2 show the baseline coded track unit. See SM6470B for the hardware configuration of the coded track circuit/ end-of-siding controller and the coded track circuit/ cab signal controller. Note that the cardfile I/O boards also have a number reference in addition to the letter reference. This is in accordance with descriptors in the application logic program. Table 1-1. MICROTRAX System Equipment Ref. Component Options Application Options A Vital Power/Failover Relay Applications with vital outputs B System Power Supply Module All applications C (1*) Color Light Driver Module Side A or B color light signals 2 battery-isolated inputs Searchlight Driver Module Non-Isolated I/O Module Side A or B searchlight signals 2 battery-isolated inputs 4 non-isolated (from battery) inputs 4 non-isolated (from battery) inputs D (2*) Same as item C above Same as item C above E (3*) Isolated I/O Module 4 battery-isolated inputs 2 battery-isolated outputs F Track Interface Module All applications G Sleep Mode Module Remote, low-traffic areas (power conservation) H CPU Module All applications I Track Interface Panel Intermediate, repeater locations: 2 End (control point) locations: 1 J Quick Shunt Module Heavy traffic areas *"Board" location number in application logic program. 6470A 4/96 1-5

14 Section I GENERAL INFORMATION QUICK SHUNT MODULE TRACK INTERFACE PANEL J I Figure 1-2. General Configuration of Equipment 1-6 SM 6470A 4/96

15 Section I GENERAL INFORMATION 1.3 SPECIFICATIONS (PROGRAMMING-RELATED) Coded Track Communications Track Circuit Length: Using Single-Track Panel: Up to 22,000 ft. (@ 3 ohms/1000 ft. ballast) Using Dual-Track Panel: Up to 18,000 ft. (@ 3 ohms/1000 ft. ballast) T.C. Length (by rail type, rail weight and ballast): Single-Track Panel Welded Rail* ohms 100# 21K ft. 25K ft. 29K ft. 118# 22K ft 26K ft. 30K ft. 136# 22K ft. 27K ft. 31K ft. 145# 23K ft. 27K ft. 32K ft. Bonded Rail* ohms 100# 18K ft. 22K ft. 25K ft. 118# l9k ft. 23K ft. 26K ft. 136# l9k ft. 23K ft. 27K ft. 145# 20K ft. 25K ft. 27K ft. *Assumes 100 ft. or shorter #6 AWG (0.78 ohm) track leads at both ends. Longer leads: Reduce max. distance by 1K ft. for each additional 100 ft. leads. Dual-Track Panel: Refer to section Track Codes: Code Format: Message Characteristics: Standard Shunt Response: Quick-Shunt Option: 22 (max.) available for user application 1 fixed codes for internal functions Bipolar 167 or 333 ms pulses Amplitude: 2 VP-P Message length: 2.0 sec. Complete transmit/receive cycle: 6 sec. Detect: 6 to 12 sec. Clear: 12 to 18 sec. (application logic dependent) Detect: 100 msec. (approx.) 6470A 4/96 1-7

16 Section I GENERAL INFORMATION ALL SYSTEMS Track Interface Inductance: - Track Panel N : 10 mh - Track Panel N : 15 mh - Track Panel N : 20 mh - Track Panel N : 40 mh Serial Communications Cardfile Serial Data Ports: Coded Track and Cab Signal: A vital Slave port for MICROTRAX consisting of two 25-pin D connectors for daisy-chaining of units End-of-Siding: - A vital Slave port for MICROTRAX consisting of two 25- pin D connectors for daisy-chaining of units - 1 vital Master port for MICROTRAX- MICROTRAX link - 1 vital Slave port for MICROLOK- MICROTRAX link - 1 non-vital Slave port for GENYSIS- MICROTRAX link Communications Modes: Baud Rates: All links: EIA RS-423 (RS-232C compatible) Vital links: 150, 300, 600, 1200, 1800, 2400 BPS (default: 1200 BPS) MICROTRAX Vital Serial Up to 32 serial input bits I/0 Bits: Up to 32 serial output bits Non-vital links: 150, 300, 600, 1200, 1800, 2400, 4800, 9600 BPS CPU Module 9-Pin Port: EIA RS-232: 1200 and 4800 BPS IBM PC compatible (DOS) Local Signal and Relay I/O Color Light/Searchlight Part nos: N /N or Signal Module N Inputs: Outputs: 2 isolated inputs per module 2 signal heads per module Coded track cardfile: 0, 1 or 2 modules End-of-siding cardfile: 0, 1 or 2 modules 1-8 SM 6470A 4/96

17 Section I GENERAL INFORMATION Single-cab cardfile: 0, 1 or 2 modules Dual-cab cardfile: 0 modules Non-Isolated I/O Module: Part no.: N Inputs: Outputs: 4 non-isolated inputs per module 4 non-isolated outputs per module Coded track cardfile: 0, 1 or 2 modules End-of-siding cardfile: 0 modules Single-cab cardfile: 0 modules Dual-cab cardfile: 0 modules Non-Isolated I/O Module: Inputs: Outputs: Part no.: N X 4 non-isolated inputs per module 4 non-isolated outputs per module Coded track cardfile: 0, 1 or 2 modules End-of-siding cardfile: 0, 1, 2 or 3 modules Single-cab cardfile: 0, 1 or 2 modules Dual-cab cardfile: 0 or 1 module Isolated I/O Module: Part no.: N Inputs: Outputs: 4 isolated inputs per module 2 isolated outputs per module Coded track cardfile: 1 module End-of-siding cardfile: 0 modules Single-cab cardfile: 0 modules Dual-cab cardfile: 0 modules Coder Output Module: Part no.: N Outputs: 2 non-isolated outputs per module (1 output normally used for direction) Coded track cardfile: 0 modules End-of-siding cardfile: 0 modules 6470A 4/96 1-9

18 Section I GENERAL INFORMATION Single-cab cardfile: 0 or 1 module Dual-cab cardfile: 0, 1 or 2 modules Local Control Panel: Part no.: N Non-Vital Inputs: Non-Vital Outputs: 5 inputs per panel 2 outputs per panel Coded track cardfile: 0 panels End-of-siding cardfile: 1 panel Single-cab cardfile: 0 panels Dual-cab cardfile: 0 panels OS Track PCB : Part no.: N Outputs: 2 outputs per PCB (designed to be a MICROTRAX input only) Coded track cardfile: 0 PCBs End-of-siding cardfile: 1 PCB Single-cab cardfile: 0 PCBs Dual-cab cardfile: 0 PCBs 1-10 SM 6470A 4/96

19 Section II FUNCTIONAL DESCRIPTION 2.1 BASIC OPERATING PRINCIPLES Vital Design NOTE This section discusses aspects of MICROTRAX system operation related to system safety. The MICROTRAX system is designed to operate according to the same basic vitality principles as an equivalent relay-based system, specifically: Less Restrictive/More Restrictive State - When an input or output is recognized as a 0, this is the most restrictive state. When the input or output is recognized as a 1, this is the less restrictive state. Failures to Zero - An output or input cannot fail to the less restrictive state. Certain failures can cause an input to be falsely recognized as a 0. This type of failure is permitted because a zero implies the most restrictive state. The MICROTRAX software is also designed to assure safe operation of the system, specifically: Application Logic - The MICROTRAX unit is strictly a logic interpreter that executes and verifies the user's application logic. The application logic must be designed to prevent any unsafe actions. Operational testing of the application logic program is possible with the MICROTRAX Development System simulator (refer to section 4.4). The simulator verifies that the application program accurately represents the logic to be performed. The MICROTRAX Executive software is designed to verify that the application logic is executed correctly. The Executive is not capable of detecting and responding to an unsafe configuration in the application logic. If an unsafe configuration exists, the Executive will still carry out the programming Diagnostics The MICROTRAX system uses software-driven internal diagnostics designed to insure the safest possible operation. Two types of diagnostics are used: background and intrinsic: Background diagnostics perform a unique function separate from the functional code and are not required for basic system operation. Examples include EPROM check sums and CRC tests, timer comparisons and routine trace checks. Intrinsic diagnostic are an integral part of the functional code. For example, certain sections of the code process two sets of data to verify data integrity Stable System Function The MICROTRAX system is event driven. It does not serially read inputs, then perform logic and then deliver outputs. Instead, it reads inputs on a scheduled basis and, if input changes occur that alter logic, the affected portion of the application logic is scheduled. Once the logic has run, outputs are scheduled for delivery. Only outputs from a "stable system" can be delivered to the field. A stable system exists when the effects of one or more bit changes have fully propagated through the logic. The system is designed so that all of that logic will be executed before outputs can be delivered. This prevents delivery of intermediate outputs after only a portion of the application logic had been executed. 6470A 4/96 2-1

20 Section II FUNCTIONAL DESCRIPTION Also as an example, inputs are read and changes trigger some logic. When all logic is executed, the system is marked as stable and outputs are readied for delivery, even if more inputs change state before these outputs are delivered. The outputs may be sent because they are the result of a stable system. The requirement that no intermediate logic outputs be delivered is not violated because the system became stable; changes occurred after the logic was executed. 2.2 ERRORS AND EVENT LOGGING The MICROTRAX system incorporates an error table and a data/event logger. The error table is used to count the number of times any error or warning has been logged. Its range is 0 to 240. This error table is displayed in the DISPlay STATus menu on the CPU Module front panel. An event queue is also provided to log events, and is capable of holding 275 events. Events are described in the following sections Critical Errors Critical Errors result in a system shut down. Then the unit goes through a power-up reset process. All outputs are deenergized. Refer to SM-6470B for a detailed listing of critical error codes Static and Dynamic Warnings Warnings do not always result in a system shutdown. For example, when a color light lamp failure is detected, a warning is logged stating that a lamp filament has failed. A static warning is merely logged. When a dynamic warning occurs, the event will only be logged if another event for the same warning has not been previously logged. For example, in the case of a lamp filament failure event, the diagnostics that detect filament failures are run very frequently. If an event were logged every time that diagnostic failed, the event queue logging memory would be quickly filled. To prevent this, a filament failure is only logged if the warning count is zero (first instance of this warning). Refer to SM-6470B for a detailed listing of static and dynamic warnings Track Shunting Events Track shunting events indicate when a track circuit is shunted and when the shunt is removed. There are two shunt-related events for each track circuit. Thus, at an intermediate location, four possible events can be logged. A "Remove Shunt" event can also be logged. This logs the brief, intermediate state between a presence of a shunt and the absence of a shunt. Refer to section for additional information User-Defined Events Two user-defined bits are provided in the application logic that enable logging of special events not available in the standard error/event log listing. Refer to section for additional information on the use of these bits. 2.3 VITAL LOCAL COMMUNICATIONS Acquiring Inputs MICROTRAX inputs are acquired through a module-by-module sampling process that is completed once every 100 msec. The general procedure during a normal (non-fault) input cycle is as follows: 1. All inputs on a module are scanned and passed to a "bit string manager". 2. The new input values are compared against values sampled during the previous module scan to identify bits that have changed state. 2-2 SM 6470A 4/96

21 Section II FUNCTIONAL DESCRIPTION a. If a bit has changed from a less restrictive state ("1") to a more restrictive state ("0"), the change is immediately accepted (continue to step 3 of this procedure). b. If a bit has changed from a more restrictive state ("0") to a less restrictive state ("1"), it is scanned four times. The bit must show a "1" on all four consecutive scans to be accepted. 3. Accepted bits are put into the memory, triggering all application program equations that make use of these bits Vitality of Inputs Redundant Reading Each scan of inputs consists of several samples of those inputs. This function is designed to filter out transient state changes that may be caused by interfering external signals such as a high-frequency signal. In most cases samples match, thus validating the bit. However, if a discrepancy is observed, the read is repeated. If the discrepancy persists, the read is repeated a second time (three total reads per scan cycle). If matching reads cannot be obtained, the inputs are marked as unstable Input Instability Check After three consecutive reads of unstable inputs on one scan cycle, the inputs are left as previously scanned. On the next 100 msec. scan, if the unstable readings persist for three consecutive reads, then all inputs on that particular module are flagged as unstable and set to the more restrictive state ("0"). Warnings are also logged stating that all inputs have been declared invalid and will remain as such until the inputs become stable and pass several validity/stability checks Verification of Less Restrictive Bit During normal operation, a change of an input bit from a more restrictive ("0") to less restrictive ("1") state is accepted after the bit is reviewed during a fourth board scan (section 2.3.1, step 2). If the less restrictive ("1") state is not verified ("0" on the second, third or fourth scan), the bit stays at the more restrictive state ("0"). No error is logged. The bit must be a "1" on all four consecutive scans to be accepted as a less restrictive input ("1"). This process implies that an input signal must be present for four consecutive scans (100 msec. apart) to be accepted with a new state. A less restrictive-going input ("1") lasting less than 400 msec. is ignored. All signals lasting longer than 400 msec. are accepted Bit Latching Bit latching is the process of securing in memory any input that changes to the more restrictive state ("0"), no matter how briefly. The zero state of the input is held until the processor can act on it. For example, if an external relay contact feeds voltage to the MICROTRAX unit and the relay momentarily drops and picks, the loss of the voltage will be recorded as "0" and will be latched as dropped ("0"), even if the relay returns to the "1" state. This action allows the "0" state to be recognized and processed. After processing of the "0" state, the "1" state is then accepted Stuck Bit Check To verify that all input circuits can place a bit in the more restrictive state ("0"), a standard diagnostic test is performed. This test is run approximately every 100 msec, only when an input is in the less restrictive state ("1"). The following is performed for each input PCB: 6470A 4/96 2-3

22 Section II FUNCTIONAL DESCRIPTION 1. All individual inputs on a given board are forced to the more restrictive ("0") state through a closed loop monitor. 2. All inputs are read and verified that they can, in fact, be forced to the more restrictive state. (This test verifies that no circuit malfunctions have occurred that could stick an input in the less restrictive state). 3. Any input stuck in the less restrictive state is flagged as such with an error counter. The error counter provides for filtering of nuisance errors, enabling all inputs to overcome momentary problems without immediately degrading the level of operation. If the error counter reaches a maximum level of errors before validity checks can clear the counter; the input is internally forced to the more restrictive state until the input changes to a "1" and passes the stuck/ shorted bit test (refer to following section) at least six consecutive times Shorted Input Check Once every 100 msec. all input bits are tested for possible shorts between them, using a standard diagnostic routine in conjunction with the Stuck Bit Test. This test verifies that none of the input circuits have malfunctioned in a way that masks the true condition of other inputs on the module under test. The test involves sequential scanning of every input on every input module: 1. The input under test (must be a "1") is forced into the more restrictive state ("0"). 2. The other inputs on the module are tested to verify that none have changed state. 3. The initially forced input is returned to the less restrictive state ("1"). 4. The next input is forced to the more restrictive state ("0") and all other inputs are checked that none have changed state. 5. Any shorted inputs are flagged as such with an error counter. The error counter provides for filtering of nuisance errors; enabling all inputs to overcome momentary problems (since it is not certain if the other input actually is shorted or the input physically changed state) without instantly degrading the level of operation. If the error counter reaches a maximum level of errors before validity checks can clear the counter, the inputs which are shorted together are internally forced to the more restrictive state ("0") until the inputs are fixed or change to a "1" and pass the stuck/shorted bit test at least six consecutive times Delivering Outputs MICROTRAX outputs are delivered according to the order and timing specified in the application program. The general procedure during a normal (non-fault) output cycle is as follows: 1. Upon triggering of all logic equations and elapsing of all timer-related bits in the application program, resulting output bits are extracted from memory. 2. Output bits are delivered by the CPU to the specified output module on the next 100 millisecond boundary. 3. Monitors on the output circuits return end point data to the CPU. 4. Memory-stored bits and resulting data from the output module are compared by the CPU. 2-4 SM 6470A 4/96

23 Section II FUNCTIONAL DESCRIPTION Vitality of Outputs Stability Interval When a change of input occurs and logic processing commences, the MICROTRAX logic is considered "unstable". Output bits cannot be delivered since their states may be uncertain. After the logic becomes stable, the outputs will be delivered on the next 100 msec. output diagnostic scan cycle. They must be delivered no later than 0.5 seconds after the logic becomes stable again, otherwise a shutdown will occur. This action is designed to ensure that all deliverable output bits are in their most recent state Reading Monitors A separate diagnostic routine reads the monitor circuit on each output. This test is conducted once every 100 msec. The output monitor test is used to ensure that the MICROTRAX system has delivered the correct outputs to the output modules by using the output monitor circuitry located on the modules. These output monitors allow the processor to read the values that it has written to the output modules. The monitors are read and compared to the expected image of the outputs. If these are not in agreement, a system shutdown occurs. This shutdown uses the VCOR to turn all vital outputs off Stuck Output ("Flip") Check The stuck output or "flip" test determines whether an output circuit can change state. It is conducted approximately once every 100 msec. The output flip test verifies the integrity of the output monitor circuitry. The loop back check on the output circuits allows the Executive software to monitor the state of the output drive circuit. The output flip test momentarily "flips" the state of the output to force the monitor to the opposite state. This proves that the monitor has not stuck and is reporting the true state of the output driver. The outputs are then returned to the correct state. This test can be suspended; refer to section , part C Lamp Filament Tests 1. Hot Filament Test (LAMP ON) A. Color Light Lamp Driver Module: To determine whether a color light signal lamp has a missing or damaged bulb (broken filament), the Hot Filament Test is performed every 100 msec. If the system turns a lamp on and the monitor shows no current, a recoverable lamp-out error is placed in memory. This type of lamp failure is accessible in the application logic via the lamp-out bits. Thus, the application can be written to take action if a lamp-out occurs. If the system sends a lamp-off signal and the monitor shows current flowing through the circuit, a non-recoverable error is recorded and a system shutdown is performed (power removed from the lamp driver circuit and all other outputs). B. Searchlight Lamp Driver Module (N ): To determine whether a searchlight signal lamp has a missing or damaged bulb (broken filament), the Hot Filament Test is performed every 100 msec. If the system turns a lamp on and the monitor shows no current, a non-recoverable lamp-out error is placed in memory. (Since this module cannot distinguish between a lamp-out condition and a mechanism failure, this error is critical and produces a system shutdown). If the system sends a lamp-off signal and the monitor shows current flowing through the circuit, a nonrecoverable error is recorded and a system shutdown is performed (power removed from the lamp driver circuit and all other outputs). 6470A 4/96 2-5

24 Section II FUNCTIONAL DESCRIPTION A mechanism check is also performed to verify that the searchlight mechanism is in the correct position. This test is performed on the mechanism once every 0.5 seconds. The aspect of the mechanism under test is turned off for approximately 1.5 msec. A current reading is taken from an analog-to-digital converter (A/D) on this module and verified that the current is essentially zero. After testing, the aspect is returned to its original position. If the A/D reading shows current flowing then the mechanism check is performed again on the next 100 msec. scan cycle to re-verify that the mechanism is actually faulty. If the mechanism is determined to be faulty, a non-recoverable failure is recorded and a system shutdown is produced. C. Searchlight Lampdriver Module (N ) Search Light Lamp Driver Module: To determine whether a Search light signal lamp has a missing or damaged bulb (broken filament), the Hot Filament Test is performed every 100 msec. If the system turns a lamp on and the monitor shows no current, a recoverable lamp-out error is placed in memory. This type of lamp failure is accessible in the application logic via the lamp-out bits. Thus, the application can be written to take action if a lamp-out occurs. If the system sends a lamp-off signal and the monitor shows current flowing through the circuit, a non-recoverable error is recorded and a system shutdown is performed (power removed from the lamp driver circuit and all other outputs). A mechanism check is also performed to verify that the search light mechanism is in the correct position. Two different tests exist when the mechanism is in the RED or YELLOW position: - the mechanism s correspondence input is read to verify the position of the mechanism. - the mechanism is briefly turned off (less than one millisecond) to verify the integrity of the mechanism s correspondence input. If the mechanism is determined to be faulty, a non-recoverable failure is recorded and a system shutdown is produced. 2. Filament "Flip" Test/Cold Filament Test A. Color Light Lamp Driver Module/ Searchlight Lamp Driver Module (N ): : During the lamp driver flip test (refer to section ) with this module, the continuity of the lamp filament is checked when an "off" lamp output is briefly turned on. If no current flow is recorded during this test, a lamp-out bit is set and a warning is logged. This type of lamp-fail is accessible in the application logic so that corrective action can be taken. B. Searchlight Lamp Driver Module (N ): During the lamp driver flip test (refer to section ), the continuity of the lamp filament is checked when an "off" lamp output is briefly turned on. If no current flow is recorded during this test, a critical lamp-out error is placed in memory. (Since this module cannot distinguish between a lamp-out condition and a mechanism failure, a critical error and system shutdown results.). 2-6 SM 6470A 4/96

25 Section II FUNCTIONAL DESCRIPTION C. Suspend Test: The Suspend Test function can be selected separately for each I/O module defined in the application logic. When the Suspend Test bit is high ("1"), the only test that can be suspended is the momentary turn-on of an inactive output during the Stuck Output Check (refer to section ). If the application logic turns on both the output and the Suspend Test Bit, the output is checked. If the output is turned off and the Suspend Test Bit is turned on, the test of the output does not occur.! WARNING THE SUSPEND TEST BIT MUST BE USED WITH GREAT CARE BECAUSE OF THE LONGER TIME THAT IT CREATES FOR DETECTION OF A FAULTY OUTPUT. IF OUTPUTS ARE NOT TESTED PERIODICALLY TO VERIFY THAT THEY CAN BE TURNED ON, A FAILURE MODE COULD ARISE THAT WOULD ALWAYS MAKE THE MONITOR CIRCUITS SHOW AN OFF STATE. IF THIS CONDITION EXISTS WHEN ANOTHER COMPONENT FAILURE OCCURS, THE FAILURE COULD TURN ON AN OUTPUT WITHOUT A CORRESPONDING DETECTION BY THE MONITOR CIRCUIT Conditional Power Supply Basic Function Local inputs and outputs receive their power via a conditional power supply (CPS). If the unit is running properly and diagnostics are successful, the CPS is powered up and outputs and inputs are operational. If the unit detects certain types of errors, the system will run with the CPS powered down (Selective Shutdown Mode). In this special reduced operating mode, local inputs and outputs are not operational, but the track, vital serial links and local control panel still function. Refer to section 2.5 for more information. 2.4 VITAL SERIAL COMMUNICATIONS General Each MICROTRAX unit is equipped with redundant serial data ports to allow vital communications with a MICROLOK, MICROLOK PLUS, or MICROTRAX End-of-Siding serial link module system. This communications channel is referred to as a Vital Serial Link. These ports also allow "daisy chain" linking of up to 16 MICROTRAX units, all controlled by the same MICROLOK or MICROLOK PLUS system. The vital operation of this link is maintained by re-communicating all data to a station, regardless of whether input bits have changed. In all MICROTRAX Vital Serial Links, the MICROTRAX unit always functions as a Slave to a MICROLOK, MICROLOK PLUS or MICROTRAX End-of-siding serial link module system Communications Modes The MICROTRAX slave port utilizes EIA RS-423 (RS-232 compatible) serial communications. There is no internal provision for 20 ma current loop communications; this is accomplished with a Serial 6470A 4/96 2-7

26 Section II FUNCTIONAL DESCRIPTION Communications Adapter Panel (refer to SM-6400B). The Vital Serial Link always operates in the full duplex mode. Only control signals overlap; data messages never overlap. A communication on a MICROTRAX Vital Serial Link consists of a string of data bits transferred sequentially. These bits make up a message that includes an address section (identifying the intended remote unit) and the specific operating data intended for the remote unit. All messages from a MICROLOK, MICROLOK PLUS or MICROTRAX End-of-siding serial link module system are steered by means of "stations", which are defined in the application logic of these systems. 2.5 OPERATING MODES Basic The MICROTRAX system is capable of operating in three different modes: A. Normal: Operational: CPS powered up, I/O active, track communications active B. Selective Shutdown: Operational: CPS powered down, I/O inactive, track communications active, Slave link, Local Control Panel and cross-unit control active. C. Full Shutdown: Non-Operational: CPS powered down, I/O inactive, track communications inactive In the Selective Shutdown mode, the user must manually re-enable the CPS. This is done using the Reset Menu (refer to SM-6470B) or by assigning a 1 to the RESET system bit (executive rev. 4 and higher). Error filtering is provided to reduce likelihood of falsely dropping the CPS while running in the Normal mode. Since the unit can operate with the CPS up or down, the application logic has access to system bit CPS.STATUS. This bit informs the application logic about the state of the CPS. If the CPS is up and I/O is operational, CPS.STATUS is set. If the unit is running in the Selective Shutdown mode, CPS.STATUS is cleared. In systems running with executive rev. 4 and higher, the CPS.STATUS and RESET system bit can be used to write application logic that can attempt to restore a unit running in selected shutdown mode to normal mode. An application logic segment follows: TIMER RESET_CONTROL: SET = 15:MIN CLEAR = 0:SEC;. BEGIN. ASSIGN ~CPS.STATUS TO RESET_CONTROL; ASSIGN RESET_CONTROL TO RESET; In this program, the unit will attempt to restore a unit to Normal mode 15 minutes after it enters selective shutdown mode. The set delay on RESET_CONTROL is needed to prevent rapid attempts to restore the CPS in a unit that may have permanent output faults. 2-8 SM 6470A 4/96

27 Section II FUNCTIONAL DESCRIPTION Prior State Routine A Prior State Routine is used to determine the operating mode of the system. Every time the system is reset, the Prior State Routine examines the number of errors recently logged and the number of resets recently encountered, then determines the operating mode. The following rules are observed during this process: NOTE In the following rules, total running time is defined as the sum of the MICROTRAX execution time with the exception of the time spent in reset routines. The reset routine time is denoted by the message "RES" on the CPU module top alphanumeric display. Refer to SM-6470B for more information on reset routines. 1. System in the Normal mode and error/reset occurs: If more than five errors occurred within 40 seconds of the total running time, or 10 resets occurred within 40 seconds of the total running time, the Selective Shutdown mode is entered. Otherwise, the Normal mode is continued. 2. System in Selective Shutdown mode and error/reset occurs: If more than five errors occurred within 40 seconds of the total running time, or 10 resets occurred within 40 seconds of the total running time, then the Shutdown mode is entered. Otherwise, the Selective Shutdown mode is continued. 3. System in Full Shutdown mode and reset occurs: When the system is in the Full Shutdown mode, no operations occur except toggling of the watchdog circuit (reset inhibited). Diagnostics are also inactive. A reset can only occur as the result of a hardware failure, power fault or operation of the RESET button on the CPU Module. If the system resets while in the Full Shutdown mode, the unit will enter the Selective Shutdown mode CPS Powered Down Recovery The system will not attempt to restore an inactive CPS (unless the RAM that holds the Prior State variables is corrupted/cleared). Manual intervention is required. Refer to SM-6470B for the reset menu procedures. In systems running with executive rev. 4 and higher, the CPS.STATUS and RESET system bit can be used to write application logic that can attempt to restore a unit running in selected shutdown mode to normal mode. 6470A 4/96 2-9

28 Section II FUNCTIONAL DESCRIPTION System Loading The MICROTRAX system provides several warnings/errors indicating that the system cannot perform all its functions in a timely fashion. These warnings/errors indicate that the application logic is too complex for the MICROTRAX system to handle. The codes that will be logged in this situation are: Error Code #2 Error Code #41 Error Code #32 Error Code #40 Error Code #47 Warning Code #86 Error Code #44 Refer to SM-6470B for detailed information on these codes. If these errors are continuously logged, the application logic must be simplified so that the MICROTRAX system can execute it in a timely fashion Track Communications General NOTE Refer to SM-6470B for detailed information on track code formats. The Track Interface Module consists of two transmitters and two receivers which are capable of handling two ends of a track circuit. One transmitter/receiver pair is designated the Master and the other pair the Slave. The basic function of the Track Interface Module is to transmit and receive codes via the rails. The Master is responsible for initiating a message; the Slave will only respond when a valid message is received. When a code transmission is made, the unit will send the first code in an output list whose corresponding output bit is set. If no output bit is set, then system bits TRACK_TDOUT and TRACK_SLEEPOUT are examined. The first one that is set will be sent. If no output bits are set, then a "link-up" code will be sent (which forces a shunt on the receiving unit). If the unit is shunted, then the link-up code must be received before another track code will be accepted or transmitted. Refer to sections through for details of these functions. When a track code is received, special rules apply when the application logic bit is set. For any of the normal aspect codes, the message must be received twice consecutively before it is accepted. Then, two out of three are required to keep the code selected. The special link-up, tumble down and sleep special codes are accepted on one reception. Refer to sections through for details of these functions. Track transmit diagnostics are performed during a message transmission. Monitor tests are performed to verify that the hardware is sending the code intended by the CPU. Before the actual receiver is enabled for message reception, diagnostics are performed to verify the receive signal level, transmit signal level and to select the zero voltage level based on temperature. These diagnostics verify that the various analog-to-digital and voltage levels on the module are operating correctly. Since some of these components vary with temperature, a temperaturecompensated zero voltage or ground is needed to properly process the receive signal SM 6470A 4/96