THE UNIVERSITY OF BRITISH COLUMBIA CPSC 261: MIDTERM 1 February 14, 2017

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1 THE UNIVERSITY OF BRITISH COLUMBIA CPSC 261: MIDTERM 1 February 14, 2017 Last Name: First Name: Signature: UBC Student #: Important notes about this examination 1. You have 70 minutes to write the 6 questions on this examination. 2. Justify all your answers. 3. You are allowed to bring in one hand written, double sided 8.5 x 11in sheet of notes, and nothing else. 4. Keep your answers short. If you run out of space for a question, you have written too much. 5. The number in square brackets to the left of the question number indicates the number of marks allocated for that question. Use these to help you determine how much time you should spend on each question. 6. Good luck! Student Conduct during Examinations 1. Each examination candidate must be prepared to produce, upon the request of the invigilator or examiner, his or her UBCcard for identification. 2. Examination candidates are not permitted to ask questions of the examiners or invigilators, except in cases of supposed errors or ambiguities in examination questions, illegible or missing material, or the like. 3. No examination candidate shall be permitted to enter the examination room after the expiration of one half hour from the scheduled starting time, or to leave during the first half hour of the examination. Should the examination run fortyfive (45) minutes or less, no examination candidate shall be permitted to enter the examination room once the examination has begun. 4. Examination candidates must conduct themselves honestly and in accordance with established rules for a given examination, which will be articulated by the examiner or invigilator prior to the examination commencing. Should dishonest behaviour be observed by the examiner(s) or invigilator(s), pleas of accident or forgetfulness shall not be received. 5. Examination candidates suspected of any of the following, or any other similar practices, may be immediately dismissed from the examination by the examiner/invigilator, and may be subject to disciplinary action: i. speaking or communicating with other examination candidates, unless ii. iii. iv. otherwise authorized; purposely exposing written papers to the view of other examination candidates or imaging devices; purposely viewing the written papers of other examination candidates; using or having visible at the place of writing any books, papers or other memory aid devices other than those authorized by the examiner(s); and, v. using or operating electronic devices including but not limited to telephones, calculators, computers, or similar devices other than those authorized by the examiner(s) (electronic devices other than those authorized by the examiner(s) must be completely powered down if present at the place of writing). 6. Examination candidates must not destroy or damage any examination material, must hand in all examination papers, and must not take any examination material from the examination room without permission of the examiner or invigilator. 7. Notwithstanding the above, for any mode of examination that does not fall into the traditional, paper based method, examination candidates shall adhere to any special rules for conduct as established and articulated by the examiner. 8. Examination candidates must follow any additional examination rules or directions communicated by the examiner(s) or invigilator(s). Please do not write in this space: Question 1: Question 3: Question 2: Question 9: Question 3: Question 4: Question 4: Question 11: Question 5: Question 12: Question 6: Question 13: Question 7: Question 14: Question 8:

2 page 2 [8] 1. Short Answers [3] a. One technique used to cope with complexity is to be tolerant of inputs and strict on outputs. What does each of these terms mean? By tolerant of inputs we mean that functions should do something sensible when they are given incorrect (or slightly out of range) inputs. By strict on outputs we mean that functions should not produce incorrect, unexpected, or not-asspecified-by-the-documentation results. [2] b. Amongst the following properties of a cache, circle all of those can be determined from its memory mountain. Associativity Block size Total size Write policy (write-through or write-back) [3] c. List two advantages of using segregated free lists to implement a dynamic memory allocation library, as compared to implicit or explicit free lists. [11] 2. Pipelines Searching for free blocks is more efficient, because we are only searching part of the heap. Also, memory utilization improves, since first-fit search with a segregated list approximates a best-fit search of the entire heap. One disadvantage is the increase in overhead, since several lists need to be maintained, one with each different size; however, this overhead is usually compensated by an improved memory utilization. [2] a. What is the difference between a data hazard and a control hazard? A data hazard occurs when an instruction needs a value (usually a register value) that is not yet available because the instruction computing it has not yet finished executing. A control hazard happens when the CPU does not know for sure which instruction it should fetch next, and usually results from a conditional branch, indirect jump or call, or ret instruction. [3] b. What technique do modern pipelined CPUs use to prevent an instruction i from stalling until the instruction producing a data value that i needs has stored it in a register?

3 page 3 Often, even though the value has not yet been stored in the machine register, it has already been computed and is available in a stage register somewhere inside the pipeline. The value can then be forwarded to the stage that needs it (typically Decode) without having to wait for the first instruction to complete. Additionally, some CPUs may dynamically change the order in which instructions are handled, so that instructions that do not depend on the value being produced are executed before the stalled instruction. [3] c. What technique do modern pipelined CPUs use to reduce the probability of stalls due to conditional branch instructions whose condition is not known until the end of the instruction that precedes it? The CPU will usually choose a side and proceed with fetching one of the branches as if the conditional jump moved in that direction. Should the guess be incorrect, the process is invalidated and the new instructions are loaded as if a stall actually happened. [3] d. What technique do modern pipelined CPUs use to prevent a ret instruction from stalling due to an unknown returning address? Some CPUs will keep a small stack of returning address pointers to be used by the pipelined CPU to start fetching the next instruction. [7] 3. Given the following C function, /* Find the position of the largest value in the array */ long maxpos(long array[], long n) long m = --n; while (--n >= 0) if (array[m] > array[n]) m = n; return m; the gcc compiler generates the following x86-64 assembly language code: 1 maxpos: subq $1, %rsi 2 movq %rsi, %rax 3 jmp.l6 4.L4: movq (%rdi,%rsi,8), %rdx 5 cmpq %rdx, (%rdi,%rax,8) 6 jle.l6 7 movq %rsi, %rax 8.L6: subq $1, %rsi 9 jns.l4 10 ret

4 page 4 Using the C version as a guide, and your knowledge of the x86-64 calling conventions, comment the assembly language version of the function. Hint: jns means jump on no sign (SF=0). There was a bug in this code, wherein the function actually returns the smallest value in the array instead of the largest. Comments that take this into consideration were also marked as correct. (1) Decrement the value of n (stored in %rsi) (2) Assign n to m (stored in %rsi and %rax respectively) (3) Jump to the line that contains the loop condition (4) Read array[n] into register %rdx (5) Compare array[m] with register %rdx (array[n]) (6) Skip next instruction if array[m] array[n] (7) Assign n to m (stored in %rsi and %rax respectively) (8) Decrement the value of n (stored in %rsi) (9) Repeat process if n 0 (10) Done, return from the function [7] 4. Here is a longer function (selection sort) that incorporates function maxpos from the previous question inside a loop. 1 ssort: pushq %rbp 2 pushq %rbx 3 movq %rdi, %rbp 4 movq %rsi, %rbx 5 jmp.l8 6.L9: movq %rbx, %rsi 7 movq %rbp, %rdi 8 call maxpos 9 subq $1, %rbx 10 leaq 0(%rbp,%rbx,8), %rdx 11 movq (%rdx), %rcx 12 leaq 0(%rbp,%rax,8), %rax 13 movq (%rax), %rsi 14 movq %rsi, (%rdx) 15 movq %rcx, (%rax) 16.L8: cmpq $1, %rbx 17 jg.l9 18 popq %rbx 19 popq %rbp 20 ret

5 page 5 List at least five hazards that are present in this function. For each hazard: If it is a data hazard, write D, and both the number of the instruction that uses the data value, and the number of the instruction that computes it. If an instruction uses several values computed by earlier instructions, list only the number of the most recent such instruction. If it is a control hazard, write C and the number of the instruction where the hazard occurs. There were many more than five hazards. They are: Type Instruction 1 Instruction 2 Register? C 17 C 20 D 1 2 %rsp D 4 16 %rbx D 9 10 %rbx D %rdx D %rax D %rsi D %rsp [9] 5. The standard C library function realloc takes in a pointer ptr and an integer user size as parameters, and changes the size of the memory block that ptr points to so it becomes user size. The contents of the payload are preserved (up to the smaller of the old and new sizes). For efficiency reasons, realloc will extend the current block (make it bigger) if there is enough available space after it. Here is a partial implementation of the realloc function within the context of lab 3: Fill in code for the case where curr size < real size (other than the else clause). The next page contains function headers for some of the functions from lab 3. Hint: our solution contains 7 lines of actual code (plus a few lines with only curly braces). void *heap_realloc(heap *h, void *ptr, long user_size)

6 page 6 long real_size = get_size_to_allocate(user_size); char *block_start = get_block_start(ptr); long curr_size = get_block_size(block_start); long curr_block = block_start; if (curr_size > real_size) /* Ignore this case; we will shrink the block (maybe). */ else if (curr_size < real_size) long max_size = curr_size; if (!is_last_block(h, block_start) &&!block_is_in_use(get_next_block(block_start))) max_size += get_block_size(get_next_block(block_start)); if (max_size >= real_size) set_block_header(block_start, max_size, 1); prepare_block_for_use(block_start, real_size); else /* Case where we could not extend the block enough. */ return get_payload(block_start); [12] 6. A CPU has a 4-way set associative (E = 4) cache, with 64-byte block size (B = 64), 32 sets (S = 32), and a least recently used replacement policy. Assume that sizeof(long) is 8 and that we have the following C declaration: long a[16][256]; [3] i. For each of the following elements of the array, calculate the set that contains it: A 64-byte block has space for 8 longs, so: a[0][0]: set 0 a[0][4]: set 0 (same block as the previous elements) a[0][8]: set 1 (beginning of the following block) a[0][16]: set 2 a[0][128]: set 16 a[1][0]: set 0 (beginning of block 32, but since there are 32 sets this block goes back to the first set)

7 page 7 a[3][0]: set 0 a[8][0]: set 0 [9] ii. Assuming an initially cold cache (i.e., the cache does not initially contain any block associated to the code below), what will be the approximate miss rate for each of the following loops? You may assume that i and j are stored in registers. Justify your answers! [3] a. for (i = 0; i < 16; i++) for (j = 0; j < 256; j++) sum += a[i][j]; Elements are accessed in the order a[0][0], a[0][1], a[0][2],.... Since each cache block holds 8 elements, only the first access will be a cache miss. So we get a 12.5% miss rate. [3] b. for (j = 0; j < 256; j++) for (i = 0; i < 8; i++) sum += a[i][j]; The elements are accessed in column-major order. Each row of the array takes = 2048 bytes, which corresponds to 32 cache blocks worth of data (32 64 = 2048). Thus elements a[0][0], a[1][0], a[2][0]... all end up in the same set. By the time the loop tries to access a[0][1], the block containing a[0][0] to a[0][7] will already have been replaced in the cache by (that set will contain a[4][0] to a[4][7], a[5][0] to a[5][7], a[6][0] to a[6][7] and a[7][0] to a[7][7]. Hence we get a 100% miss rate. [3] c. for (j = 0; j < 256; j++) for (i = 0; i < 4; i++) sum += a[i][j]; The elements are once again accessed in column-major order. However, because we are only accessing four of the eight rows, the block block containing a[0][0] to a[0][7] will still be in the cache when the algorithm needs to access a[0][1] (along with a[1][0] to a[1][7], a[2][0] to a[2][7] and a[3][0] to a[3][7]. Hence we get a 12.5% miss rate (the cache has space for all accessed blocks, so once a block is loaded into the cache, it will not be evicted).