Full Name: CS Account:

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1 THE UNIVERSITY OF BRITISH COLUMBIA CPSC 313: QUIZ 4 October 31, 2018 Full Name: CS Account: Signature: UBC Student #: Important notes about this examination 1. Write your 4 or 5 character CS account both on the CS Account box above and on the next page. 2. You have 45 minutes to write this examination. An empty page is provided for you to answer any questions for which you need extra space. Clearly indicate which question the answer is related to. 3. No notes, books, or any type of unauthorized electronic equipment is allowed. You can have pen or pencil, eraser, your ID, a bottle of water, and a plain or scientific calculator on your desk. No programmable calculators allowed. All other material should be turned off and stored in your bag under your desk. 4. The marks allocated to each question are in square brackets alongside the question. Use this information to help you determine how much time you should spend on each question. Student Conduct during Examinations 1. Each examination candidate must be prepared to produce, upon the request of the invigilator or examiner, his or her UBCcard for identification. 2. Examination candidates are not permitted to ask questions of the examiners or invigilators, except in cases of supposed errors or ambiguities in examination questions, illegible or missing material, or the like. 3. No examination candidate shall be permitted to enter the examination room after the expiration of one half hour from the scheduled starting time, or to leave during the first half hour of the examination. Should the examination run fortyfive (45) minutes or less, no examination candidate shall be permitted to enter the examination room once the examination has begun. 4. Examination candidates must conduct themselves honestly and in accordance with established rules for a given examination, which will be articulated by the examiner or invigilator prior to the examination commencing. Should dishonest behaviour be observed by the examiner(s) or invigilator(s), pleas of accident or forgetfulness shall not be received. 5. Examination candidates suspected of any of the following, or any other similar practices, may be immediately dismissed from the examination by the examiner/invigilator, and may be subject to disciplinary action: i. speaking or communicating with other examination candidates, unless ii. iii. iv. otherwise authorized; purposely exposing written papers to the view of other examination candidates or imaging devices; purposely viewing the written papers of other examination candidates; using or having visible at the place of writing any books, papers or other memory aid devices other than those authorized by the examiner(s); and, v. using or operating electronic devices including but not limited to telephones, calculators, computers, or similar devices other than those authorized by the examiner(s) (electronic devices other than those authorized by the examiner(s) must be completely powered down if present at the place of writing). 6. Examination candidates must not destroy or damage any examination material, must hand in all examination papers, and must not take any examination material from the examination room without permission of the examiner or invigilator. 7. Notwithstanding the above, for any mode of examination that does not fall into the traditional, paper based method, examination candidates shall adhere to any special rules for conduct as established and articulated by the examiner. 8. Examination candidates must follow any additional examination rules or directions communicated by the examiner(s) or invigilator(s). Please do not write in this space: Question 1: Question 2: Question 3: Question 4: Question 5: Question 6: Question 7: Question 8: Question 9:

2 page 2 out of 8 Your CS Account: HEX DEC BIN HEX DEC BIN HEX DEC BIN HEX DEC BIN C D A E B F = = = = = = = = = = = = = = = = c Jonatan Schroeder Not to be copied, used, or revised without the explicit written permission of the copyright owner.

3 page 3 out of 8 [5] 1. Short Answers [2] a. Amongst the following properties of a cache, mark Y or N if it can be determined from its memory mountain or not, respectively. ( ) Associativity ( ) Number of levels ( ) Block size ( ) Total size ( ) Write policy (write-through or write-back) [3] b. Consider a cache with direct-mapped addressing, 32 (2 5 ) cache lines, and block size of 128 (2 7 ) bytes. Assume that, in line 5, the valid bit is on, and the tag has the value 0x34. What is the range of addresses currently stored in this cache line? In other words, which addresses would incur a cache hit on this line? List the addresses in hexadecimal. 0x to 0x

4 page 4 out of 8 [9] 2. The following is the actual configuration of the cache for each core of the Intel Core i9-7900x, a 64-bit deca-core processor released by Intel in mid For each of the cache levels, answer: how many cache lines does this cache have per set and in total? How many sets? If the CPU uses 48-bit memory addressing, how many bits are used to represent the tag, set index and offset in the address? You may present your results as powers of two if you wish. Assume 1KiB = 2 10 B and 1MiB = 2 20 B. a. L1-D: 32 KiB, 8-way set associative, 64-byte blocks b. L2: 1MiB, 16-way set associative, 64-byte blocks c. L3: 1.375MiB (1408KiB), 11-way set associative, 64-byte blocks 1 Total lines Lines per set No. of sets Tag bits Index bits Offset bits L1-D L2 L =

5 page 5 out of 8 [14] 3. A CPU has a 8-way set associative (E = 8) cache, with 64-byte block size (B = 2 6 ), 8 sets (S = 2 3 ), and a least recently used (LRU) replacement policy. For each of the following addresses, calculate its tag, set index and offset. You must present your values in hexadecimal (not binary or decimal). 0x8000 0x8008 0x8144 0x839C 0x8800 0x8AC8 0x9340 Tag Set Index Offset

6 page 6 out of 8 [15] 4. Assume the same cache described in the previous question: 8-way set associative (E = 8) cache, with 64-byte block size (B = 2 6 ), 8 sets (S = 2 3 ), and a least recently used (LRU) replacement policy. Assume that we have the following C declaration: long a[16][128]; You may assume that the first element of the array is stored at the beginning of a block stored in set 0, that sizeof(long) is 8 bytes, and that the array is stored in row-major order (the default for C). Assume an initially cold cache (i.e., the cache does not initially contain any block associated to the code below). You may assume that sum, i and j are stored in registers, and that no other code is using the cache at the same time. What will be the approximate miss rate for each of the following loops? In other words, out of all array accesses, what proportion (as a fraction) will cause a cache miss? Justify your answers! HINT: before attempting this exercise, answer the following questions: How many elements of the array fit in one block of the cache? How many blocks are necessary to fit an entire row of the array? If a[0][0] is stored in set 0, in which set is a[1][0] stored? What about a[2][0]? Which other elements conflict with a[0][0]? [5] a. for (i = 0; i < 16; i++) for (j = 0; j < 512; j++) sum += a[i][j];

7 page 7 out of 8 [5] b. for (j = 0; j < 512; j++) for (i = 0; i < 16; i++) sum += a[i][j]; [5] c. for (j = 0; j < 512; j++) for (i = 0; i < 4; i++) sum += a[i][j];

8 Use this page if you need additional space to answer any question. page 8 out of 8