AN586. Macros for Page and Bank Switching INTRODUCTION

Transcription

1 Macros for Page and Bank Switching Author: Mark Palmer Microchip Technology Inc. Contributions: Mike Morse Sr. Field Applications Engineer (Dallas) INTRODUCTION This application note discusses the use of the MPASM assembler's conditional assembly to automatically switch between program memory pages or to set the data memory banks. These macros, along with the long call technique (Application Note AN581), ease the development of software. Though the use of these macros can simplify program memory paging and data memory banking with minimal software overhead, the use of these macros without thought can cause unnecessary (duplicate) instructions to be used, by setting page or bank bits unnecessarily. The PIC16C5X family of devices has an architecture in which program memory has up to four pages of program memory (512 words / page) and four banks of data memory (16 bytes / bank). Two bits in the STATUS register, PA1:PA0, are used to manage the program memory pages. Two bits of the FSR register, bits 6 and 5, manage the data memory banks. We will call the FSR<5> bit RP0 and the FSR<6> bit RP1 (for Register Page 0 and 1). The naming of these bits RP1 and RP0 should not be confused with the similarly named bits in the PIC16CXX family (PIC16C64, PIC16C71, etc.). The RP bits for the PIC16CXX family are found in the STA- TUS register, as opposed to the FSR register for the PIC16C5X family. The use of these macros can be modified to support the PIC16CXX family. The program memory organization is shown in Figure 1 and the data memory organization is shown in Figure 2. To use the macros for the data memory, the data memory locations must be EQUated for the absolute address, and not the relative address in the bank. The relative address is the lower 5-bits of the data memory address. When the address of the data memory has the MSb (bit4) of the direct address cleared, or FSR<4> cleared (for indirect addressing), the address 0h through 0Fh is accessed. That is, when accessing addresses 0h through 0Fh the bank selection (FSR<6:5>) bits are ignored. This means that data memory addresses 'xxx0 xxxx'b access the data memory address 0xh (x is anywhere from 0 - F) Microchip Technology Inc. DS00586B-page 1

2 FIGURE 1: PROGRAM MEMORY ORGANIZATION File Address 00h 01h 02h A10 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh A9 A Indirect Addr. (1) TMR0 PCL STATUS FSR PORTA PORTB PORTC General Purpose Register File CALL RETLW STACK 1 STACK 2 To and from register file via ALU FSR<6:5> Data Memory Bank Select TRISA TRISB TRISC W OPTION From Program Memory h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh General Purpose Register File (All Types) 30h 50h General Purpose Register File (PIC16C57 Only) 70h (Bank 0) (2) (Bank 1) (2) (Bank 2) (2) (Bank 3) (2) 3F 5Fh 7Fh Note 1: Not a physically implemented register. 2: Bank 0 is available on all microcontrollers while Bank 1, Bank 2, and Bank 3 are only available on the PIC16C57 and PIC16C58. DS00586B-page Microchip Technology Inc.

3 FIGURE 2: DATA MEMORY MAP GOTO, CALL instruction with PC as destination... from STATUS<6> (PIC16C57 Only) GOTO, CALL instruction with PC as destination... from STATUS<5> (PIC16C56/57/58 Only) GOTO direct from instruction word CALL instruction with PC as destination always '0' GOTO, CALL... direct from instruction word Instruction with PC as destination... from ALU PC A10 A9 A8 A<7:0> RETLW, CALL 9-11 bits STACK LEVEL 1 STACK LEVEL h 00 PAGE 0 0FFh 100h MAX. EPROM/ROM ADDRESS 1FFh 200h PIC16C54\PIC16C55 01 PAGE 1 2FFh 300h 3FFh 400h PIC16C56 10 PAGE 2 4FFh 500h 5FFh 600h 11 PAGE 3 6FFh 700h 7FFh PIC16C57/PIC16C Microchip Technology Inc. DS00586B-page 3

4 The use of MPASM s conditional assembly, allows the selection of source code to be assembled based on the address of the symbol / label. The macros supplied are show in Table 1. They can be grouped into three categories: 1. Configuring of the program memory pages. 2. Configuring of the data memory banks. 3. Other. TABLE 1: MACROS Program Calling Paging Operands Operation CALLM address Sets page bits, then CALLs the specified routine GOTOM address Sets page bits, then GOTOs the specified address PAGE_MAC address Sets the specified page bits Data Memory Banking ADDWF_MAC Reg, dest Sets Bank bits, then executes the ADDWF ANDWF_MAC Reg, dest Sets Bank bits, then executes the ANDWF BCF_MAC Reg, bit Sets Bank bits, then executes the BCF BSF_MAC Reg, bit Sets Bank bits, then executes the BSF BTFSC_MAC Reg, bit Sets Bank bits, then executes the BTFSC BTFSS_MAC Reg, bit Sets Bank bits, then executes the BTFSS CLRF_MAC Reg Sets Bank bits, then executes the CLRF COMF_MAC Reg, dest Sets Bank bits, then executes the COMF DECF_MAC Reg, dest Sets Bank bits, then executes the DECF DECFSZ_MAC Reg, dest Sets Bank bits, then executes the DECFSZ INCF_MAC Reg, dest Sets Bank bits, then executes the INCF INCFSZ_MAC Reg, dest Sets Bank bits, then executes the INCFSZ IORWF_MAC Reg, dest Sets Bank bits, then executes the IORWF MOVF_MAC Reg, dest Sets Bank bits, then executes the MOVF MOVWF_MAC Reg Sets Bank bits, then executes the MOVWF RLF_MAC Reg, dest Sets Bank bits, then executes the RLF RRF_MAC Reg, dest Sets Bank bits, then executes the RRF SUBWF_MAC Reg, dest Sets Bank bits, then executes the SUBWF SWAPF_MAC Reg, dest Sets Bank bits, then executes the SWAPF XORWF_MAC Reg, dest Sets Bank bits, then executes the XORWF BANK_MAC Reg Sets the specified Bank bits Other SAVE_W_STATUS - Saves the W and STATUS registers RESTORE_W_STATUS - Restores the W and STATUS registers DS00586B-page Microchip Technology Inc.

5 These macros (Appendix A) ease the development of programs, but care should be taken in their use so that redundant instructions are not caused. An example of this (Example 1) is if you wanted to do the operations, INCF and BTFSS, on data memory location CNTR (in Bank 3) and the FSR was pointing to some other bank. The use of the macros for both operations would cause six program memory locations to be assembled, while with some thought only four words are needed (Example 2). CONCLUSION The use of these macros simplify program development by managing the memory resources of the PIC16C5X device. If the application program becomes too large for the device s program memory, it is recommended to study the listing file for any unnecessary code due to non-optimum usage of these macros. The MAC_TST.ASM file, is supplied to show how these macros work in a program. EXAMPLE 1: GENERATION OF UNNECESSARY CODE INCF_MAC CNTR, F > BSF FSR, 5 BSF FSR, 6 INCF CNTR, F BTFSS_MAC CNTR, 5 > BSF FSR, 5 ; Unnecessary, already in bank BSF FSR, 6 ; Unnecessary, already in bank BTFSS CNTR, 5 EXAMPLE 2: GENERATION OF OPTIMUM CODE INCF_MAC CNTR, F > BSF FSR, 5 BSF FSR, 6 INCF CNTR, F BTFSS CNTR, 5 > BTFSS CNTR, Microchip Technology Inc. DS00586B-page 5

6 DS00586B-page Microchip Technology Inc. Please check the Microchip BBS for the latest version of the source code. Microchip s Worldwide Web Address: Bulletin Board Support: MCHIPBBS using CompuServe (CompuServe membership not required). APPENDIX A: MACRO FILE MPASM Released LCALL_5X.ASM :13:33 PAGE 1 LOC OBJECT CODE LINE SOURCE TEXT VALUE LIST P = 16C57, n = ERRORLEVEL -302, ; ; Program = LCALL_5x.asm ; Revision Date: ; Compatibility with MPASMWIN ; ; P1_TOP EQU 0x FF P1_BOTTOM EQU 0x01FF P2_TOP EQU 0x FF P2_BOTTOM EQU 0x03FF P3_TOP EQU 0x FF P3_BOTTOM EQU 0x05FF P4_TOP EQU 0x FF P4_BOTTOM EQU 0x07FF FF RESET_V EQU 0x07FF ; STATUS EQU 0x03 ; Status Register PA0 EQU 0x05 ; Program Memory Page Address bit PA1 EQU 0x06 ; Program Memory Page Address bit ; FSR EQU 0x04 ; FSR Register RP0 EQU 0x05 ; Direct Addressing Register Bank bit RP1 EQU 0x06 ; Direct Addressing Register Bank bit ; BANK0_T EQU 0x BANK1_T EQU 0x BANK2_T EQU 0x BANK3_T EQU 0x ; org P1_TOP ; A P1_CALL_1_V GOTO P1_CALL_ A0A P1_CALL_2_V GOTO P1_CALL_2

7 1997 Microchip Technology Inc. DS00586B-page A0D P1_CALL_3_V GOTO P1_CALL_ A1F P1_CALL_4_V GOTO P1_CALL_ A P1_CALL_5_V GOTO P1_CALL_ ; ; D_address EQU 0x F EQU W EQU ; include <AUTO_PG.MAC> list ; D START CALL P1_CALL_ ; A LOOP GOTO LOOP ; ; P1_CALL_ ; if ( (P1_CALL_1_V & 0x0600)!= (P1_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; NOP NOP P1_CALL_1_END RETURN ; if ( (P1_CALL_1 & 0x0600)!= (P1_CALL_1_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif ; A P1_CALL_ ; if ( (P1_CALL_2_V & 0x0600)!= (P1_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 000A NOP 000B NOP 000C P1_CALL_2_END RETURN ; if ( (P1_CALL_2 & 0x0600)!= (P1_CALL_2_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif

8 DS00586B-page Microchip Technology Inc ; D P1_CALL_ ; if ( (P1_CALL_3_V & 0x0600)!= (P1_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 000D NOP 000E NOP 000F P1_CALL_3_END RETURN ; if ( (P1_CALL_3 & 0x0600)!= (P1_CALL_3_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif ; CALLM P2_CALL_3_V M if ( ( P2_CALL_3_V & 0x0200 ) == 0x0200 ) A3 M BSF STATUS, PA0 ; Set PA0 for Program Memory Page M BCF STATUS, PA0 ; Clear PA0 for Program Memory Page M if ( ( P2_CALL_3_V & 0x0400 ) == 0x0400 ) M BSF STATUS, PA1 ; Set PA1 for Program Memory Page C3 M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page M CALL P2_CALL_3_V nop nop ; CALLM P4_CALL_2_V M if ( ( P4_CALL_2_V & 0x0200 ) == 0x0200 ) A3 M BSF STATUS, PA0 ; Set PA0 for Program Memory Page M BCF STATUS, PA0 ; Clear PA0 for Program Memory Page M if ( ( P4_CALL_2_V & 0x0400 ) == 0x0400 ) C3 M BSF STATUS, PA1 ; Set PA1 for Program Memory Page

9 1997 Microchip Technology Inc. DS00586B-page 9 M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page M CALL P4_CALL_2_V nop nop ; CALLM P3_CALL_1_V M if ( ( P3_CALL_1_V & 0x0200 ) == 0x0200 ) M BSF STATUS, PA0 ; Set PA0 for Program Memory Page 001A 04A3 M BCF STATUS, PA0 ; Clear PA0 for Program Memory Page M if ( ( P3_CALL_1_V & 0x0400 ) == 0x0400 ) 001B 05C3 M BSF STATUS, PA1 ; Set PA1 for Program Memory Page M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page 001C 0900 M CALL P3_CALL_1_V 001D nop 001E nop ; 001F P1_CALL_ ; if ( (P1_CALL_4_V & 0x0600)!= (P1_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 001F NOP NOP P1_CALL_4_END RETURN ; if ( (P1_CALL_4 & 0x0600)!= (P1_CALL_4_END & 0x0600) ) MESSG Warning - User Defined: Call routine crosses page boundry endif ; nop nop ADDWF_MAC D_address, F M BSF FSR, RP0 ; Set RP0 for Data Memory Page

10 DS00586B-page Microchip Technology Inc A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank F0 M ADDWF D_address, F ANDWF_MAC D_address, F A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank M ANDWF D_address, F BCF_MAC D_address, 7 002A 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank 002B 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 002C 04F0 M BCF D_address, BSF_MAC D_address, 7 002D 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank

11 1997 Microchip Technology Inc. DS00586B-page E 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 002F 05F0 M BSF D_address, BTFSC_MAC D_address, A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank F0 M BTFSC D_address, BTFSS_MAC D_address, A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank F0 M BTFSS D_address, CLRF_MAC D_address A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank M CLRF D_address

12 DS00586B-page Microchip Technology Inc COMF_MAC D_address, F A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank 003A 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 003B 0270 M COMF D_address, F DECF_MAC D_address, F 003C 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank 003D 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 003E 00F0 M DECF D_address, F DECFSZ_MAC D_address, F 003F 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank F0 M DECFSZ D_address, F INCF_MAC D_address, F

13 1997 Microchip Technology Inc. DS00586B-page A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank B0 M INCF D_address, F INCFSZ_MAC D_address, F A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank F0 M INCFSZ D_address, F IORWF_MAC D_address, F A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 004A 0130 M IORWF D_address, F MOVF_MAC D_address, F 004B 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank

14 DS00586B-page Microchip Technology Inc. 004C 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 004D 0230 M MOVF D_address, F MOVWF_MAC D_address 004E 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank 004F 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank M MOVWF D_address RLF_MAC D_address, F A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank M RLF D_address, F RRF_MAC D_address, F A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank M RRF D_address, F SUBWF_MAC D_address, F

15 1997 Microchip Technology Inc. DS00586B-page A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank B0 M SUBWF D_address, F SWAPF_MAC D_address, F 005A 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank 005B 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 005C 03B0 M SWAPF D_address, F XORWF_MAC D_address, F 005D 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank 005E 04C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank 005F 01B0 M XORWF D_address, F PAGE_MAC P1_CALL_4 M if ( ( P1_CALL_4 & 0x0200 ) == 0x0200 ) M BSF STATUS, PA0 ; Set PA0 for Program Memory Page A3 M BCF STATUS, PA0 ; Clear PA0 for Program Memory Page

16 DS00586B-page Microchip Technology Inc. M if ( ( P1_CALL_4 & 0x0400 ) == 0x0400 ) M BSF STATUS, PA1 ; Set PA1 for Program Memory Page C3 M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page BANK_MAC D_address A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Bank P1_CALL_ ; if ( (P1_CALL_5_V & 0x0600)!= (P1_CALL_5 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; NOP NOP ; org P2_TOP ; This is to force an intentional User Defined Message ; NOP NOP P1_CALL_5_END RETURN ; if ( (P1_CALL_5 & 0x0600)!= (P1_CALL_5_END & 0x0600) ) Message[301]: MESSAGE: (Warning - User Defined: Call routine crosses page boundry) MESSG Warning - User Defined: Call routine crosses page boundry endif ; A P2_CALL_1_V GOTO P2_CALL_ A0B P2_CALL_2_V GOTO P2_CALL_2

17 1997 Microchip Technology Inc. DS00586B-page A P2_CALL_3_V GOTO P2_CALL_ A P2_CALL_4_V GOTO P2_CALL_ A1C P2_CALL_5_V GOTO P2_CALL_ P2_CALL_1 NOP NOP 020A RETURN ; if ( (P2_CALL_1_V & 0x0600)!= (P2_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 020B P2_CALL_2 NOP 020C NOP 020D RETURN ; if ( (P2_CALL_2_V & 0x0600)!= (P2_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; CALLM P1_CALL_3_V M if ( ( P1_CALL_3_V & 0x0200 ) == 0x0200 ) M BSF STATUS, PA0 ; Set PA0 for Program Memory Page 020E 04A3 M BCF STATUS, PA0 ; Clear PA0 for Program Memory Page M if ( ( P1_CALL_3_V & 0x0400 ) == 0x0400 ) M BSF STATUS, PA1 ; Set PA1 for Program Memory Page 020F 04C3 M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page M CALL P1_CALL_3_V nop nop P2_CALL_3 NOP NOP RETURN ; if ( (P2_CALL_3_V & 0x0600)!= (P2_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page

18 DS00586B-page Microchip Technology Inc endif ; GOTOM P1_CALL_2 M if ( ( P1_CALL_2 & 0x0200 ) == 0x0200 ) M BSF STATUS, PA0 ; Set PA0 for Program Memory Page A3 M BCF STATUS, PA0 ; Clear PA0 for Program Memory Page M if ( ( P1_CALL_2 & 0x0400 ) == 0x0400 ) M BSF STATUS, PA1 ; Set PA1 for Program Memory Page C3 M BCF STATUS, PA1 ; Clear PA1 for Program Memory Page A0A M GOTO P1_CALL_ ; P2_CALL_4 NOP 021A NOP 021B RETURN ; if ( (P2_CALL_4_V & 0x0600)!= (P2_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 021C P2_CALL_5 NOP 021D NOP 021E RETURN ; if ( (P2_CALL_5_V & 0x0600)!= (P2_CALL_5 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; MOVF_MAC BANK0_T, 0 M if ( ( BANK0_T & 0x020 ) == 0x020 ) 021F 04A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Bank M if ( ( BANK0_T & 0x040 ) == 0x040 )

19 1997 Microchip Technology Inc. DS00586B-page 19 M BSF FSR, RP1 ; Set RP1 for Data Memory Page C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Page M MOVF BANK0_T, MOVWF_MAC BANK1_T M if ( ( BANK1_T & 0x020 ) == 0x020 ) A4 M BSF FSR, RP0 ; Set RP0 for Data Memory Page M BCF FSR, RP0 ; Clear RP0 for Data Memory Page M if ( ( BANK1_T & 0x040 ) == 0x040 ) M BSF FSR, RP1 ; Set RP1 for Data Memory Page C4 M BCF FSR, RP1 ; Clear RP1 for Data Memory Page M MOVWF BANK1_T MOVF_MAC BANK2_T, 0 M if ( ( BANK2_T & 0x020 ) == 0x020 ) M BSF FSR, RP0 ; Set RP0 for Data Memory Page A4 M BCF FSR, RP0 ; Clear RP0 for Data Memory Page M if ( ( BANK2_T & 0x040 ) == 0x040 ) C4 M BSF FSR, RP1 ; Set RP1 for Data Memory Page M BCF FSR, RP1 ; Clear RP1 for Data Memory Page M MOVF BANK2_T, MOVWF_MAC BANK3_T M if ( ( BANK3_T & 0x020 ) == 0x020 ) A4 M BSF FSR, RP0 ; Set RP0 for Data Memory Page M BCF FSR, RP0 ; Clear RP0 for Data Memory Page M if ( ( BANK3_T & 0x040 ) == 0x040 ) C4 M BSF FSR, RP1 ; Set RP1 for Data Memory Page M BCF FSR, RP1 ; Clear RP1 for Data Memory Page 022A 0030 M MOVWF BANK3_T

20 DS00586B-page Microchip Technology Inc ; org P3_TOP ; A P3_CALL_1_V GOTO P3_CALL_ A P3_CALL_2_V GOTO P3_CALL_ A0B P3_CALL_3_V GOTO P3_CALL_ A0E P3_CALL_4_V GOTO P3_CALL_ A P3_CALL_5_V GOTO P3_CALL_ P3_CALL_1 NOP NOP RETURN ; if ( (P3_CALL_1_V & 0x0600)!= (P3_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P3_CALL_2 NOP NOP 040A RETURN ; if ( (P3_CALL_2_V & 0x0600)!= (P3_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 040B P3_CALL_3 NOP 040C NOP 040D RETURN ; if ( (P3_CALL_3_V & 0x0600)!= (P3_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 040E P3_CALL_4 NOP 040F NOP RETURN ; if ( (P3_CALL_4_V & 0x0600)!= (P3_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ;

21 1997 Microchip Technology Inc. DS00586B-page org P4_TOP ; A P4_CALL_1_V GOTO P4_CALL_ A0B P4_CALL_2_V GOTO P4_CALL_ A0E P4_CALL_3_V GOTO P4_CALL_ A P4_CALL_4_V GOTO P4_CALL_ A P4_CALL_5_V GOTO P4_CALL_ ; P3_CALL_5 NOP ; This is to force an intentional User Defined Message NOP RETURN ; if ( (P3_CALL_5_V & 0x0600)!= (P3_CALL_5 & 0x0600) ) Message[301]: MESSAGE: (ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P4_CALL_1 NOP NOP 060A RETURN ; if ( (P4_CALL_1_V & 0x0600)!= (P4_CALL_1 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 060B P4_CALL_2 NOP 060C NOP 060D RETURN ; if ( (P4_CALL_2_V & 0x0600)!= (P4_CALL_2 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; 060E P4_CALL_3 NOP 060F NOP RETURN ; if ( (P4_CALL_3_V & 0x0600)!= (P4_CALL_3 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P4_CALL_4 NOP

22 DS00586B-page Microchip Technology Inc NOP RETURN ; if ( (P4_CALL_4_V & 0x0600)!= (P4_CALL_4 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; P4_CALL_5 NOP NOP RETURN ; if ( (P4_CALL_5_V & 0x0600)!= (P4_CALL_5 & 0x0600) ) MESSG ERROR - User Defined: CALL VECTOR and CALL routine NOT in same page endif ; ; 07FF org RESET_V ; 07FF 0A GOTO START ; Goto the begining of the program end MEMORY USAGE MAP ( X = Used, - = Unused) 0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX 0040 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXX : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXX : XXXXXXXXXXXXXXXX X : XXXXXXXXXXXXXXXX XXXXXXX C0 : X All other memory blocks unused. Program Memory Words Used: 186 Program Memory Words Free: 1862 Errors : 0 Warnings : 0 reported, 0 suppressed Messages : 2 reported, 10 suppressed

23 Note the following details of the code protection feature on PICmicro MCUs. The PICmicro family meets the specifications contained in the Microchip Data Sheet. Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet. The person doing so may be engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as unbreakable. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our product. If you have any further questions about this matter, please contact the local sales office nearest to you. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microid, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dspic, ECONOMONITOR, FanSense, FlexROM, fuzzylab, In-Circuit Serial Programming, ICSP, ICEPIC, microport, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfpic, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July The Company s quality system processes and procedures are QS-9000 compliant for its PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchip s quality system for the design and manufacture of development systems is ISO 9001 certified Microchip Technology Inc.

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