On-line Algorithms for Complex Number Arithmetic
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1 Online Algorithms for Complex Number Arithmetic Robert McIlhenny Computer Science epartment University of California Los Angeles, CA 94 Miloš Ercegovac Abstract A class of online algorithms for complex number arithmetic is presented These algorithms adopt a redundant complex number system (RCNS to represent complex numbers as a single number Such a scheme simplifies the specification of the design, and has the additionaleffect that singleprecision complex arithmetic can be easily reconfigured for doubleprecision real arithmetic We present cost delay comparisons with the more conventional approach to show a significant improvement, demonstrating that the presented algorithms are attractive for VLSI systems demanding complex number operations Introduction Algorithms for various online operations have been developed, analyzed, and implemented in actual arithmetic units over the past two decades These include algorithms for various arithmetic operations, such as addition [5], multiplication [], and division [] A design methodology is presented in [6], and a tutorial overview is given in [5] These algorithms assume operations in real number systems However, complex number computations also have imporantant roles in various signal processing and scientific applications such as complex orthogonal transformations, convolutions, correlations, and filtering [4] Recent papers have demonstrated the emergence of online algorithms for complex number arithmetic In [7], the computability of complex addition by an online finite state automaton is demonstrated In [9], various online operators for complex arithmetic assuming radix and a borrowsave encoding of the digits are presented In this paper, algorithms for various complex number operations are presented, assuming a redundant complex number system (RCNS, which is presented next Redundant Complex Number System A RCNS, as proposed in [], is a radix( system, in which digits are in the set, where and This allows a unified representation of the real and imaginary components Redundancy is essential in online operations, since in conventional number systems, the most significant digits of the result cannot be determined until all operand digits have been inputed and any carries have been allowed to propagate fully Redundancy is achieved by using a signeddigit number representation [3] The redundancy factor in a RCNS is: A RCNS with,, and hence 3 is adopted, since, for multiplication, producing vector multiples and is merely a matter of left shifting the vector appropriately This has an advantage over the digit set where 3, which has to consider multiples 3 and 3, and has to incorporate an extra addition stage to add and The actual representation of digits will be done using an extension of borrowsave encoding [] Using this encoding, the value of a digit = is: Conversion from a signmagnitude representation consisting of a sign bit and two binary digits: ( to a radix(j digit of weight using borrowsave encoding: has to consider four cases of : Case : mod 4= (Real, positive weight Case : mod 4= (Imaginary, negative weight
2 Case 3: mod 4= (Real, negative weight a b c a b c Case 4: mod 4=3 (Imaginary, positive weight Assuming fractional operands, the value of a number, is: Alternatively, can be considered! as having radix (4 real and imaginary components, and, respectively, where: # $! % 4 3 # $& % 4 4 and! 3 Basic operations The basic operations for complex online algorithms include ( complex addition; ( complex vector by digit multiplication; and (3 shifting by j, which will be described next + PPM d e d=ab+ c (a+b e=a + b + c (a d e d=ab+ c (a+b e=a + b + c (b Figure (a PPM adder cell; (b adder cell z z k k x k + + x k 3 Complex Addition A radix (j online adder can be constructed as a modification of the radix online adder presented in [8] consisting of PPM and adder cells The details of the adder cells are shown in Figure, and the radix online adder is shown in Modifying the design for radix (j consists of: ( considering two bit slices, ( complementing the carryout, and (3 introducing extra delay registers due to the interleaving of real and imaginary digits The complex online adder with an online delay ', is shown in Figure 3 3 Complex Vector by igit Multiplication *+,+ 33 Shifting by j Figure Radix Online Adder if if if if if 5 Vector by digit multiplication for radix (j is defined such that, given input vector, where each digit and digit, then to compute (, where (, each output digit has the following functionality: Shifting a vector (multiplying ( by j for radix (j is defined such that to compute (, for each digit of, : 6
3 , x + k, y + k, x k,, z z + z z + k, k, k, k, x + k, y + k, x k, Figure 3 Complex Online Adder 4 Complex Online Algorithms In this section, online algorithms for complex number arithmetic are presented, along with their online delay The online delay of an operation is defined as the number ' such digits of an that the th result digit is produced after ' input are available The algorithms consider inputs and (, and output, where 7 In online form, ( 8 9 Operations that are considered include multiplication: ( ( and division, which are presented next 4 Complex Online Multiplication ( We want to compute At the th step: : 3 ; < = 3 ; < > 9? > < define the A th residual ( Then the residual recurrence is: B 3 4 C E FG 99? >B : 3 ; < = 3 ; < > 9? > 6 < > The algorithm for complex online multiplication is shown below: Algorithm COLMUL Step [Initialization] H I ;J I ; Step [Recurrence] for K I L M M M LN do: H 3 I O P Q RSTT U VH 3 6 W TX 3 Y 3 ; < W J 3 6 Z 3 ; < V T U 6 < V [ 3 I \] STT U VH 3 6 W TX 3 Y 3 ; < W J 3 6 Z 3 ; < V T U V 6 < V The implementation consists of appropriate registers to store and and digits and, vectorbydigit multipliers for computing and, and a borrowsave adder to add,, and A The design is shown in Figure 4 The cost and delay of each module for general ^ digit precision is shown in Table x k Reg X Reg Y / / / / / / Vector igit Vector igit z k_ BorrowSave Adder Reg W ( / ( / / Figure 4 Complex Online Multiplier
4 Module Cost elay equiv gates Reg 6^ 5 `a b c `d e e Vector igit ^ `f g a h 4i j BS Adder 4^ 8 6`a b c Table Parameters of Modules Reg Z Vector igit Reg Y Vector igit 4 Complex Online ivision We want to compute ( At the th step: X 3 k J 3 I X 3 6 k J 3 6 W Z 3 ; < T U V < l m 3 6 Y 3 ; < T U V < Letting n be the scaled partial quotient at step : n Then: o p > 9? >3 8 = 3 ; < 9? > 6 < q 3 6 : 3 9? > 6 < Letting be the th computed quotient digit, then the th residual is: A n ( The residual recurrence is: B 3 4 9? > 9 B 3 6 q r 3 6 > 8 9= 3 ; < q 3 6 : 3 ; < > 9? > 6 < The algorithm for complex online division is shown below: Algorithm COLIV Step [Initialization] [ m I ; I H ; I X ; Step [Recurrence] fork I L M M M LN do: H 3 I T U V T H 3 6 l [ 3 6 J 3 6 V W TZ 3 ; < l m 3 6 Y 3 ; < V T U V 6 < [ 3 I s t u T H v 3 V where the selection functionw x y v A is computed according to a lookup table that takes a digit (8bit truncated value of A and returns the appropriate quotient digit / The implementation consists of appropriate registers to store A,, and ( and digits, and, vectorbydigit multipliers for computing and (, a borrowsave adder to add, (, and A, and a lookup table to compute The design is shown in Figure 5 5 Evaluation x k BorrowSave Adder Reg W SEL Figure 5 Complex Online ivider The proposed designs (Prop were compared to the conventional (Conv approach consisting of a network of real online operators In the conventional approach, the real and imaginary components are computed according to the equa tions in Table, assuming z {, }, and ( ~ (, where = op The implementations were mapped onto Altera K FPGA s [] and measured for cost in terms of the number of logic cells, and critical delay, as shown in Table 3, assuming a total precision of 8 digits (4 for the real component, 4 for the imaginary component For multiplication, two conventional approaches were considered, including the standard fourmultiplications and two additions (4MA approach, and the threemultiplications and five additions (3M5A approach presented in [] For division, four real online multipliers, two real online dividers, two square units, and three real online adders were used Op ~ Result Mul { } z } { } } z { } { } iv ƒ ƒ (4MA (3M5A Table Conventional Complex Equations
5 Op Cost ' Total elay (ns Mul Prop MA 8 4 3M5A iv Prop Conv Table 3 Comparison of Approaches for precision ^ 8 6 Conclusion Online algorithms were presented for complex number arithmetic using a redundant complex number system (RCNS to represent complex numbers as a single number Implementations were compared to a network of real online adders, to demonstrate a significant reduction in cost and in delay Such algorithms can be further developed for other operations such as complex squareroot, complex square, and composite algorithms can be designed for actual applications involving complex numbers, such as the Fast Fourier Transform (FFT, recursive digit filters, and various other applications [8] A Guyot, B Hochet, and JM Muller JANUS, an online multiplier/divider for manipulating large numbers 9th IEEE Symposium on Computer Arithmetic, pages 6, September 989 [9] A Nielsen Number systems and digit serial arithmetic (Ph dissertation ept of Mathematics and Computer Science, Odense University, enmark, 996 [] A Nielsen and JM Muller Borrowsave adders for real and complex number systems nd conference on real numbers and computers, April 996 [] K Trivedi and M Ercegovac Online algorithms for division and multiplication IEEE Transactions on Computers, C 6:68 687, July 977 [] B Wei, H u, and H Chen A complexnumber multiplier using radix4 digits Proceedings of the th Symposium on Computer Arithmetic, pages 84 9, 995 Acknowledgments This research has been supported in part by the MICRO Grant 9837 Reconfigurable Hardware for Numerically Intensive Computations, Raytheon Systems Company and Xilinx References [] AlteraCorporation Altera Max+Plus II Manual San Jose, CA, 996 [] T Aoki, Y Ohi, and T Higuchi Redundant complex number arithmetic for highspeed signal processing IEEE Workshop on VLSI Signal Processing, pages 53 53, October 995 [3] A Avizienis Signed digit number representations for fast parallel arithmetic IRE Transactions on Electronic Computers, EC:389 4, 96 [4] B Barazesh, J Michalina, and A Picco A VLSI signal processor with complex arithmetic capability IEEE Transactions on Circuits and Systems, 35(5:495 55, May 988 [5] M Ercegovac Online arithmetic: an overview Real Time Signal Processing VII, SPIE495, pages 86 93, 984 [6] M Ercegovac and T Lang Online arithmetic: a design methodology and applications 988 IEEE Workshop on VLSI Signal Processing, pages 5 63 [7] C Frougny Parallel and online addition in negative base and some complex number systems EuroPar 96 Parallel Processing, :75 8, 996
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