Cisco Enterprise Silicon:
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2 Cisco Enterprise Silicon: Delivering Innovation for Advanced Routing and Switching Carl Solder Dave Zacks Director, Engineering Distinguished Engineer
3 Cisco Enterprise Silicon: Delivering Innovation for Advanced Routing and Switching Session Overview and Objectives Come to this session to learn about the latest advances in Cisco Enterprise silicon development ASIC (Application Specific Integrated Circuit) hardware which provides a key foundational element of the Cisco ONE Enterprise Architecture, and which support key industry trends such as SDN. Attendees at this session will gain a greater insight into how ASICs are created, showcasing the advanced capabilities and functionality delivered by two of Cisco s latest switching and routing silicon innovations UADP (Unified Access Data Plane) and QFP (QuantumFlow Processor). By developing custom silicon, and leveraging this advanced hardware within our Enterprise portfolio, Cisco has always provided differentiating capabilities and compelling customer value across many platforms. In this session, we will explore the capabilities and advantages provided by custom Cisco silicon, provide greater insight into the functionality delivered by existing Cisco Enterprise ASICs, and explore the new capabilities and solutions enabled by Cisco's latest generation of Enterprisefocused programmable switching and routing chipsets UADP and QFP.
4 Cisco Enterprise Silicon: Delivering Innovation for Advanced Routing and Switching Your Instructors Today Carl Solder and Dave Zacks Carl is a Director of Engineering, and has been with Cisco for 18 years. Carl has extensive experience with many types of Enterprise network systems and deployments, and has a intense focus on competitive analysis of solutions from Cisco and others. Dave is a Distinguished Engineer, and has been with Cisco for 15 years. Dave works primarily with large, high-performance Enterprise network architectures, designs, and systems. Dave has over 20 years of experience with designing, implementing, and supporting solutions with many diverse network technologies. We both have a strong interest in ASIC hardware and solutions a passion we hope to share with you via this presentation! Carl Solder Director Dave Zacks Dist. Engineer
5 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 5
6 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 6
7 What is an ASIC? An Application Specific Integrated Circuit is an integrated circuit customized for a particular use, rather than intended for general purpose use 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 7
8 Why talk ASICs? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 8
9 I Love ASICs Rob Lloyd Cisco President Cisco Live Orlando Cisco and/or its affiliates. All rights reserved. Cisco Public 9
10 Cisco has a wide portfolio of ASICs 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 10
11 This presentation focuses on Enterprise Network ASICs only 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 11
12 Network Application Layer Control Layer Enterprise Architectural Template Network Element Layer 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 12
13 Network Application Layer Control Layer Where ASICs Play Network Element Layer 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 13
14 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 14
15 How is an ASIC built? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 15
16 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 16
17 Then, it starts with coding Verilog VHDL RTL Register Transfer Level 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 17
18 Synthesis Process Converts code into logical gate constructs (Netlist) 18
19 Floor Planning & Placement Floor planning Arrange and interconnect constructs, connect power, minimize crosstalk, etc 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 19
20 Imprint design on Silicon Wafer 20
21 Validation of Chip functionality
22 Some manufacturing considerations 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 22
23 Sometimes we question if size matters?? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 23
24 In the ASIC world the smaller the better! 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 24
25 We are talking transistors and how many we can pack in an ASIC die 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 25
26 The number of transistors incorporated into a chip will approximately double every 24 months Moore s Law Cisco and/or its affiliates. All rights reserved. Cisco Public 26
27 Transistor Width measured in Nanometers Nanometer = One Billionth of a Meter 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 27
28 Use of smaller technology leads to benefits Lower Price Lower Power Higher Performance 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 28
29 Let s explore the question of Yield 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 29
30 The Silicon Wafer 30
31 Every Wafer Has Impurities 31
32 Problem hits after masking 32
33 Not all ASICs are good 33
34 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 34
35 ASIC Re-Spin (if needed) 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 35
36 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 36
37 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 37
38 Time to market opportunities Specifications meet customer requirements Standard based capabilities 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 38
39 Why does Cisco develop our own silicon? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 39
40 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 40
41 Innovation Examples New Functionality (CAPWAP, VxLAN, etc) Low Latency Switching Advanced QoS Security Enhancements Programmable Pipeline 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 41
42 Optimization Examples Integrated Stacking Support Rapid Recirculation (Encapsulations) Advanced Functionality (VSS, StackPower) Visibility (Full NetFlow) Security (MACsec, SGTs) 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 42
43 Economies of Scale Cisco total silicon business is several times the size of competitors We deploy our ASICs into some of the largest run rate platforms in the industry 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 43
44 Leading the Market Examples Wired / wireless integration (CAPWAP) Instant Access (VNtag) TrustSec (SGTs, SGACLs) SDN (OpenFlow, ONEpk) Advanced QoS and Traffic Visibility 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 44
45 Delivering Business Value Simplified Deployment Options Better Insight and Optimization Increased Security Most Appropriate Scalability Flexibility and Investment Protection (programmability) 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 45
46 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 46
47 Cisco has a Long History of Enterprise Switching ASIC Innovation 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 47
48 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 48
49 Cat3750 Cat nm 60M Transistors Catalyst 29xx Cat2960S 65nm Cat2960X 45nm Cat3750E Cat3750X 130nm 210M Transistors 1.3B Transistors Cat3850 / nm Cat3750G 130nm Catalyst 3xxx 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 49
50 Support for StackWise stacking (32G stack), IPv4 Unicast and Multicast Routing, IPv6 Unicast Routing, Ingress and Egress Policing, Egress Shaping, SRR, WRED, 802.1Q and ISL support, Multiple SPAN sessions, RSPAN, Integrated packet buffer, External TCAM, urpf, StackWise Plus (64G stack), SGT capability, IPv6 Multicast Routing (wide keys), Support for Jumbo Frame Routing (9216), Support for multiple First Hop Router Redundancy protocols at once, Hardware Merge TCAM, Integrated Hash Tables, Integrated associated data tables, Support for MadMax ASIC (Fabric with 4 stack ports), Support for Local Switching, FlexStack support, Low power -> Fanless possible, MACSec, ERSPAN, COPP 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 50
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53 High-performance centralized switching 492 Gbps L2 / L3 capacity, IPv4 and IPv6 forwarding in hardware, up to 250 Mpps Multicast, up to 60Gbps Recirculation bandwidth, 256K routes (128K IPv6) and 48K adjacencies, ECMP routing, Unicast RPF (strict and loose), VRF-lite (64 VRFs), EVN support, 64K input and 64K output ACEs, 8 bidirectional SPAN sessions, NetFlow (up to 128K flows), Advanced Congestion Avoidance: Dynamic Buffer Limiting (DBL), Smooth Round Robin (SRR) with sharing and shaping per queue, Granular per-port per-vlan policies, IP Source Guard, 64 CPU queues with CoPP, large (32MB) high performance shared packet buffer, PVLAN support for promiscuous and isolated trunks, 1:1 & 1:N VLAN Translation, Packet & byte counters per adjacency, Policy-based Routing 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 53
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55 Cat 5000 Sup1 Cat 5000 Sup2 Cat 5500 Sup3 Cat 6000 Sup1 Cat 6500 Sup1A Cat 6500 Sup2 250nm 24M Trans Cat 6500 Sup720 3A/B/BXL 180nm 100Trans Cat 6500 Sup720 3C/XL 130nm 102M Trans Cat 6500 Sup2T Nexus nm 1.4B Trans Catalyst 5000 / 5500 / 6000 / 6500 / 6800 Nexus Cisco and/or its affiliates. All rights reserved. Cisco Public 55
56 IPv6 Unicast + Multicast in Hardware, RSPAN, ERSPAN, GOLD, OBFL, ACL Merge Optimization, Netflow, MPLS in Hardware, IGMPv3, EoMPLS, VPLS, A-VPLS, NAT, PAT, RBACL, Egress Multicast Replication, Full and Sampled Netflow, Ingress/Egress Netflow, IPv4 Tunneling, GRE, IPv6 Tunneling, 6to4 Tunneling, ISATAP Tunneling, Recirculation, Bridge Domains, Static MAC match conditions, Virtual Switch Link, Bi-Directional PIM, Control Plane Policers, HW Rate Limiters, Ingress/Egress Aggregate Policers, Microflow Policers, VSS support, Strict and Loose RPF Check, HW PIM Register Encap/Decap, MPLS QoS, Ingress/Egress DSCP Mutation, QPPB, SGT, 3 Color Policing, MLD Snooping, RBH for Etherchannel Mapping, Port Security, Optimized IP Multicast Flooding, 16 Way ECMP 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 56
57 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 57
58 Traditionally the pipeline is FIXED 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 58
59 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 59
60 What is the most programmable silicon available today? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 60
61 The General Purpose CPU Very Flexible BUT SLOW 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 61
62 Field Programmable Gate Array (FPGA) Flexible And Faster But Costlier 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 62
63 The Network ASIC Very Fast BUT FIXED 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 63
64 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 64
65 So where can Programmable ASICs help us? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 65
66 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 66
67 Programmability introduces flexible pipelines 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 67
68 Modify processing behavior without incurring re-spin 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 68
69 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 69
70 Programmable Routing Silicon Quantum Flow Processor QFP 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 70
71 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 71
72 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 72
73 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 73
74 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 74
75 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 75
76 1.2 GHz / 400 MHz 40 custom multi-threaded CPUs 90nm, 8-layers metal 307 million transistors 1019 I/O, including 800 MHz DDR 382 mm Cisco and/or its affiliates. All rights reserved. Cisco Public 76
77 w 1.01W 5W 128K Queues None None 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 77
78 400 MHz Buffering, 128K queues Hardware HQF scheduling 90nm, 8-layers metal 332 mm million transistors 1318 I/O, including 800 MHz DDR 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 78
79 1.2 GHz / 400 MHz 64 custom multi-threaded CPUs Up to 1500 MHz Buffering, 116K queues Hardware HQF scheduling 40nm, 10-layers metal 324 sq mm 1.8 Billion transistors 1480 I/O, including 800 MHz DDR 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 79
80 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 80
81 What does this mean for me? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 81
82 QFP Programmable Hardware equals FLEXIBILITY PERFORMANCE 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 82
83 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 83
84 QFP Feature Velocity Over 2600 features 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 84
85 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 85
86 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 86
87 Programmable Switching Silicon Unified Access Data Plane UADP 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 87
88 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 88
89 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 89
90 Microcode Programmable Pipeline w/flexparser 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 90
91 240G Stacking Interface integrated into ASIC 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 91
92 On Chip Micro Engines Fragmentation / Reassembly, Encryption / Decryption (AES-128, CBC) 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 92
93 High-Performance Recirculation Path (less than 1usec Recirculation Latency) 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 93
94 Integrated On Chip Netflow 24K Entries 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 94
95 Stack spatial reuse Local switching Jumbo frames 8 egress queues per port Dynamic fair buffer sharing Active queue management WRED Approximate Fair Drop Per Flow counters Control Plane Protection SRR scheduling Microflow 1R2C policers Aggregate 2R3C policers Policer chaining Class-based flow control Packet parser Unicast RPF Private VLANs PBR IGMP / MLD snooping SGT support Role-based ACLs Policy-based ACLs Client-based or Group-based ACLs L2 / L3 tunnel support CAPWAP DTLS srtp Embedded logic analyzer SPAN, RSPAN, ERSPAN, Flow SPAN Features noted are hardware capable with UADP, but are not yet necessarily productized 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 95
96 Let s look at UADP more closely 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 96
97 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 97
98 256 Byte Lookup Parse for any header field 15 programmable stages Up to 250 frames across stages at one time 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 98
99 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 99
100 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 100
101 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 101
102 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 102
103 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 103
104 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 104
105 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 105
106 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 106
107 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 107
108 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 108
109 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 109
110 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 110
111 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 111
112 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 112
113 What does this mean for me? 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 113
114 UADP Programmable Hardware equals FLEXIBILITY INVESTMENT PROTECTION 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 114
115 Approximate Fair Drop Fair Congestion Queue Bandwidth Sharing Granular Per-User QoS 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 115
116 UADP Approximate Fair Drop Policer Voice Queue Strict Priority Policer Video Queue Fair Bandwidth Allocation Courtesy of AFD Without Configuration Weighted Client VQ SSID VQ Radio VQ Scheduling Min or Max BW Allocation Default Shaper Data Queue Radio Agg Default Shaper AFD BLOCK Policer Multicast Queue Into a wired port Out of a wireless port 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 116
117 Traffic Visibility e.g. Netflow Control Wired / Wireless QoS / Security Scalability ac 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 117
118 VxLAN* TRILL* SPB* LISP* and more * Not Committed Possible Future UADP Use Cases 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 118
119 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 119
120 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 120
121 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 121
122 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 122
123 AGENDA Why ASICs? How is an ASIC developed? Merchant vs. Custom Cisco ASIC History The Move to Programmability QFP UADP Additional Silicon Innovations Summary Cisco and/or its affiliates. All rights reserved. Cisco Public 123
124 Trend towards Programmability 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 124
125 Time to Market Specific Customer Requirements Innovation Optimization Economies of Scale Lead Market Deliver Value 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 125
126 Network Application Layer Control Layer Where ASICs Play Network Element Layer 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 126
127 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 127
128 Critical Role of ASICs 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 128
129 Cisco Enterprise Silicon: Delivering Innovation for Advanced Routing and Switching Did We Achieve Our Objectives? Do you have a better understanding - of how ASICs are designed and built - of their capabilities and functions - and of the critical role they play in networks? Carl Solder Director Dave Zacks DSE
130 Participate in the My Favorite Speaker Contest Promote Your Favorite Speaker and You Could Be a Winner Promote your favorite speaker through Twitter and you could win $200 of Cisco Press products (@CiscoPress) Send a tweet and include Two hashtags: #CLUS #MyFavoriteSpeaker You can submit an entry for more than one of your favorite speakers Don t forget to View the official rules at Carl Solder Director Dave Zacks DSE 130
131 Complete Your Online Session Evaluation Complete Your Online Session Evaluation Give us your feedback to be entered into a Daily Survey Drawing. A daily winner will receive a $750 Amazon gift card. Complete your session surveys though the Cisco Live mobile app or your computer on Cisco Live Connect. Don t forget: Cisco Live sessions will be available for viewing on-demand after the event at CiscoLive.com/Online 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 131
132 Continue Your Education Continue Your Education Demos in the Cisco campus Walk-in Self-Paced Labs Table Topics Meet the Engineer 1:1 meetings Related sessions 2015 Cisco and/or its affiliates. All rights reserved. Cisco Public 132
133 Thank you BRKCRS Cisco and/or its affiliates. All rights reserved. Cisco Public 133
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