Integrated Scheduling and Buffer Management Scheme for Input Queued Switches under Extreme Traffic Conditions

Transcription

1 Integrated Scheduling and Buffer Management Scheme for Input Queued Switches under Extreme Traffic Conditions Anuj Kumar, Rabi N. Mahapatra Texas A&M University, College Station, U.S.A {anujk, Abstract - This paper addresses scheduling and memory management in input queued switches having finite buffer space to improve the performance in terms of throughput and average delay. Most of the prior works on scheduling related to input queued switches assume infinite buffer space. In practice, buffer space being a finite resource, special memory management scheme becomes essential. We introduce a buffer management scheme called ismm (Integrated Scheduling and Memory Management) that can be employed jointly with any deterministic iterative scheduling algorithm. We applied ismm over islip, a popular scheduling algorithm, and examined its effect under extreme traffic conditions. Simulation results indicate ismm to perform better than the raw islip and maximum weighted matching (MWM) scheduling algorithms both in terms of throughput and delay. I. INTRODUCTION Switch-based interconnects are commonly used in multiprocessor networks and routers. Packet scheduling and buffer management are the two important issues to manage the switching resources. While the former determines which packets can be scheduled according to a number of switching restrictions, the later addresses the packet acceptance policy to incoming packets based on the buffer and switch states. The packet scheduling in crossbar switches and buffer management for shared memory packet switches are well studied problems. Traditionally, these studies address the scheduling and buffer management issues in isolation. However, to obtain maximum benefit in terms of system performance, both the packet scheduling and buffer management decisions must be taken in conjunction. The amount of buffer available at an input port of a switch is usually large and its size is determined by the delay-bandwidth product. During extreme conditions (packets from many input ports continuously destined to only a few output ports), this buffer space becomes insufficient due to the congestion experienced at the output ports, leading to significant loss in overall throughput. Therefore, a robust buffer management scheme is required at the input ports to maintain the switch throughput at all conditions. The strategy to jointly optimize scheduling and memory management can be achieved by computationally solving a markov decision process [14]. Markov decision process requires significant computations that consumes lot of time and uses lot of memory. This technique becomes unmanageable even for switches with moderate buffer size and small number of ports. Balance Congestion at Terminal () algorithm based on MWM scheduling has been proposed in [14] that uses packet push-out (dropping packets already in a queue to accept arriving packets) and uses the entire switch state to determine whether to accept or reject an incoming packet. Such a scheme is very difficult to implement. The rest of the paper is organized as follows. Section II discusses related work. In Section III we propose the integrated scheduling and memory management scheme (ismm). The simulation strategy is given in Section IV. The simulation results comparing ismm with islip, MWM and under extreme traffic conditions are presented in Section V. Finally, we conclude the paper with a note on future research directions. II. BACKGROUND Over the past few years input queued crossbar switch architecture has become the most popular architecture in highspeed networks due to the requirement of low memory bandwidth. Input queued switches are required to operate at the same speed as the input and output line. Three main components of this architecture are the input buffer, crossbar switching block and the centralized scheduler. Virtual output queuing (VOQ) solves the head-of-line (HOL) blocking problem [7] by maintaining separate queues at the input, one for each output [1]. Several algorithms based on maximum weighted matching have been shown to provide 1% throughput [2], [9] which consider different measures for weight such as the longest queue first (LQF), the oldest cell first (OCF)[11], and the longest port first (LPF)[1]. Due to their high complexity (i.e. O(N 3 logn) for LQF), they are not suitable for implementation, especially in high aggregate bandwidth switches. As an alternative to maximum matching, many maximal matching schemes have been considered. Maximal matching algorithms such as PIM [1], islip [8], Shakeup [4], WPIM [15] and ifs [12] use iterative scheme that repeatedly search for matches between inputs and outputs at each scheduling cycle. Buffer allocation policies have been studied extensively for shared-

2 memory packet switches but never in conjunction with scheduling algorithms. III. ALGORITHM In this section, we propose the ismm scheme that can be applied to any deterministic iterative matching scheduling algorithms. These iterative scheduling algorithms consist of three steps per iteration: request, grant and accept. A. Network Model We consider an input queued switch with N inputs and N outputs. The size of the buffer (B) at the input ports is assumed to be equal to keep the algorithm simple. Incoming packets have their outputs determined prior to their arrival. Cells arriving at input i for output j are stored in VOQ ij and when it reaches the head-of-line and included in the match it is transferred to output j. Length of VOQ ij (number of packets waiting at an input i for output j) at time t is denoted by L ij (t). Arrivals are fixed size packets or cells that allow us to split time into discrete cell time or slots within which a scheduling cycle takes place. We will use the terms cells and packets interchangeably. B. ismm The memory management problem is to decide how to share the buffer among packets arriving at an input but having different outputs as destination. This is done by an acceptance test that every arriving packet undergoes which decides whether to accept or reject the packet. The test comes into effect only when the total occupancy of an input buffer is more than a threshold (T). To make the most efficient decision, the test should consider the current buffer and switch state. The buffer state consists of number of packets in each VOQ (L ij i, j). However, the only information available at an input port i is the number of packets in each VOQ for that input (L ij j). State of a switch depends on the particular scheduling algorithm that is implemented in the switch. There are two important quantities that can be inferred from the switch state. First is the minimum number of time slots for which an input port i will not get a grant from an output port j. This depends only on the number of inputs (other than i) having packets for same output j (i.e., number of other ports competing against it at that instant for output j). It is independent of the absolute number of packets at those inputs. At the Request step, each input sends a request to every output for which it has a queued cell. So each output port has the information about the number of input ports having packets with destination as that output. Since we are dealing only with deterministic algorithms, the output arbiter can calculate the minimum number of time slots for which an input port will not get a grant from an output that we refer as output-congestion. This information needs to be passed from output ports to different input ports. In addition to the three steps in any iterative matching scheme, we add another step to it and called it Feedback step. The output ports send feedback (output-congestion) to the input ports about the number of inputs competing for that output. This requires a total of N 2 messages to be transmitted from output arbiters to input arbiters (full feedback scheme). Transmitting these many messages each time slot slows down the operational speed of the switch. Significant amount of hardware is required to calculate these many values each time slot. However, the Internet traffics are highly correlated where cells arrive in bursts because of which there is very little change in queue length during successive slots. Therefore, the number of inputs destined for the same output changes very slowly with successive slots. In ismm, an output arbiter sends a feedback only to that input whose request is granted. This result in a significant reduction in number of messages exchanged compared to full feedback scheme without much loss in performance that we have verified through simulation but not presented in this paper for lack of space. The second quantity is the minimum number of time slots for which an input port i will not get to accept a grant from an output port j. This depends on the number of outputs (other than j) for which input i has packets to transfer which we call as input-congestion (i.e., VOQs belonging to same input competing against each other for their granted request to get accepted). All the information needed to calculate this quantity is obtainable locally. The total congestion that input i face for output j at time slot t is the sum of output-congestion ij (t ) and input-congestion ij (t ). Next, we examine the buffer space that is shared among all the VOQs at each input port. The rate of packet drops at input i for output j will be proportional to the fraction of total buffer size occupied by VOQ ij. The main idea behind the proposed scheme is to drop those packets with higher probability that require either more slots to get a grant from an output or more slots to accept a grant from an output or belongs to a VOQ that has greater percentage of packets compared to other VOQs for that input. The scheme drops high delay packets in favor of low delay packets. If we do not drop high delay packets (i.e., do not take switch state into consideration), the buffer occupancy at an input port starts to increase till it reaches the maximum limit at which all the incoming packets are dropped which includes some of the low delay packets. The overall dropping probability for a packet at input i having destination as output j at time t is given by the following equation: Lij ( t) Pr( droppacketij )( t) = β BOi ( t) output congestionij ( t) + α 2N input congestionij ( t) + α, 2N (1)

3 where BO i (t ) = total buffer occupancy at input port i at time t. The first term of the sum is contribution due to the buffer state while the second and third terms are due to switch state. The α and β are the scaling factor that will be used to control the contribution of switch and buffer state toward packet dropping probability. We will be using different values of α and β for various input-output pairs depending on their switch and buffer state. In the next section, we demonstrate how ismm scheme can be applied to islip. C. ismm with islip (islip-mm) Switch state for islip consists of position of grant pointer for all output ports (g j j) and position of accept pointer for all input ports (a i i). However, the only information available at an input port i is the number of packets in each VOQ for that input (L ij j) and the position of it s accept pointer (a i ). Since islip is a round-robin scheduling algorithm, an input i with packet for output j once granted and accepted will get its next turn only after all the other input ports having packets for output port j have been accepted. Whenever output j grants a request to input i at time slot t, the value of feedback is given by the following equation: g j 1 k=+ i 1 kj output congestion ( t ) = r ( t ), where (2) ij 1 if there is a request from input k to output j rkj =. otherwise The value of output-congestion ij (t ) signifies the lower bound for the number of slots after t that input i request will not be granted by output j. This value is a lower bound since there may be some input ports where packets for output j arrive after t that did not have packets for output j at t. The value is updated each time input i request is granted by output j. So input i maintains N such output-congestion values, one for each output, that are updated at different time slots (whenever a request by input i is granted by the corresponding output). An input port i with packet for output port j once granted and accepted will get a turn only after all the request s from input i to other outputs gets granted and accepted. At time t the value of input- congestion is calculated according to the following equation: j input congestion ( t ) = l ( t ), where (3) ij ik k= a i 1 if Lik > lik = otherwise The worst case for the number of slots that an input port may have to wait before getting a grant from an output port and it to accept that grant (i.e., a packet from input i to be scheduled for output j) is N 2. This happens when all the VOQs for all the inputs are non-empty. IV. SIMULATION A resource allocation scheme is judged based on its efficiency and fairness [13]. Since islip uses round robin scheduling, it guarantees never to starve an input queue thus providing fairness to all input-output pairs. Therefore, we would be focusing on efficiency. The principal measures for evaluating efficiency are throughput and average delay. is defined as the fraction of total incoming packets that are scheduled (not dropped). The average cell latency is measured in terms of time slots a packet takes between its arrival and departure. Since maximizing throughput and minimizing response time are mutually contradictory we will use the metric performance effectiveness (Peff) similar to the one used in [6], [3]. This helps in evaluating the overall improvement or impact due ismm scheme compared to other algorithms. Peff is defined as the ratio of system-wide throughput to system-wide response time. In all the simulations we consider a switch having N = 32 ports. In the first part of the simulation results, we keep the value of B = 5, α =.5, β =.5 and threshold = 6% of B. In the second part of the simulation result, we show the impact on Peff for different B. We study the dependency of ismm on α, β and threshold and explore how to improve on the results by changing these configurable parameters. For islip and MWM, memory management is not an issue due to the assumptions on infinite buffer size. Therefore, during the simulations, islip and MWM follows the drop tail strategy. The memory management comes into effect only when the buffer occupancy in an input queue exceeds threshold. Therefore, simulations are not conducted for lower value of offered load. Under heavy load, islip approximates timedivision multiplexing (serving each input in turn) and hence scheduling scheme solely determines the performance. Effectiveness of the proposed scheme is best found in 5%- 85% (medium-to-heavy load) range of offered load. Following is an example of extreme traffic that we refer to as NonUniform. We would be using this traffic for the rest of the paper. This involves a non-uniform Bernoulli traffic model similar to that used in [15], [12]. The assumption is that 8 of the switch ports are connected to servers and remaining 24 to clients. Each client sends 8% of its generated traffic to each of the 8 servers and the remainder is uniformly distributed among clients. Similarly, each server directs 9% of its traffic uniformly among all the clients and remaining 1% among all the servers. V. RESULTS A. Comparison between islip-mm and islip Fig. 1 shows the average delay and throughput as a function of offered load for NonUniform arrivals. islip-mm performs better than islip by 5% in terms of both

4 8 Average Cell Latency is LIP is LIP -M M is LIP.8 is LIP -M M Fig. 1: Comparison of islip and islip-mm in terms of delay (left) and throughput (right) for NonUniform input traffic. N = 32, B = 5, threshold = 3, α =.5 and β =.5. Average Cell Latency iSLIP 4-iSLIP -MM MWM iSLIP 4-iSLIP -MM MWM.6 Fig. 2: Comparison of 4-iSLIP, 4-iSLIP-MM, MWM and in terms of delay (left) and throughput (right) for NonUniform input traffic. N = 32, B = 5, threshold = 3, α =.5 and β =.5. delay and throughput. We have performed experiments with more skewed traffic and found that larger the skew in input traffic, better performance gain is expected. B. Comparison between islip-mm, MWM and Fig. 2 shows the average delay and throughput of 4- islip, 4-iSLIP-MM, MWM and as a function of offered load for NonUniform arrivals. Here prefix 4 stands for four iterations of grant-accept stage in each scheduling cycle. 4-iSLIP-MM performs better than MWM in terms of both delay and throughput. This further strengthens the claim made in [14] that MWM no longer remains the optimal algorithm in case of finite buffer. We observe that has better throughput but poor delay response with respect to 4-iSLIP-MM. The higher throughput of is accounted due the fact that makes use of entire switch state during each time slot and uses MWM as the matching algorithm. However, due to high algorithmic complexity its implementation is practically infeasible. C. Performance Enhancement by tuning α, β In Table I, we give the percentage of packet drops under medium to heavy load that has been observed during simulation to understand the sources of packet drops. This includes switch state only (SWITCH), buffer state only (BUFFER), switch state and buffer state independently (SB- Independent), combined switch state and buffer state (SB- Integrated). When the buffer is full, incoming packets are dropped. We see that both the SWITCH and the BUFFER state contribute to packet drop. We now explore the characteristics of various switch and buffer states in the presence of NonUniform traffic. For this, we classify all the incoming traffic in to four different groups - server-to-server (SS), server-to-client (SC), clientto-server (CS) and client-to-client (CC). For each group we examine the value of mean VOQ length (M-VOQ-Len), mean output-congestion (M-OC), and mean inputcongestion (M-IC). Due to the distribution of incoming traffic, the value of M-VOQ-Len (SS) and M-VOQ-Len (CC) are very small. Since SC flows is distributed among large number of clients, the M-VOQ-Len (SC) also remains low. Value of M-VOQ-Len (CS) is high since CS flows is distributed among small number of servers and they have large share of input client traffic. SC and CC packets face little competition from each other leading to small value of M-OC (SC) and M-OC (CC). Due to the skew nature of traffic, packets tend to accumulate in VOQs destined for server leading to large M-OC (SS) and M-OC (CS). Therefore, we need different values of α and β for different flows. We noticed that there is no packet drop at input ports belonging to servers. Therefore, we keep α and β to be.5. For CS flow, we increase the values of α and β. This has a significant impact on both delay and throughput with main impact being due to increase in the value of α. The objective is to drop packets with large delays in order to keep the buffer from getting full. Hence, packets belonging to CC flows will not get rejected. This approach increases the throughput and decreases the overall delay since packets belonging to CC flows encounter low delay. This also helps

5 Table I: Percentage of packets drop due to various factors under heavy load with α =.5, β =.5 and threshold = 6%. Traffic SWITCH BUFFER SB-Independent SB-Integrated NonUniform (Single Iteration) NonUniform (Four Iterations) Table II: Change in delay and throughput due to different values of α and β for NonUniform traffic and other parameters same as in Figure 3 and under load of.8. The values shown here are for any client input port for certain simulation period. α(cs) β(cs) α(cc) β(cc) Packet dropped among Packet accepted among Average Delay (system-wide) (system-wide) CC flows CC flows Average Cell Latency iSLIP-MM 4-iSLIP-MM-IMP iSLIP-MM 4-iSLIP-MM-IMP Fig. 3: Comparison of 4-iSLIP-MM, 4-iSLIP-MM-IMP and in terms of delay (left) and throughput (right) for NonUniform traffic. N = 32, B = 5, threshold = 3. α and β for server ports =.5 while α(cs) =.9, β(cs) =.9, α(cc) =.2 and β(cc) =.2. Peff Improvement (%) iSLIP-MM vs MWM vs MWM Peff Improvement (%) iSLIP-MM vs 4-iSLIP-MM-IMP vs Fig. 4: Comparison of percent improvement in performance effectiveness (Peff) of 4-iSLIP-MM vs. MWM and vs. MWM for Non- Uniform (left) traffic with parameters as in Figure 2, 4-iSLIP-MM vs. and 4-iSLIP-MM-IMP vs. for Non-Uniform (right) input traffic with parameters as in Fig. 3. Peff Improvement (%) B = 2 B = 5 B = 1 Grant 1 Grant 2 Grant 3 Itn #1 Accept 1 Accept 2 Accept 3 Feedback Fig. 5: (Left) Comparison of percent improvement of Peff of 4-iSLIP-MM-IMP vs. with different values of B for Non-Uniform input traffic with parameters as in Fig. 3. (Right) Grant-Accept-Feedback Pipeline for a three-iteration islip-mm. Itn #2 Itn #3

6 in decreasing the congestion towards few heavily loaded outputs. The first four rows of Table II depict this effect. As we increase the value of α and β, the mean packet drops for CC flows decreases resulting in higher throughput. For CC flows, we decrease the value of α and β. The result can be seen from the last two rows of Table II. The change in value of α and β for CC flows tends to drop lesser packets through SWITCH since SWITCH is the major contributor to the overall dropping probability of packets belonging to CC flows. We name the scheme with these modifications as islip-mm-imp. Figure 3 compares the performance of 4-iSLIP-MM, 4- islip-mm-imp and MWM () for NonUniform input traffic with α and β for server ports =.5, α(cs) =.9, β(cs) =.9, α(cc) =.2, and β(cc) =.2. The figure clearly shows the improvement in throughput for 4-iSLIP- MM-IMP over 4-iSLIP-MM. The throughput difference between 4-iSLIP-MM-IMP and decreases. 4-iSLIP- MM-IMP has remarkable delay advantage over the other two. Figure 4(left) compares Peff of 4-iSLIP-MM and MWM and we find that 4-iSLIP-MM has ~5% better performance. In Figure 4 (right), we compare Peff of 4-iSLIP- MM and 4-iSLIP-MM-IMP with respect to. Even though has better throughput, Peff of 4-iSLIP-MM- IMP is better than due to significant reduction in delay. Figure 5(left) shows the percentage improvement of Peff of 4-iSLIP-MM-IMP over for different value of buffer size B. We see that trend remains almost the same irrespective of the variation in buffer size. We need a simple and practical mechanism that dynamically varies α and β as input traffic changes. Our aim is to reduce congestion toward heavily loaded output ports. Thus, we see that parameter output-congestion affects the system-wide performance. The other two parameters inputcongestion and L ij use local information and can be tuned to improve local performance. Therefore, output-congestion is the most important parameter among the three. We show that the memory management scheme has negligible impact on the switching speed. Gupta et al. [5] proposed a pipelined implementation of islip scheduler. Fig. 5 (right) is an extension of the Grant-Accept pipeline having the Feedback stage. For multiple iteration islip, there is no need of any feedback after the first iteration since the value of output-congestion will be equal to (iteration_number 1). No extra clock cycle is required to feedback the output-congestion from output arbiter to input arbiter. VI. CONCLUSION In this paper, we introduced a memory management scheme called ismm for input queued switches having finite buffer to improve both the average delay and throughput. The switch and the buffer states were considered while making decisions on whether to accept or drop an arriving packet. The proposed scheme has negligible effect on the switching speed. The simulations results show the proposed scheme to perform better both in terms of throughput and delay when compared to islip, MWM under extreme traffic (high degree of skewness) condition and performs competitively with in terms of the throughput. As part of future work, we plan to come up with a simple and practical mechanism that determines how to vary α and β as input traffic changes using the inferences drawn from the simulations carried in this paper. By doing so, we will have a good control on delay and throughput metrics. We would further like to evaluate the proposed scheme using real Internet traffic traces. REFERNCES [1] T. Anderson, S. Owicki, J. Saxe, and C. Thacker, High Speed Switch Scheduling for Local Area Networks, ACM Transactions on Computer Systems, , Nov [2] J.G. Dai and B. Prabhakar, The throughput of data switches with and without speedup, IEEE INFOCOM, 2. [3] A. Giessler, J. Haanle, A. Konig, and E. Pade, Free Buffer Allocation - An Investigation by Simulation, Computer Networks, Vol. 1, No. 3, July 1978, pp [4] M.W. Goudreau, S.G. Kolliopoulos, and S.B. Rao, Scheduling algorithms for input-queued switches: Randomized techniques and experimental evaluation, IEEE INFOCOM, 2. [5] P. Gupta and N. McKeown, Design and Implementation of a Fast Crossbar Scheduler, Hot Interconnect, Aug [6] R. Jain and K. Ramakrishnan, "Congestion Avoidance in Computer Networks with a Connectionless Network Layer, Part I: Concepts, Goals and Methodology," Proc. Computer Networking Symposium, 1988, pp [7] M. Karol, M. Hluchyj, and S. Morgan, Input versus Output Queueing on a Space-Division Packet Switch, IEEE Transactions on Communications, v.35, , [8] N. McKeown, The islip scheduling algorithm for input queued switches, IEEE ACM Transactions on Networking, vol.7, no.2, April [9] N. McKeown, V. Anantharam, J. Warland, Achieving 1% in an Input-Queued Switch, IEEE INFOCOM, 1996, [1] A. Mekkittikul and N. McKeown, A Practical Scheduling Algorithm to Achieve 1% in Input-Queued Switches, IEEE INFOCOM, 1998, [11] A. Mekkittikul and N. McKeown, A Starvation-free Algorithm for Achieving 1% in an Input Queued Switch, Proceedings of ICCCN, October [12] N. Ni and L.N. Bhuyan, Fair Scheduling and Buffer Management in Internet Routers, IEEE INFOCOM, 22. [13] L.L. Peterson and B.S. Davie. Computer Networks A System Approach. Morgan Kaufmann, San Francisco, CA, 2. [14] S. Sarkar, Optimum Scheduling and Memory Management in Input Queued Switches with Finite Buffer Space, IEEE INFOCOM, 23. [15] D. Stiliadis and A. Verma, Providing bandwidth guarantees in an input-buffered crossbar switch, IEEE INFOCOM, 1995.