PCI-DIO96H & PCI-DIO48H. DIGITAL INPUT/OUTPUT User s Manual

Transcription

1 PCIDIO96H & PCIDIO48H DIGITAL INPUT/OUTPUT User s Manual Revision February,

2 MEGAFIFO, the CIO prefix to data acquisition board model numbers, the PCM prefix to data acquisition board model numbers, PCMDAS8, PCMD4C, PCMDAC, PCMCOM4, PCMCOM485, PCMDMM, PCMDAS6D/, PCMDAS6S/, PCMDAS6D/6, PCMDAS6S/6, PCIDAS64/6, Universal Library, InstaCal, Harsh Environment Warranty and Measurement Computing Corp. are registered trademarks of Measurement Computing Corp. IBM, PC, and PC/AT are trademarks of International Business Machines Corp. Windows is a trademark of Microsoft Corp. All other trademarks are the property of their respective owners. Information furnished by Measurement Computing Corp. is believed to be accurate and reliable. However, no responsibility is assumed by Measurement Computing Corp. neither for its use; nor for any infringements of patents or other rights of third parties, which may result from its use. No license is granted by implication or otherwise under any patent or copyrights of Measurement Computing Corp. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form by any means, electronic, mechanical, by photocopying, recording or otherwise without the prior written permission of Measurement Computing Corp. Notice Measurement Computing Corp. does not authorize any Measurement Computing Corp. product for use in life support systems and/or devices without the written approval of the President of Measurement Computing Corp. Life support devices/systems are devices or systems which, a) are intended for surgical implantation into the body, or b) support or sustain life and whose failure to perform can be reasonably expected to result in injury. Measurement Computing Corp. products are not designed with the components required, and are not subject to the testing required to ensure a level of reliability suitable for the treatment and diagnosis of people. HM PCIDIOxxH.lwp

3 TABLE OF CONTENTS INTRODUCTION... INSTALLATION... I/O CONNECTIONS.... CABLES AND SCREW TERMINAL BOARDS.... CONNECTOR DIAGRAM.... SIGNAL CONNECTION CONSIDERATIONS PCIDIO96H CIOERB4 & SSRRACK4 daisy chain PCIDIO48H CIOERB4 & SSRRACK4 daisy chain SOFTWARE UNIVERSAL LIBRARY PACKAGED APPLICATION PROGRAMS REGISTER MAPS CONTROL & DATA REGISTERS GROUP CONFIGURATION & DATA EMULATION MODE CONFIGURATION GROUP CONFIGURATION & DATA GROUP CONFIGURATION & DATA PCIDIO96H Only GROUP CONFIGURATION & DATA PCIDIO96H Only SPECIFICATIONS PCIDIO96H PCIDIO48H ELECTRONICS AND INTERFACING PULL UP & PULL DOWN RESISTORS TTL TO SOLID STATE RELAYS VOLTAGE DIVIDERS...

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5 INTRODUCTION The PCIDIO96H and PCIDIO48H are highdrive digital I/O boards. The PCIDIO96H version has 96 bits organized into four 4bit groups. The PCIDIO48H version has 48 bits organized into two 4bit groups. Each group is further divided into an 8bit port A, an 8bit port B, and an 8bit port C that can be split into separate 4bit nibbles, port CHI and port CLO. See Figure below. The digital output drivers are 74S44 chips that can sink 64 ma and source 5 ma. The input buffers are 74LS7 chips and have standard high input impedance of the 74LS series devices. On power up and reset, all I/O bits are set to input mode. If you are using the board to control items that must be OFF on reset, install pulldown resistors. There are open locations on the board where users can install SIP resistor networks for either pullup or pulldown. Figure. PCIDIO96H & PCIDIO48H Block Diagram

6 INSTALLATION The PCIDIO96H and PCIDIO48H boards are completely plugandplay. There are no switches or jumpers on the board. All board addresses are set by your computer s plugandplay software. InstaCal is the installation, calibration and test software supplied with your data acquisition / IO hardware. Refer to the Extended Software Installation Manual to install InstaCal. If you need it, there is some online help in the InstaCal program. Owners of the Universal Library should read the manual and examine the example programs prior to attempting any programming tasks. I/O CONNECTIONS. CABLES AND SCREW TERMINAL BOARDS The PCIDIO96H board has a pin, highdensity RobinsonNugent male connector (Figure ). A CFF# cable is used to split the I/O lines into two, 5wire cables. One connector has pins to 5, the other has 5 to. The two I/O connectors can be connected directly to two CIOMINI5 or CIOSPADE5 screwterminal boards or one CIOTERM or SCB5 screwterminal board. See Figures for the board pin out and Figure for cable pinout. The PCIDIO48H board has a 5pin, highdensity male header connector (Figure ) accessible through the slot in the expansion bracket. A C5FF# cable is used to connected to a screwterminal boards such as the CIOMINI5, CIOTERM, CIOSPADE5 or SCB5. See Figure for pin out of both boards.

7 . CONNECTOR DIAGRAM The PCIDIO96H I/O connector has pins. The PCIDIO48H I/O connector has 5 pins. See Figure below for the board pinout Figure. PCIDIO48H and PCIDIO96H Connector Pin Outs Figure below, is a pin translation of the upper 5 pins of the board to the second 5pin leg of the CFF# cable.

8 DIO Group DIO Group Port A6 D Port A4 D 4 Port A D 6 Port A D 8 Port B6 D Port B4 D Port B D 4 Port B D Port C6 D 6 8 Port C4 D Port C D Port C D 4 Port A6 C 6 Port A4 C 8 Port A C Port A C Port B6 C 4 Port B4 C Port B C 6 8 Port B C 4 Port C6 C 4 Port C4 C 44 Port C C 46 Port C C 48 Ground 5 Port A7 D Port A5 D 5 Port A D 7 Port A D 9 Port B7 D Port B5 D Port B D 5 Port B D 7 Port C7 D 9 Port C5 D Port C D Port C D 5 Port A7 C 7 Port A5 C 9 Port A C Port A C Port B7 C 5 Port B5 C 7 Port B C 9 Port B C 4 4 Port C7 C Port C5 C 45 Port C C 47 Port C C 49 +5V DIO Group DIO Group nd of CFFXX 5Pin Connectors From board pins 5 to (st connector is pin to, etc., DIO Groups and ) 5 Port A7 D 5 Port A6 D 5 Port A5 D 54 Port A4 D 55 Port A D 56 Port A D 57 Port A D 58 Port A D 59 Port B7 D 6 Port B6 D 6 Port B5 D 6 Port B4 D 6 Port B D 64 Port B D 65 Port B D 66 Port B D 67 Port C7 D 68 Port C6 D 69 Port C5 D 7 Port C4 D 7 Port C D 7 Port C D 7 Port C D 74 Port C D 75 Port A7 C 76 Port A6 C 77 Port A5 C 78 Port A4 C 79 Port A C 8 Port A C 8 Port A C 8 Port A C 8 Port B7 C 84 Port B6 C 85 Port B5 C 86 Port B4 C 87 Port B C 88 Port B C 89 Port B C 9 Port B C 9 Port C7 C 9 Port C6 C 9 Port C5 C 94 Port C4 C 95 Port C C 96 Port C C 97 Port C C 98 Port C C 99 +5V GND Pins 5 of Pin Conn. Figure. PCIDIO96H Pin Translation Pins 5 to DI/O Signals 4

9 BOARD S PIN I/O CONNECTOR CFFxx CABLE I/O PINS TO 5 SIGNAL CONDITIONING or 5PIN SCREW TERMINAL BOARD. I/O PINS 5 TO SIGNAL CONDITIONING OR 5PIN SCREW TERMINAL BOARD Figure. Cable CFF# Configuration For PCIDIO96H. SIGNAL CONNECTION CONSIDERATIONS All the digital inputs on the PCIDIO96H AND PCIDIO48H are LSTTL. The output signals are buffered high output drive TTL. Measurement Computing Corp. offers a wide variety of digital signal conditioning products that provide an ideal interface between high voltage and/or high current signals and the PCIDIO96H or PCIDIO48H. If you need control or monitor nonttl level signals with your board, please refer to our catalog or our web site for the following products: CIOERB series, electromechanical relay output boards CIOSERB series, A electromechanical relay output boards SSRRACK series solid state relay I/O module racks A description of digital interfacing is found in the Interface Electronics section. IMPORTANT NOTE These boards emulate the 855 chip. The 855 emulation initializes all ports as inputs on power up and reset. A TTL input is a high impedance input. If you connect another TTL input device to the output, it could be turned ON or OFF every time the board is reset. To establish a consistent TTL level at powerup, use resistors tied to either +5V (pullup) or ground (pulldown). There are open locations for pullup and pulldown resistor packs on the board. To implement these, please refer to the application section. 5

10 .4 PCIDIO96H CIOERB4 & SSRRACK4 DAISY CHAIN As shown in figure, each side of the CFF# cable provides 48 bits. However, many popular relay and SSR boards provide only 4bits of I/O. The CIOERB4 and SSRRACK4 each implements a scheme where all 96 bits of the PCIDIO96H board can be used to control relays and/or SSRs. This configuration is shown in Figure. The 4bits of digital I/O on PCIDIO96H connector pins 4 (base address + through +) control the first relay board. The 4bits on pins 55 will control the second relay/ssr board on the daisy chain and so on, up to pins. PCIDIO96 CFFX Cable CIOERB4 or SSRRACK4 IN OUT IN CIOERB4 or SSRRACK4 OUT IN CIOERB4 or SSRRACK4 OUT IN CIOERB4 or SSRRACK4 OUT Figure. PCIDIO96H to CFF# to Relay Rack Daisy Chain Cabling.5 PCIDIO48H CIOERB4 & SSRRACK4 DAISY CHAIN PCIDIO48H board provides digital I/O in a group of 48 bits. However, the most popular relay and SSR boards provide only 4bits of I/O. The CIOERB4 and SSRRACK4 each implement a connector daisychain scheme where all 48 bits of the PCI DIO48H board can be used to monitor and control relays and/or SSRs. This configuration is shown in the block diagram below. The 4bits of digital I/O on PCIDIO48H connector pins 4 (base address + through +) control the first relay board. The 4bits of PCIDIO48H on pins 55 will control the second relay/ssr board on the daisy chain. 6

11 Figure 4. PCIDIO48H to CIOERB4 or SSRRACK4 Daisy Chain 7

12 4 SOFTWARE We highly recommend that users take advantage of our Universal Library package's easytouse programming interfaces. However, if you are an experienced programmer, and wish to read and write directly to the board, we have provided a detailed register map in the next chapter. 4. UNIVERSAL LIBRARY The Universal Library provides complete access to the PCIDIO96H and PCIDIO48H functions from a range of programming languages. If you are planning to write programs, or would like to run the example programs for Visual Basic or any other language, please turn now to the Universal Library manual. 4. PACKAGED APPLICATION PROGRAMS Most packaged application programs, such as SoftWIRE, DAS Wizard and HPVEE have drivers for the PCIDIO96H AND PCIDIO48H. If the package you own does not appear to have drivers for the board, please fax or the package name and the revision number from the install disks. We will research the package for you and advise you on how to use your boards with the available driver. Some application drivers are included with the Universal Library package, but not with the application package. If you have purchased an application package directly from the software vendor, you may need to purchase our Universal Library and drivers. Please contact us for more information. 8

13 5 REGISTER MAPS 5. CONTROL & DATA REGISTERS BADR is an 8bit data bus for reading, writing and control of the emulated 855 chips operating in mode. Refer to Table 5 for register offsets. Table 5. I/O Registers PCIDIO48H and PCIDIO96H REGISTER BADR + BADR + BADR + BADR + BADR + 4 BADR + 5 BADR + 6 BADR + 7 BADR + 8 BADR + 9 BADR + A BADR + B BADR + C BADR + D BADR + E BADR + F READ FUNCTION WRITE FUNCTION Group First Port A Data Group First Port A Data Group First Port B Data Group First Port B Data Group First Port C Data Group First Port C Data No Register Readback Group Configuration Register Group Second Port A Data Group Second Port A Data Group Second Port B Data Group Second Port B Data Group Second Port C Data Group Second Port C Data No Register Readback Group Configuration Register The following addresses are for PCIDIO96H only. Group Third Port A Data Group Third Port A Data Group Third Port B Data Group Third Port B Data Group Third Port C Data Group Third Port C Data No Register Readback Group Configuration Register Group Fourth Port A Data Group Fourth Port A Data Group Fourth Port B Data Group Fourth Port B Data Group Fourth Port C Data Group Fourth Port C Data No Register Readback Group Configuration Register The boards are designed to operate in Input / Output mode only (855 mode ). Strobed Input/Ouput (mode ) or BiDirectional Bus (mode ) are not supported. The following information describes mode operation. Upon powerup, the board is reset and defaults to the input mode. No further programming is needed to use the 4 lines as inputs. 9

14 5. GROUP CONFIGURATION & DATA GROUP FIRST PORT A DATA BADR + h READ/WRITE A7 A6 A5 A4 A A A A GROUP FIRST PORT B DATA BADR + h READ/WRITE B7 B6 B5 B4 B B B B GROUP FIRST PORT C DATA BADR + h READ/WRITE C7 C6 C5 4 C4 C C C C CH CH CH CH CL CL CL` CL GROUP CONFIGURATION BADR + h WRITE D4 D D D This register is used to configure the Group ports as either input or output. The following paragraphs and Table 5 describe configurations for mode EMULATION MODE CONFIGURATION. Output Ports In mode configuration, each port can be configured for output, holding the data written to them. For example, to set all three ports (A, B, and C) of Group to output mode, write the value h to BADR + (refer to Table 5 below). To read the current state of an output port s bits, simply read the address of that port.. Input Ports In mode configuration, ports can be configured as inputs, reading the state of the inputs lines. For example, to set all of the ports of Group to the input mode, write the value Bh to BADR +.

15 Table 5. DIO Port Configurations/Per Group Programming Codes D4 D D D Values Hex 8 9 A B 8 9 A B DIO Port Dec A B CU OUT OUT OUT OUT OUT OUT OUT IN OUT OUT IN OUT 8 OUT OUT IN 9 OUT OUT IN OUT IN IN OUT IN IN 6 IN OUT OUT 7 IN OUT OUT 8 IN IN OUT 9 IN IN OUT 4 IN OUT IN 5 IN OUT IN 6 IN IN IN 7 IN IN IN Note: CU is PORT C upper nibble; CL is PORT C lower nibble. CL OUT IN OUT IN OUT IN OUT IN OUT IN OUT IN OUT IN OUT IN 5.4 GROUP CONFIGURATION & DATA GROUP, SECOND PORT A DATA BADR + 4h READ/WRITE A7 A6 A5 A4 A A A A GROUP, SECOND PORT B DATA BADR + 5h READ/WRITE B7 B6 B5 B4 B B B B GROUP, SECOND PORT C DATA BADR + 6h READ/WRITE C7 C6 C5 C4 C C C C CH CH CH CH CL CL CL CL

16 GROUP CONFIGURATION BADR + 7h WRITE D4 D D D Refer back to Section 5. and Table 5 for information on this register. 5.5 GROUP CONFIGURATION & DATA PCIDIO96H ONLY GROUP, THIRD PORT A DATA BADR + 8h READ/WRITE A7 A6 A5 A4 A A A A GROUP, THIRD PORT B DATA BADR + 9h READ/WRITE B7 B6 B5 B4 B B B B GROUP, THIRD PORT C DATA BADR + Ah READ/WRITE C7 C6 C5 4 C4 C C C C CH CH CH CH CL CL CL CL GROUP CONFIGURE BADR + Bh WRITE D4 D D D Refer back to Section 5. and Table 5 for information on this register.

17 5.6 GROUP CONFIGURATION & DATA PCIDIO96H ONLY GROUP, FOURTH PORT A DATA BADR + Ch READ/WRITE A7 A6 A5 A4 A A A A GROUP, FOURTH PORT B DATA BADR + Dh READ/WRITE B7 B6 B5 B4 B B B B GROUP, FOURTH PORT C DATA BADR + Eh READ/WRITE C7 C6 C5 C4 C C C C CH CH CH CH CL CL CL CL GROUP CONFIGURE BADR + Fh WRITE D4 D D D Refer back to Section 5. and Table 5 for information on this register.

18 6 SPECIFICATIONS 6. PCIDIO96H Power consumption +5V Operating.A typical,.4a max Digital Input / Output Digital Type 855 emulation, Mode Output: 74S44 Input: 74LS7 Configuration 8 banks of 8, 8 banks of 4, programmable by bank as input or output Number of channels 96 I/O Output High.4 volts 5mA Output Low.5 volts 64 ma Input High. volts min, 7 volts absolute max Input Low.8 volts max,.5 volts absolute min Miscellaneous Powerup / reset state: Input mode (high impedance) Locations for user installation of pullup / pulldown resistors Environmental Operating temperature range to 5 C Storage temperature range to 7 C Humidity to 9% noncondensing 4

19 6. PCIDIO48H Power consumption Icc: All outputs driving logic low.a typical,.6a max Digital Input / Output Digital Type Output: Input: Configuration Number of channels Output High Output Low Input High Input Low Miscellaneous Dual 855 mode emulation 74S44 74LS7 4 banks of 8, 4 banks of 4, programmable by bank as input or output 48 I/O.4 volts 5mA.5 volts 64 ma. volts min, 7 volts absolute max.8 volts max,.5 volts absolute min Powerup / reset state: Input mode (high impedance) Locations for user installation of pullup / pulldown resistors Environmental Operating temperature range to 5 C Storage temperature range to 7 C Humidity to 9% noncondensing 5

20 7 ELECTRONICS AND INTERFACING This brief introduction to the electronics most often needed by digital I/O board users covers a few key concepts. IMPORTANT NOTE WHENEVER AN 855 (OR EMULATION) IS POWEREDON OR RESET, ALL PINS ARE SET TO HIGHIMPEDANCE INPUT. FOLLOWING STANDARD TTL FUNCTIONALITY, THESE INPUTS WILL TYPICALLY FLOAT HIGH, AND MAY HAVE ENOUGH DRIVE CURRENT TO TURN ON EXTERNAL DEVICES. The implications of this is that if you have output devices such as solid state relays, they may be switched on whenever the computer is powered on or reset. To prevent unwanted switching and to drive all outputs to a known state after power on or reset, pull all pins either high or low through a. K resistor. 7. PULL UP & PULL DOWN RESISTORS Whenever the board is powered on or reset, the control register is set to a known state. That state is all ports go to the input state. The nature of the input means it will typically float high. However, depending on the drive requirements of the device you are driving, they may float up or down. Which way they float is dependent on the characteristics of the circuit and the electrical environment; and may be unpredictable. This is why it often appears that the board outputs have gone 'high' after power up. The result is that the controlled device gets turned on. That is why you need pull up/down resistors. Shown in Figure 7 is a digital output with a pullup resistor attached. The pullup resistor provides a reference to +5V. The value of.k ohms requires only. ma of drive current. If the board is reset and enters high impedance input, the line is pulled high. At that point, both the board AND the device being controlled will sense a high signal. Figure 7. Pullup Resistor If the board is in output mode, the board has enough power to override the pullup/down resistor's high signal and drive the line to volts. 6

21 Of course, a pulldown resistor accomplishes the same task except that the line is pulled low when the board is reset. The board has enough power to drive the line high. The PCIDIO96H AND PCIDIO48H boards have positions for pullup/down resistors in Single Inline Packages (SIPs). On the PCIDIO96H, the positions are marked PORT#A, B and C (RN through RN), and are located adjacent to the I/O connectors. On the PCIDIO48H, the positions are marked RN6 through RN, and are located adjacent to the I/O connectors. These positions correlate to the port numbers according to the following chart. First Port A First Port B First Port C RN7 RN9 RN Second Port A Second Port B Second Port C RN6 RN8 RN NOTE There is limited space on the PCIDIO48H so you should use care when mounting SIPs on that board. To facilitate the installation of the cable after installing either pullup or pulldown resistors, the SIP resistor packages should be mounted at an angle (bend them over towards the connector). This note does not apply to the PCIDIO96H since there is ample room on that board for SIPs. A.K, 8resistor SIP is made of eight.k resistors all connected with one side to a single common point, the other side of each to a pin protruding from the SIP. The common line to which all resistors are connected also protrudes from the SIP. The common line is marked with a dot and is at one end of the SIP. The SIP may be installed as pullup or pulldown. At each RN# location, there are holes in a line. One end of the line is +5V, the other end is GND. They are marked HI and LO respectively. The eight holes in the middle are connected to the eight lines of a port. For a pullup function, mount the SIP with the common pin (marked with a dot or line) in the HI position. For a pulldown function, mount the SIP with the common pin in the LO position. A resistor value of.k is recommended. Use other values only if you have calculated the necessity of doing so. UNCONNECTED INPUTS FLOAT Keep in mind that unconnected inputs float (typically, but not reliably, high). If you are using a PCIDIO96H AND PCIDIO48H board for input, and have unconnected inputs, ignore the data from those lines. You do not have to tie input lines, and unconnected lines will not affect the performance of connected lines. Just make sure that you mask out any unconnected bits in software! 7

22 7. TTL TO SOLID STATE RELAYS Many applications require digital outputs to switch AC and DC voltage motors on and off, or to monitor AC and DC voltages. These AC and high DC voltages cannot be controlled or read directly by the TTL digital lines of a PCIDIO96H AND PCIDIO48H. Solid State Relays, such as those available from Measurement Computing Corp. allow control and monitoring of AC and high DC voltages and provide up to 4VAC isolation. Solid State Relays (SSRs) are the recommended method of interfacing to AC and high DC signals. The most convenient way to use solid state relays and a PCIDIO96H AND PCIDIO48H board is to use a Solid State Relay Rack. An SSR Rack is a circuit board with input buffer amplifiers that are powerful enough to switch the SSRs. The buffer amplifiers and SSRs are socketed. The standard buffer amplifiers are inverting types, meaning that a low input from a DIO 855 outputs a high to the SSR which turns it on ( closes the SSR output). If desired, noninverting amplifiers can be specified The outputs of the PCIDIO96H AND PCIDIO48H are sufficient to drive SSRs directly. If desired, you can drive DROAC OR DRODC modules that are mounted on DIN rails. 7. VOLTAGE DIVIDERS If you wish to measure a signal that varies over a range greater than the input range of a digital input, use a voltage divider to drop the voltage of the input signal to the level the digital input can measure. Ohm's law states: Signal High V Voltage = Current * Resistance Thus, any variation in the voltage drop for the circuit as a whole will have a proportional variation in all the voltage drops in the circuit. In a voltage divider, the voltage across one of the resistors in a circuit is proportional to the voltage across the total resistance in the circuit (Figure 7). Signal Volts Vin Signal Ground Low SIMPLE VOLTAGE DIVIDER Vin = R+R Vo t R R R V Vout Board Input Figure 7. Voltage Divider When designing a voltage divider, choose two resistors with the proper proportions relative to the full scale of the digital input and the maximum signal voltage. 8

23 The formula for voltage attenuation is: Attenuation = R+R R The variable Attenuation is the proportional difference between the signal voltage max and the full scale of the analog input. = K+K K For example, if the signal varies between and volts, and you wish to measure that with a PCIDIO96H board with a full scale range of to 5 volts, the Attenuation is :, or just. R=(A)*R For a given attenuation, pick a handy resistor and call it R, then use this formula to calculate R. Digital inputs can readily use voltage dividers. For example, if you wish to measure a digital signal that is at volts when off and 4 volts when on, you cannot connect that directly to the PCIDIO96H AND PCIDIO48H digital inputs. The voltage must be dropped to 5 volts max when on. The Attenuation is 4:5 or 4.8. Use the equation above to find an appropriate R if R is K. Remember that a TTL input is 'on' when the input voltage is greater than.5 volts. IMPORTANT NOTE The resistors R and R dissipate power in the divider circuit according to the equation Current (I) = Voltage / Resistance and Power (W) = I x R. The higher the value of the resistance (R + R) the less power dissipated by the divider circuit. Here is a couple rules: For attenuation of 5: or less, no resistor should be < K. For attenuation of greater than 5:, no resistor should be < K. 9

24 For your notes

25 For your notes

26 For your notes

27 EC Declaration of Conformity We, Measurement Computing Corporation, declare under sole responsibility that the product: PCIDIO96H PCIDIO48H Part Number 96Bit Digital I/O Board 48Bit Digital I/O Board Description to which this declaration relates, meets the essential requirements, is in conformity with, and CE marking has been applied according to the relevant EC Directives listed below using the relevant section of the following EC standards and other normative documents: EU EMC Directive 89/6/EEC: Essential requirements relating to electromagnetic compatibility. EU 55 Class B: Limits and methods of measurements of radio interference characteristics of information technology equipment. EN 58: EC generic immunity requirements. IEC 8: Electrostatic discharge requirements for industrial process measurement and control equipment. IEC 8: Radiated electromagnetic field requirements for industrial process measurements and control equipment. IEC 84: Electrically fast transients for industrial process measurement and control equipment. Carl Haapaoja, Director of Quality Assurance

28 Measurement Computing Corporation 6 Commerce Blvd., Middleboro, MA 46 (58) 9465 Fax: (58) info@measurementcomputing.com www. measurementcomputing.com