A Joint Standard of AASHTO, ITE, and NEMA. ATC 5301 v Advanced Transportation Controller (ATC) Cabinet Standard Version 02.

Transcription

1 A Joint Standard of AASHTO, ITE, and NEMA Advanced Transportation Controller (ATC) Cabinet Standard Version 02 March 12, 2019 Published by American Association of State Highway and Transportation Officials (AASHTO) 444 North Capitol St., NW, Suite 249 Washington, DC Institute of Transportation Engineers (ITE) 1627 I (Eye) Street, NW, Suite 600 Washington, DC National Electrical Manufacturers Association (NEMA) 1300 North 17th Street, Suite 1752 Rosslyn, VA Copyright 2018 AASHTO/ITE/NEMA. All rights reserved.

2 NOTICE Joint NEMA, AASHTO and ITE Copyright and Intelligent Transportation Systems (ITS) Working Group These materials are delivered "AS IS" without any warranties as to their use or performance. NEMA, AASHTO, ITE AND THEIR SUPPLIERS DO NOT WARRANT THE PERFORMANCE OR RESULTS YOU MAY OBTAIN BY USING THESE MATERIALS. NEMA, AASHTO, ITE AND THEIR SUPPLIERS MAKE NO WARRANTIES, EXPRESSED OR IMPLIED, AS TO NON-INFRINGEMENT OF THIRD PARTY RIGHTS, MERCHANTABILITY, OR FITNESS FOR ANY PARTICULAR PURPOSE. IN NO EVENT WILL NEMA, AASHTO, ITE OR THEIR SUPPLIERS BE LIABLE TO YOU OR ANY THIRD PARTY FOR ANY CLAIM OR FOR ANY CONSEQUENTIAL, INCIDENTAL, OR SPECIAL DAMAGES, INCLUDING ANY LOST PROFITS OR LOST SAVINGS ARISING FROM YOUR REPRODUCTION OR USE OF THESE MATERIALS, EVEN IF A NEMA, AASHTO, OR ITE REPRESENTATIVE HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Some states or jurisdictions do not allow the exclusion or limitation of incidental, consequential, or special damages, or exclusion of implied warranties, so the above limitations may not apply to you. Use of these materials does not constitute an endorsement or affiliation by or between NEMA, AASHTO, or ITE, and you, your company, or your products and services. If you are not willing to accept the foregoing restrictions, you should immediately return these materials. ATC is a trademark of NEMA, AASHTO, and ITE. ATC5301v0202_

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4 CONTENTS Page 1 PURPOSE OF THE DOCUMENT SCOPE OF PROJECT Organization and Development Process User Needs Project Timeline REFERENCED DOCUMENTS CONVENTIONS USED IN THIS DOCUMENT HIGH LEVEL BLOCK DIAGRAM ATCC Versions Traceability COMPONENTS Model 2218 Serial Interface Unit (SIU) General Model 2218 Functions Watchdog Power Up Initialization Input Functions Output Functions Model 2218 Operational Functions Power Requirements Communications Ports Model 2218 Mechanical Details Model 2202 High Density Switch Pack / Flasher Unit (HDSP/FU) General HDSP/FU Functions Input Signals Output Signals Power Requirements Front Panel Indicators HDSP/FU Connector HDSP/FU Mechanical Model 2212 Cabinet Monitor Unit General Failed State Action (FSA) Unit Reset Exit From Failed State Action Monitor Functions Input Signals Control Signal Inputs Power and Circuit Requirements Failed State Output Circuit ATC5301v0202_ Page i

5 Front Panel Indicators Mechanical Serial Bus #3 Terminations Terminal Port Serial Memory Key Serial Memory Key Application Specific Buffer CMU Connector Cabinet Power Supply Requirements, High Voltage Versions General AC Line Input Input Inrush Current Outputs DC Output Ripple DC Start-up Time DC Hold-up Time DC Output Connector Indicators Mechanical Model 2216 Cabinet Power Supply Model 2217 Cabinet Power Supply Model 2248 Cabinet Power Supply Model 2220 Auxiliary Display Unit General Mechanical Power Front Panel Indicators Front Panel Controls Sensor Unit General Form Factor Connector and Pin Assignments SLOTS Serial Interface Unit Slot General Form Factor Connector and Pin Assignments Cabinet Monitor Unit Slot General Form Factor Connector and Pin Assignments IN Slot General Form Factor Connector and Pin Assignments OUT Slot General ATC5301v0202_ Page ii

6 7.4.2 Form Factor Connector and Pin Assignments INTERFACES SIU IN Interface General Form Factor Input SIU 1 Pin Assignments SIU OUT Interface General Form Factor Connector Pin Assignments SB#1 / SB#2 Interface General Connector Pin Assignment Electrical SB#3 Interface General SB#3 Terminations SB#3 Electrical Form Factor Connector Pin Assignments CC Interface General Form Factor Connector Pin Assignments CDC Interface General Output Termination Functionality General Functional Characteristics Field Wire Sense Form Factor Field Wire Interface PROTOCOLS SB#1 Communications Protocol Electrical Data Link Layer Procedures Message Timing SB#1 Frame Types SIU2218 SB#1 Frame Types CMU2212 SB#1 Frame Types SB#2 Communications Protocol General Data Link Layer Communication Frames ATC5301v0202_ Page iii

7 9.3 SB#3 Communications Protocol General Serial Bus Terminations Electrical Data Link Layer Procedures Message Timing SB#3 Information Field Formats HDSP/FU SB#3 Frame Types Model 2220 SB#3 Frame Types PRODUCT SAFETY AND RELIABILITY Mercury Shock Hazard Arc Flash Flashing Operation During Service and Replacement Mean Time Between Failure (MTBF) Derating ENVIRONMENTAL AND TESTING REQUIREMENTS General Inspection Testing Certification Definitions of Design Acceptance Testing (DAT) and Production Testing Environmental and Operating Requirements Voltage and Frequency Transients, Power Service (DAT) Nondestructive Transient Immunity (DAT) Temperature and Humidity Test Facilities Test Procedures: Transients, Temperature, Voltage, and Humidity Vibration Test (DAT) Shock (Impact) Test (DAT) Electronic Emissions Electrostatic Discharge WIRE REQUIREMENTS Capacity ratings Conductors Splicing Cables ACRONYMS NEEDS TO REQUIREMENTS TO DESIGN TRACEABILITY NON FUNCTIONAL REQUIREMENTS ATCC POWER SIGNAL NAMING CONVENTIONS ATC5301v0202_ Page iv

8 FIGURES Page Figure 1: ITS Cabinet V2 Major Milestones ( 3 Figure 2: High Level Functional Block Diagram, High Voltage Version... 6 Figure 3: High Level Design Functional Block Diagram, Low Voltage Version... 7 Figure 4: SIU Parallel Inputs and Outputs... 9 Figure 5: Serial Sensors Figure 6: Model 2218 Mechanical Dimensions Figure 7: 2202 HDSP/FU Mechanical Dimensions Figure 8: CMU Mechanical Dimensions Figure 9: Model 2217 Mechanical Dimensions Figure 10: Model 2218 Slot Mechanical Details Figure 11: CMU Slot Mechanical Details Figure 12: IN Slot Mechanical Details Figure 13: OUT Slot Mechanical Details Figure 14: SB#1/SB#2 Communications Interface Form Factor Figure 15: SB#1 / SB#2 Terminator Unit Figure 16: SB#3 Communications Interface Form Factor Figure 17: SB#3 Communications Cable Form Factor Figure 18: CC Interface Form Factor Figure 19: CC Interface Connection Diagram Figure 20: CDC Interface Form Factor Figure 21: Termination Interface for 2 Switch Pack Channels Figure 22: Test Profile Figure 23: Naming Conventions: ATCC HV & LV Versions Figure 24: Naming Conventions: ATCC HV Version Figure 25: Naming Conventions: ATCC LV Version Figure 26: Naming Conventions: ATCC Hybrid LV Version, Option #1, Page Figure 27: Naming Conventions: ATCC Hybrid LV Version, Option #1, Page Figure 28: Naming Conventions: ATCC Hybrid LV Version, Option # TABLES Page Table 1: Address Select Inputs Table 2: Rack Address Frequency Table 3: Input Transition Entry Table 4: Millisecond Counter Rollover Entry Table 5: Output Bit Translation Table 6: Model 2218 EIA-694 Port Table 7: Model 2218 Connector Assignments Table 8: 2202 HDSP Slot Address Table 9: 2202 HDFU Slot Address Table 10: HDSP Mode Connector Pin Assignments ATC5301v0202_ Page v

9 Table 11: HDFU Mode Connector Pin Assignments Table 12: CMU Address Inputs Table 13 CMU Serial Memory Key Data Table 14: CMU Connector Pin Assignments Table 15: Power Supply DC Output Connector Table 16: Model 2217 Power Supply Connector Table 17: Power Supply DC Output Connector Table 18: ADU Power Connector Signals Table 19: ADU SB#3 Signals Table 20: INPUT SIU 1 to IN SLOT Signal Mapping Table 21: First Output SIU Opto Assignments Table 22: Output SIU 1 to OUT SLOT Signal Mapping Table 23: SB#1 / SB#2 Connector Pin Assignment Table 24: SB#3 Connector Pin Assignment Table 25: CC Connector Pin Assignments Table 26: Definitions of Terms relating to switches in the Police Panel Table 27: CDC Connector Pin Assignments Table 28: SB#1 Frame Types Table 29: Module Identification Command Table 30: Module Identification Response Table 31: Type 66 Command Table 32: Module Description Command Table 33: Module Description Response Table 34: Request Module Status Command Table 35: Request Module Status Response Table 36: Millisecond Counter Management Command Table 37: Millisecond Counter Management Response Table 38: Configure Inputs Command Table 39: Configure Inputs Response Table 40: Poll Raw Input Data Table 41: Poll Raw Data Response Table 42: Poll Filtered Data Command Table 43: Poll Filtered Data Response Table 44: Poll Input Transition Buffer Command Table 45: Poll Input Transition Buffer Response Table 46: Set Outputs Command Table 47: Set Outputs Response Table 48: Configure Input Tracking Function Command Table 49: Configure Input Tracking Function Response Table 50: Configure Complex Outputs Table 51: Configure Complex Output Functions Response Table 52 Type 62 Command Table 53: Type 190 Response Table 54: CMU Type 67 Command Table 55: CMU Type 195 Response Table 56: Serial Bus #1 Type 80 Command ATC5301v0202_ Page vi

10 Table 57: Serial Bus #1 Type 208 Response Table 58: Serial Bus #1 Type 81 Command Table 59: Serial Bus #1 Type 81 Response Table 60: CMU Type 82 Command Table 61: CMU Type 210 Response Table 62: Serial Bus #1 Type 83 Command Table 63: Serial Bus #1 Type 211 Response Table 64: SB#3 Frame Types Table 65: SB#3 Type 01 Command Table 66: SB#3 Type 129 Response Table 67: SB#3 Type 02 Command Table 68: SB#3 Type 130 Response Table 69: SB#3 Type 60 Command Table 70: SB#3 Type 188 Response Table 71: SB#3 Type 128 Response Table 72: ADU Type 70 Command Table 73: ADU Type 198 Response Table 74: ADU Type 71 Command Table 75: ADU Type 199 Response Table 76: Ambient Temperature versus Relative Humidity At Barometric Pressures Table 77: Ampacity Table 78: ATCC Cabinet V2 Attribute Ranking ATC5301v0202_ Page vii

11 1 PURPOSE OF THE DOCUMENT This document is a Standard for the Intelligent Transportation System (ITS) Cabinet Version 2 (v2) project under the United States Department of Transportation (USDOT) Work Order T (ITS Cabinet v2 Maintenance) for development of the ATC 5301 Advanced Transportation Controller Cabinet (ATCC) standard. The Standard is based on the Concept of Operations (ConOps) adapted from Section of the "Systems Engineering Guidebook for ITS" (see Section 3 Referenced Documents) with system requirements derived from the user needs identified in the ConOps as a step in the process to create the ATC 5301 ATCC standard. ConOps development began with User Needs presented by the following End Users at the 2008 Workshop in Austin TX: Caltrans City of Houston TX Georgia DOT Harris County TX Kentucky DOT Los Angeles DOT Minnesota DOT New York City DOT San Francisco MTA This workshop identified significant additions to User Needs since V1 was published, including the following: USDOE ban on the sale of incandescent bulbs used in traffic signal heads EPA mercury waste regulations affecting high-capacity mercury relays State legislation to eliminate shock hazard inside electrical cabinets State legislation to eliminate shock hazard of field wires State legislation to eliminate arc flash hazard under NFPA 70E Need to replace internal components while in flash for motorist safety Low power features to facilitate alternate power sources such as solar panels This Standard provides the detailed description of the elements, interfaces, and communications protocols of the ATC 5301 Advanced Transportation Controller Cabinet standard, traceable to the Standards Requirements Specification for the following: a) The USDOT Joint Program Office (JPO) who is sponsoring the work b) The Standard Development Organizations (SDOs) overseeing the development c) The consultants, manufacturers, and public transportation professionals who participate in the committees and working groups (WGs) 2 SCOPE OF PROJECT 2.1 Organization and Development Process The ITS Cabinet V2 project is sponsored by the USDOT JPO as part of an ITS Standards Development Program. The project is performed under the direction of the Advanced Transportation Controller (ATC) Joint Committee (JC). The ATC JC is made up of representatives from three SDOs: the American Association of State Highway and ATC5301v0202_ Page 1

12 Transportation Officials (AASHTO), the Institute of Transportation Engineers (ITE) and the National Electrical Manufacturers Association (NEMA). The development is carried out by the ITS Cabinet WG, a technical subcommittee of the ATC JC, and a paid consultant team. The ITS Cabinet Standard Version b (also known as Version 1 or V1, (see RD[1]) was published in It defined a transportation field cabinet system (TFCS) that was highly modular and expandable but the standard was missing formalized user needs and requirements that come from the rigor of a Systems Engineering Process (SEP). The objectives of the ITS Cabinet V2 project are as follows: 1) Develop ATC 5301 Advanced Transportation Controller Cabinet standard by assessing issues and integrating lessons learned from current deployments of the ITS Cabinet Standard V1 into a Concept of Operation, Requirements, and Design. User needs to be considered, but are not limited to the following: low-power features, items referred to as "B-List" items by the ITS Cabinet WG, and mercury relay replacement. These items along with all others solicited were introduced into the Systems Engineering Process (see objective #2) that examines their relevancy. 2) Use a systems engineering process to ensure the completeness and correctness of ATC 5301 Advanced Transportation Controller Cabinet standard and associated documents. The standard must be traceable and logically consistent. 3) Develop a detailed conformance statement that addresses backwards compatibility and provides clear and unambiguous instruction on how to extend the standard. 2.2 User Needs ITS Standard Specification for Roadside Cabinets v b (known as V1) was published on 9/26/2006 after successful ballot by AASHTO, ITE, and NEMA. Adopted standards are either reaffirmed or revisited after five years. In this case, V1 was revisited due to significant additions to User Needs including the following: USDOE ban on the sale of incandescent bulbs EPA mercury waste regulations State legislation to eliminate shock hazard inside electrical cabinets State legislation to eliminate shock hazard of field wires State legislation to eliminate arc flash hazard under NFPA 70E Need to replace internal subassemblies while in flash for worker safety Low power features to facilitate alternate power sources such as solar 2.3 Project Timeline Beginning in 2007, a Systems Engineering Process (SEP) is underway to develop the ITS Cabinet Version 2 standard (known as V2) from the User Needs workshop of ITS owner/operators held in Austin TX. Prior effort resulted in the completion of User Needs, ATC5301v0202_ Page 2

13 Concept of Operations, Requirements and High Level Design before the project was suspended at ID 50 (Develop Design Content) of the Project Management Plan (PMP). In September 2015, the project was restarted to complete the remaining tasks of the original PMP, but with updated milestone dates. The ITS cabinet working group, operating under the direction of the ATC Joint Committee, held working group meetings and teleconferences to complete this work. Siemens Industry, Inc. has been retained under contract to ITE to provide consultant services to the working group for preparation of the V2 standard. This remaining effort picked up the prior work completed by ConSysTec (Bruce Eisenhart), Pillar Consulting (Ralph Boaz), and Adaptive Solutions, Inc. (James Kinnard) at Develop Design Content (ID 51) of the PMP, through the completion of the V2 standard. While the project was suspended, volunteer efforts by several manufacturers have resulted in the availability of Commercial Off-The-Shelf (COTS) subassemblies that were considered in the remaining standards development and adopted when found to meet the project Requirements traceable to the original User Needs. Multiple but differing COTS subassemblies were evaluated using a prior survey of ITS Owner/Operator Non-Functional Requirement (NFR) rankings, such as Reliability, Operational Safety, Modularity, etc.; these were included as Section 15 and Table 78. COTS subassemblies with higher NFR rankings were adopted over similar but differing COTS subassemblies. Figure 1: ITS Cabinet V2 Major Milestones ) ATC5301v0202_ Page 3

14 The project timeline and major milestones are depicted in Figure 1: 2007: Working Group (WG) is formed including public agency end users and private sector manufacturers. The User Needs Workshop was conducted in Austin TX with presentations by end user Owner / Operators of signal control equipment and software. 2008: Concept of Operation (ConOps) is developed to fulfill the User Needs. ConOps Workshop is conducted in Salt Lake City UT with end user Owner / Operators. Feedback from that workshop results in an updated ConOps document posted on the ITE website. 2009: WG is developed Requirement based on User Needs and ConOps. After WG review, the Requirements document is posted on the ITE website. 2010: WG conducts a week-long High Level Design workshop in Houston TX. A survey of end user, owner/operators is conducted to rank the importance of Non-Functional Requirements, such as product safety, cost, serviceability, and others. 2011: Project funding ends but volunteer effort continued to update the Requirements document. 2012: Volunteer effort continues to develop and test key missing subsystems, such as low voltage, high density switch packs. 2013: Volunteer effort continues to include field test of prototypes, such as field test of working systems operating off-grid on alternative power sources. 2014: First article manufacturing of commercially-available equipment by three private sector WG members is completed. 2015: Funding is available to resume the standards development process. The High Level design is captured in High Level block diagrams that identify subassemblies and interfaces that are controlled by the standard versus those that are controlled by end user and manufacturer specifications. 2016: Instead of the normal workflow to build prototypes based on the Requirements, the WG verified each requirement to the existing equipment developed voluntarily by three manufacturers. Conflicting designs were resolved by standardizing the design elements best meeting the Non-Functional requirements, or by identifying design elements that should differ to meet differing local needs. Requirements management process enforces a Requirements update with approval of WG members. The Needs to Requirement Traceability Workbook is approved by WG, included as Section : User Comment Draft is created and reviewed by the wider transportation sector, resulting in disposition of 1,032 comments while tracing the design elements back to the Needs and Requirements. The User Comment Draft is updated to become the Recommended Standard document. 2018: The Needs to Requirements Traceability Workbook of Section 14 was updated to include traceability to Related Design Elements. The Recommended Standard is sent to the Joint Committee for ballot by AASHTO, ITE, and NEMA. 3 REFERENCED DOCUMENTS [1] ATC 5201 v06.25, ATC JC, 12 January Available from Institute of Transportation Engineers [2] Cabinets, Racks, Panels and Associated Equipment, EIA-310, Electronic Industries Alliance [3] Systems Engineering for Intelligent Transportation Systems, January 2007, available from FHWA [4] Transportation Electrical Equipment Specification, Caltrans, dated 2009 [5] NEMA Standards Publication TS v03.07 Traffic Controller Assemblies with NTCIP Requirements. Available from the National Electrical Manufacturers Association. ATC5301v0202_ Page 4

15 4 CONVENTIONS USED IN THIS DOCUMENT RD [nn] indicates Reference Document number nn of REFERENCED DOCUMENTS above Rectangular symbol indicates a physical cabinet element Oval symbol indicates an interface used to connect physical cabinet elements Hatched symbol with dashed border indicates standard does not control mechanical dimensions Solid symbol with solid border indicates standard controls the mechanical dimensions for plug-in interchangeability Electrical signals, signal names, and signal functions are controlled by the standard in all cases Solid connecting line indicates the standard controls the connector and pin assignments for plug-in interchangeability Dashed connecting line indicates the standard does not control the connector type and pin assignments. The signals are electrically identical among manufacturers, but may require an adapter cable for interchangeability among manufacturers. 5 HIGH LEVEL BLOCK DIAGRAM 5.1 ATCC Versions The ATCC standard defines the following two versions: High Voltage (HV) version fulfills the need for operation on traditional 120 VAC service voltage to control 120 VAC low power (non-incandescent) signal heads Low Voltage (LV) version fulfills the need for operation on 48 VDC alternate power sources, such as battery and solar, to control low voltage DC signal heads. The ATCC standard reserves attributes for future version: Very High Voltage (VHV) version fulfills the need for operation on 240 VAC service voltages to control 240 VAC low power (non-incandescent) signal heads, typically used outside of the USA and Canada Refer to Figure 2: High Level Functional Block Diagram, High Voltage Version and to Figure 3: High Level Design Functional Block Diagram, Low Voltage. Signal naming conventions shall conform to Section Traceability To support traceability from High Level Design to this document, each of the elements and interfaces shown in the Block Diagrams is described in a corresponding section of this standard below. ATC5301v0202_ Page 5

16 CABINET TO CU C12S TYPICAL INPUT FUNCTIONALITY (NOTE 1) SIU IN. SIU IN SB1/SB2 SIU IN SLOT 1 (NOTE 2) IN SLOT 2 (NOTE 2) IN SLOT 3 (NOTE 2) IN SLOT 4 (NOTE 2) IN SLOT 5 (NOTE 2) IN SLOT 6 (NOTE 2) SIU SENSOR 1 SENSOR 2 SENSOR 3 SENSOR 4 SENSOR 5 SENSOR 6 SENSOR 7 SENSOR 8 SENSOR 9 SENSOR 10 SENSOR 11 SENSOR 12 IN SLOT 7 (NOTE 2) IN SLOT 8 (NOTE 2) IN SLOT 9 (NOTE 2) IN SLOT 10 (NOTE 2) IN SLOT 11 (NOTE 2) IN SLOT 12 (NOTE 2) ASSY PWR CDC1 INPUT 1-4 INPUT 5-8 INPUT 9-12 INPUT INPUT INPUT CDC2 INPUT INPUT INPUT INPUT INPUT INPUT CDC (NOTE 3) CDC SB1 / SB2 CDC1 INPUT 1-4 INPUT 5-8 INPUT 9-12 INPUT INPUT INPUT CDC2 INPUT INPUT INPUT INPUT INPUT INPUT FIELD IN 24 CHANNEL DETECTOR TERMINATION FUNCTIONALITY (NOTE 1) 24 CHANNEL DETECTOR TERMINATION FUNCTIONALITY (NOTE 1) CC SB1/SB2 SIU SB3 SB3 TYPICAL OUTPUT FUNCTIONALITY (NOTE 1) SIU OUT OUT SLOT 1 DUAL HV LOAD SW 1 OUT SLOT 2 DUAL HV LOAD SW 2 OUT SLOT 3 OUT SLOT 4 OUT SLOT 5 OUT SLOT 6 DUAL HV LOAD SW 3 CH 1-2 CH 3-4 CH 5-6 CH 7-8 CH VDC (OPTIONAL) & 24 VDC (MANDATORY) & 12 VDC (OPTIONAL) DUAL HV LOAD SW 4 DUAL HV LOAD SW 5 DUAL HV LOAD SW 6 CH OUT SLOT 7 OUT SLOT 8 DUAL HV LOAD SW 7 DUAL HV LOAD SW 8 CH CH ASSY PWR CC SIGNAL PWR SENSE IN & SIGNAL OUT 0 FAN T THERMOSTAT CC POLICE PANEL SERVICE FUNCTIONALITY (NOTE 1) UTILITY TERMINAL BLOCKS MAIN BREAKERS GFCI BREAKERS TRANSIENT SUPPRESSOR / FILTER GFCI RECEPTICLE L N G SERVICE ENTRY 120 VAC OUT CC DOOR SWITCH ADU SB3 SB1 CC TO ADDITIONAL INPUT, OUTPUT OR INPUT/OUTPUT ASSEMBLIES SB3 CMU #1 OF 4 SB3 UP TO 32 OUTPUT CHANNELS PER CMU CH 1-2 CH 3-4 CH 5-6 CH 7-8 CH 9-10 CH TYPICAL OUTPUT TERMINATION FUNCTIONALITY (NOTE 1) CH CH FTR 1 FTR 2 FTR 3 FTR 4 FTR 5 FTR 6 FTR 7 FTR 8 FP1 FP2 FP3 FP4 FP5 FP6 FP7 FP8 FP9 FP10 FP11 FP12 FP13 FP14 FP15 FP16 SIGNAL PWR FLASH IN 120 VAC ASSY PWR SIGNAL PWR POWER FUNCTIONALITY (NOTE 1) DUAL HV FLASHER FLASH OUT 120 VAC IN CLEAN AC RECEPTICLE FACILITIES NOTES: 1. FUNCTIONAL ELEMENTS SHALL FIT WITHIN 19 EIA-310 DIMENSIONS. PACKAGING NOT CONTROLLED BY STANDARD 2. INPUTS SHALL BE CONTROLLED BY THE STANDARD AS FOLLOWS: Rev LEGEND - INPUT DEVICES SHALL MECHANICALLY CONFORM TO NEMA TS 2 Sec (see Figure 6-5) SYMBOL ELECTRICAL MECHANICAL - CONNECTOR TYPE SHALL CONFORM TO NEMA TS 2 PARAGRAPH CONNECTOR PIN ASSIGNMENT SHALL CONFORM TO NEMA TS 2 TABLE INTERFACE STANDARD NOT CONTROLLED BY THIS STANDARD - MAPPING OF SIGNALS FROM INPUT CONNECTORS TO SIU SHALL BE FIXED BY THE STANDARD ALTERNATE MAPPING FROM INPUT CONNECTORS TO SIU SHALL BE ACCOMPLISED BY SOFTWARE INTERFACE STANDARD STANDARD - TYPICAL COMPATIBLE INPUT DEVICES INCLUDE: NEMA 4-CHANNEL INDUCTIVE LOOP DETECTORS WITH (4) OUTPUT AND (4) STATUS WITHOUT INBUS FUNCTION STANDARD NOT CONTROLLED BY THIS STANDARD - CALTRANS 222 (2) CHANNEL DETECTORS WITHOUT STATUS AND 224 (4) CHANNEL DETECTORS WITHOUT STATUS ASSEMBLY STANDARD STANDARD - INDUCTIVE LOOP DETECTORS WITHOUT STATUS - ISOLATORS - PREEMPTORS 3. CDC CABLE & CONNECTORS ARE OPTIONAL, BUT CONTROLLED BY STANDARD IF SUPPLIED Figure 2: High Level Functional Block Diagram, High Voltage Version ATC5301v0202_ Page 6

17 TO CU C12S SB1/SB2 CABINET TYPICAL INPUT FUNCTIONALITY (NOTE 1) 48 8 SIU IN. DDM SIU IN. 8 DDM INPUT 1 INPUT 2 INPUT DDM INPUT 4 INPUT 5 INPUT 6 INPUT 7 INPUT 8 INPUT 9 INPUT 10 INPUT 11 INPUT 12 SIU (NOTE 2) (NOTE 2) (NOTE 2) (NOTE 2) (NOTE 2) (NOTE 2) SIU (NOTE 2) (NOTE 2) (NOTE 2) (NOTE 2) (NOTE 2) (NOTE 2) SENSOR 1 SENSOR 2 SENSOR 3 SENSOR 4 SENSOR 5 SENSOR 6 SENSOR 7 SENSOR 8 SENSOR 9 SENSOR 10 SENSOR 11 SENSOR 12 ASSY PWR CDC1 INPUT 1-4 INPUT 5-8 INPUT 9-12 INPUT INPUT INPUT CDC2 IPNUT INPUT INPUT INPUT INPUT INPUT CDC (NOTE 3) CDC SB1 / SB2 CDC1 INPUT 1-4 INPUT 5-8 INPUT 9-12 INPUT INPUT INPUT CDC2 INPUT INPUT INPUT INPUT INPUT INPUT FIELD IN 24 CHANNEL DETECTOR TERMINATION FUNCTIONALITY (NOTE 1) 24 CHANNEL DETECTOR TERMINATION FUNCTIONALITY (NOTE 1) 48 VDC (OPTIONAL) & 24 VDC (MANDATORY) & 12 VDC (OPTIONAL) FAN CC SB1/SB2 SIU SB3 SB3 TYPICAL OUTPUT FUNCTIONALITY (NOTE 1) SIU OUT OUTPUT 1 OUTPUT 2 OUTPUT 3 OUTPUT 4 OUTPUT 5 OUTPUT 6 DUAL LV LOAD SW 1 DUAL LV LOAD SW 2 DUAL LV LOAD SW 3 DUAL LV LOAD SW 4 DUAL LV LOAD SW 5 CH 1-2 CH 3-4 CH 5-6 CH 7-8 CH 9-10 DUAL LV LOAD SW 6 CH OUTPUT 7 OUTPUT 8 DUAL LV LOAD SW 7 DUAL LV LOAD SW 8 CH CH ASSY PWR CC SIGNAL PWR SENSE IN & SIGNAL OUT 0 T THERMOSTAT CC POLICE PANEL SERVICE FUNCTIONALITY (NOTE 1) UTILITY TERMINAL BLOCKS MAIN BREAKERS TRANSIENT SUPPRESSOR / FILTER 48V 0V G L N G SERVICE ENTRY OPTIONS 48 VDC OUT CC DOOR SWITCH ADU SB3 SB1 CC TO ADDITIONAL INPUT, OUTPUT OR INPUT/OUTPUT ASSEMBLIES SB3 CMU #1 OF 4 SB3 UP TO 32 OUTPUT CHANNELS PER CMU CH 1-2 CH 3-4 CH 5-6 CH 7-8 CH 9-10 CH TYPICAL OUTPUT TERMINATION FUNCTIONALITY (NOTE 1) CH CH FTR 1 FTR 2 FTR 3 FTR 4 FTR 5 FTR 6 FTR 7 FTR 8 FP1 FP2 FP3 FP4 FP5 FP6 FP7 FP8 FP9 FP10 FP11 FP12 FP13 FP14 FP15 FP16 SIGNAL PWR FLASH IN 48 VDC ASSY PWR SIGNAL PWR POWER FUNCTIONALITY (NOTE 1) DUAL LV FLASHER FLASH OUT 48 VDC IN FACILITIES NOTES: 1. FUNCTIONAL ELEMENTS SHALL FIT WITHIN 19 EIA-310 DIMENSIONS. PACKAGING NOT CONTROLLED BY STANDARD 2. INPUTS SHALL BE CONTROLLED BY THE STANDARD AS FOLLOWS: LEGEND Rev INPUT DEVICES SHALL MECHANICALLY CONFORM TO NEMA TS 2 Sec (see Figure 6-5) CONNECTOR TYPE SHALL CONFORM TO NEMA TS 2 PARAGRAPH SYMBOL ELECTRICAL MECHANICAL CONNECTOR PIN ASSIGNMENT SHALL CONFORM TO NEMA TS-2 TABLE INTERFACE STANDARD NOT CONTROLLED BY THIS STANDARD - MAPPING OF SIGNALS FROM INPUT CONNECTORS TO SIU SHALL BE FIXED BY THE STANDARD INTERFACE FUNCTION ASSEMBLY STANDARD STANDARD STANDARD STANDARD NOT CONTROLLED BY THIS STANDARD STANDARD - NEMA 4-CHANNEL INDUCTIVE LOOP DETECTORS WITH (4) OUTPUT AND (4) STATUS WITHOUT INBUS - CALTRANS 222 (2) CHANNEL DETECTORS WITHOUT STATUS AND 224 (4) CHANNEL DETECTORS WITHOUT STATUS - INDUCTIVE LOOP DETECTORS WITHOUT STATUS - ISOLATORS - PREEMPTORS 3. CDC CABLE & CONNECTORS ARE OPTIONAL, BUT CONTROLLED BY STANDARD IF SUPPLIED - ALTERNATE MAPPING FROM INPUT CONNECTORS TO SIU SHALL BE ACCOMPLISED BY SOFTWARE TYPICAL COMPATIBLE INPUT DEVICES INCLUDE: Figure 3: High Level Design Functional Block Diagram, Low Voltage Version ATC5301v0202_ Page 7

18 6 COMPONENTS 6.1 Model 2218 Serial Interface Unit (SIU) Standardization Level Description Controlled by Standard? Interface Signal Names and Electrical Yes Characteristics Connector Type and Pin Assignments Yes Mechanical Dimensions Yes General The model 2218 functions as the cabinet communications and control unit. The model 2218 communicates with the ATC through Serial Bus 1 (SB#1) and Serial Bus 2 (SB#2). One model 2218 is needed for each input functionality and each output functionality connected to the ATC. The model 2218 is capable of processing 54 input/output pins and four optical input pins. When installed in an Input Functionality, it processes 24 detector outputs, 24 detector status outputs, and provides six detector reset signals. In advanced detectors, the status outputs may be converted to per channel resets. When installed in an Output Functionality, the model 2218 controls 16 switch pack units (48 outputs) and four optical inputs through the CDC socket Model 2218 Functions Time Reference The model 2218 shall include a 1 Kilohertz time reference to provide system response time stamps. The 1 Kilohertz time reference shall maintain a frequency accuracy of ±0.01 percent (±0.1 counts per second). A 32-bit millisecond counter shall be provided for time stamping. A timestamp rollover flag set by millisecond counter (MC) rollover shall be cleared only on command Clocking The SIU shall not depend upon receiving a continuous SDLC clock signal on SB#1 or SB#2. Incoming clock signals shall only be used to read the corresponding data signals Watchdog Watchdog functionality shall be provided. The model 2218 shall power up with the watchdog enabled. Within the first watchdog time period, the watchdog value shall be set to 200 milliseconds ± 100 milliseconds. The watchdog state shall be reported in the model 2218 status byte as an indication that a watchdog has occurred, which will remain until cleared in the Request Module Status command, see Failure of the model 2218 to reset the watchdog timer shall result in hardware reset. ATC5301v0202_ Page 8

19 6.1.4 Power Up Initialization At Power Up, the model 2218 loss of communications timer shall indicate loss of communications until the user program sends the Request Module Status message to reset the E bit and a subsequent set output command is processed, see Input Functions The model 2218 shall control fifty-four input/output lines using ground-true logic. Figure 4: SIU Parallel Inputs and Outputs When the model 2218 is powered, all outputs shall be initialized OFF and 54 inputs shall be available. Each output must be able to be read back as an input in order to check integrity Input Section Each input shall be read logic "1" (ON) when the input voltage at its field connector input is less than 8 VDC and shall be read logic "0" (OFF) when the input voltage exceeds 16 VDC. Each input shall have an internal pull-up to +24 VDC of 10K Ohms +/- 10 percent and shall not deliver greater than 10 milliamperes to a short circuit to ground. Refer to the model 2218 section of this standard for the electrical characteristics of the model 2218 IN signals, shown in Figure 4. The model 2218 IN INPUT / OUTPUT TRANSISTOR is continually OFF (passively pulled up to 24 VDC). The Sensor plugged into the IN SLOT asserts the INPUT / OUTPUT by actively pulling the INPUT / OUTPUT pin to 0 volts (Ground True). The Sensor de-asserts the model 2218 IN signal from the Sensor in IN SLOT by releasing the signal (OFF), allowing the resistor to actively pull the signal to +24 VDC. ATC5301v0202_ Page 9

20 Optical-Coupled Inputs Opto Common The OPTO COMMON input shall be the common reference pin for the four opto inputs Opto Inputs The OPTO inputs are intended to provide optical isolation for pedestrian detection, internal cabinet functions, remote interconnects or other auxiliary inputs. 1. The OPTO inputs shall provide electrical isolation of 10 Megohms minimum resistance and 1000 VAC RMS minimum breakdown to all connector pins except the OPTO COMMON pin, at a maximum breakdown leakage current of 1 milliamperes RMS. 2. The OPTO inputs shall exhibit nominal impedance to the OPTO COMMON pin of 5000 Ohms, ±10 percent. 3. The OPTO inputs shall not recognize 3 Volts RMS (AC sinusoid or DC) or less relative to the OPTO COMMON input. 4. The OPTO inputs shall recognize 8 Volts RMS (AC sinusoid or DC) or more relative to the OPTO COMMON input. 5. Any steady state voltage applied between an OPTO input and the OPTO COMMON input shall not exceed 35 VAC RMS. 6. The OPTO inputs shall not be acknowledged when active for 25 milliseconds or less and shall be acknowledged when active for 50 milliseconds or more. 7. The OPTO inputs are intended to connect through external 27K Ohm, 1-Watt resistors for 120 VAC operations, external 6.8K Ohm 0.5-Watt resistors for 48 Vdc operation, and are intended for direct connection to 12 VAC or 24 VDC (Low True) for pedestrian detector applications NRESET Input Signal The model 2218 uses the EIA-485 NRESET input for model 2218 shut down/turn on operations matching the ATC. The model 2218 shall be fully initialized and providing specified operation upon NRESET Line going HIGH (Power Up). The NRESET operation shall cause the model 2218 program to restart. No prior message operation data retention is required. The Request Module Status response may report this restart as either a Power On or Watchdog. ATC LINESYNC is used as a system time reference. The microprocessor/controller unit shall be reset by any of the following: 1. Pushbutton Reset 2. NRESET Signal 3. Internal voltage supply out of regulation 4. Microprocessor/controller unit watchdog LINESYNC Input Signal The EIA-485 LINESYNC interrupt shall be generated by both the 0-1 and 1-0 transitions of the LINESYNC signal. The LINESYNC interrupt shall monitor the millisecond counter interrupt and set the millisecond counter error flag if there has not been an interrupt from the 1 Kilohertz ATC5301v0202_ Page 10

21 source for 0.5 seconds. The LINESYNC interrupt shall synchronize the 1 KHz time reference with the 0-1 transition of the LINESYNC signal once a second. A LINESYNC error flag shall be set if the LINESYNC interrupt has not successfully executed for 0.5 seconds or longer. The absence of the LINESYNC signal shall only affect the SIU output phase synchronization with the AC Line and shall not prevent the SIU from otherwise operating SB#1 Address Select Inputs The SB#1 address select input bits shall define the SB#1 address of each SIU. This address is related to the SIU position and function in the cabinet. No connection shall be logical False, while a connection to LOGIC GROUND shall be a logical True. There shall be sixteen unique address positions selected with a binary code, using bit 0 as least significant and bit 3 as most significant. Table 1: Address Select Inputs Address Functionality 2218 Address A3 A2 A1 A0 0 Reserved Output Functionality Reserved Output Functionality Reserved Reserved Reserved Reserved Reserved Input Functionality # Input Functionality # Input Functionality # Input Functionality # Input Functionality # Reserved Reserved Note 1: A0 to A3 are Input to model 2218 with Logic Ground as common. Note 2: 0 = open or ground false. 1= closed or ground true (shunted) Output Functions Output Section Each output written as a logic "1" (ON) shall have a voltage at its field connector output of less than 4.0 VDC. Each output written as logic "0" (OFF) shall provide an open circuit (1 Megohm or more) at its field connector output. Each output shall consist of an open-collector capable of driving 40 VDC minimum and sinking 100 milliamperes minimum. Each output circuit shall be capable of switching from logic "1" to logic "0" within 100 microseconds when connected to a ATC5301v0202_ Page 11

22 load of 100K Ohms minimum. Each output circuit shall be protected from transients of 10 microseconds (±2 microseconds) duration, ±300 VDC from a 1K Ohm source, with a maximum rate of 1 pulse per second. Each output shall latch the data written and remain stable until either new data is written or the active-low reset signal. Upon an active-low reset signal, each output shall latch a logic "0" and retain that state until a new writing. The state of all output circuits at the time of Power Up or in Power Down state shall be OFF. It shall be possible to simultaneously assert all outputs within 100 microseconds of each other. An output circuit state not changed during a new writing shall not glitch when other output circuits are updated. Refer to the model 2218 section of this standard for the electrical characteristics of the model 2218 OUT signals shown in Figure 4. The model 2218 OUT INPUT / OUTPUT PIN is asserted when the OUTPUT TRANSISTOR is ON (0 volts). The model 2218 OUT INPUT / OUTPUT PIN is unasserted when the OUTPUT TRANSISTOR is OFF (passively pulled up to 24 VDC) Functionality Address Output The model 2218 shall sense the rack address block and generate a square wave (± 15%) on the ASSEMBLY ADDRESS signal as follows: Table 2: Rack Address Frequency Input Address Frequency (Hz) Functionality Others Don t Care The Address Frequencies shown in Table 2 are not synchronized to service voltage Model 2218 Operational Functions Buffers A transition buffer shall be provided capable of holding a minimum of 1024 recorded entries. The transition buffer shall default to empty. The following are the two entry types: transition and rollover. The inputs shall be monitored for state transition. At each transition (if the input has been configured to report transition), a transition entry shall be added to the transition buffer. If multiple inputs change state during one input sample, these transitions shall be entered into the input transition buffer by increasing input number. ATC5301v0202_ Page 12

23 The millisecond counter shall be monitored for rollover. At each rollover transition ($xxxx FFFF - $xxxx 0000), a rollover entry shall be added to the transition buffer. For rollover entries, all bits of byte 1 are set to indicate that this is a rollover entry. A new entry shall be discarded when storage is not available for the new entry. Transition buffer blocks are sent to the ATC upon command. Upon confirmation of their reception, the blocks shall be removed from the transition buffer. The entry types are as follows: Table 3: Input Transition Entry Description msb lsb Byte Number Transition Entry Identifier S Input Number (I0 I59) 1 Timestamp NLSB X X X X X X X X 2 Timestamp LSB X X X X X X X X 3 Table 4: Millisecond Counter Rollover Entry Description msb lsb Byte Number Rollover Entry Identifier Timestamp MSB X X X X X X X X 2 Timestamp NMSB X X X X X X X X Input Section Function Input scanning shall begin at I0 (bit 0) and proceed to the highest numbered input, ascending from LSB to MSB. Each complete input scan shall finish within 100 microseconds. Once sampled, the logic state of an input shall be held until the next input scan. Each input shall be sampled 1,000 times per second. The time interval between samples shall be 1 milliseconds (± 100 microseconds). The millisecond counter reported shall indicate the value at the completion of the input scan Input Data Filtering If configured, the inputs shall be filtered by the model 2218 to remove signal bounce. The filtered input signals shall then be monitored for changes as noted. The filtering parameters for each input shall consist of ignore input flag and the ON and OFF filter values. If the ignore input flag is set, no input transition entries shall be placed into the input transition buffer. The ON and OFF filter values shall determine the number of consecutive samples an input must be ON and OFF, respectively, before a change of state is recognized. If the change of state is shorter than the specified value, the change of state shall be ignored. The ON and OFF filter values shall be in the range of 0 to 255. A filter value of 0, for either or both values, shall result in no filtering for this input. The default values for input signals after reset shall be as follows: ATC5301v0202_ Page 13

24 1. Filtering: Enabled 2. On and off filter values shall be set to: 5 3. Transition monitoring: Disabled (Timestamps are not logged) Output Function Simultaneous assertion of all outputs shall occur within 100 microseconds. Each output shall be capable of being individually configured in state to ON, OFF, or a state synchronized with either phase of LINESYNC. The condition of the outputs shall only be "ON" if the model 2218 continues to receive active communications from the ATC. If there is no valid communications with the ATC for 2.0 seconds, all outputs shall revert to the OFF condition, and the model 2218 status byte shall be updated to reflect the loss of communication from the ATC. The data and control bits in the ATC -model 2218 frame protocol shall control each output as follows: Table 5: Output Bit Translation Case Data Control Function Bit Bit A 0 0 Output in the OFF state B 1 1 Output is a square wave, synchronized to the LINESYNC signal. When LINESYNC is ON (1), the output is OFF, and When LINESYNC is OFF (0), the output is ON. C 0 1 Output is a square wave, synchronized to the LINESYNC signal. When LINESYNC is ON (1), the output is ON, and When LINESYNC is OFF (0), the output is OFF D 1 0 Output is in the ON state. In Case A above, the corresponding output shall be turned OFF if previously ON and if previously OFF remain OFF until otherwise configured. For half-cycle switching (cases B and C), all outputs to be changed shall be changed within 50 microseconds after the corresponding LINESYNC transition and shall remain in the same state during the entire half cycle. In Case D above, the corresponding output shall be turned ON if previously OFF and if previously ON remain ON until otherwise configured. All outputs shall never change state unless configured to do so Power Requirements The model 2218 requires a nominal supply voltage of 24 VDC (±2 VDC) with a maximum of 30 VDC. A voltage of 16 VDC or less shall be considered loss of power and a voltage of 18 VDC or greater shall be considered adequate for operation. The model 2218 shall not require more than 300 milliamperes over the voltage range of 16 VDC to 30 VDC and the Inrush current shall be limited to a maximum of 1.5 Amperes from initial application of DC power. The model 2218 shall not be damaged by insertion to, or removal from, powered input or output assemblies. The model 2218 shall operate normally a maximum of 700 milliseconds after power is restored. ATC5301v0202_ Page 14

25 6.1.9 Communications Ports The model 2218 shall have a minimum of four communications ports, identified as model 2218 Ports SB#1, SB#2, INBUS and a front panel Terminal port. Communications port SB#1 and the Terminal port are connected to the model 2218 microprocessor/controller unit, while Serial ports SB#2 and INBUS provide a buffered communications path from the ATC to the intelligent devices in the Input Functionality Model 2218 Port SB#1 Port SB#1 shall interface the model 2218 to the CU via Serial Bus 1 (SB#1) of the cabinet bus. See the SB#1 Protocol section 9.1 of this standard for the protocol requirements. The SB#1 frame address assignments of multiple SIUs are as defined in section Model 2218 Port SB#2 Port SB#2 shall interface the INBUS port of the model 2218 to the CU via Serial Bus 2 (SB#2) of the cabinet bus. The SB#2 protocol and Data Link parameters to the model 2218 are unspecified and are application specific. INBUS provides a buffered serial interface to intelligent devices located in the Input functionality Synchronous Operation If the CU is communicating via logical port SP3S, the model 2218 SB#2 shall communicate in HDLC format and protocol, and the hardware requirements shall match serial bus 2 (synchronous TX/RX using TxC from the CU CPU for common clocking) per ATC 5201 standard Asynchronous Operation If the CU is communicating via logical port SP3, model 2218 SB#2 shall communicate in an asynchronous START BIT / STOP BIT format and protocol per ATC 5201 standard Terminal Port Operation The SIU Terminal port shall be provided for communication to a personal computer using EIA- 694 signaling. The model 2218 Terminal port protocol shall be defined by the vendor and operate with vendor-supplied software. The pin assignments of model 2218 Terminal Port shall be defined by section INBUS Operation INBUS is a legacy SIU function that is not required for conformance to the standard. If INBUS is provided, INBUS functions as described in this section. If INBUS is not provided, the INBUS pins are not connected within the SIU. The model 2218 INBUS consists of detector rack signal INBUS TxD, INBUS RxD, INBUS TxC, and INBUS RxC and shall conform to the electrical standards of EIA-485, single-ended. In ATC5301v0202_ Page 15

26 this scheme, the RxD- and RxC- inputs of the EIA-485 receivers are connected to 2.5 Volts, while the TxD- and TxC- outputs of the EIA-485 drivers are not used. Model 2218 INBUS receivers shall withstand ±25 Volts, suitable for reception of EIA-694 bipolar signals. All four INBUS signals shall be terminated at each receiver with impedance of 6,800 Ohms (±5 percent), connected from signal to Logic Ground on the SIU. The protocol shall be defined by the receiving device. The model 2218 shall ensure that an SB#2 MARK equates to an INBUS MARK. The model 2218 shall provide an LED indicator for TxD and RxD, such that it is illuminated during a MARK (START Bit, for example) and extinguished during a SPACE (STOP Bit, for example) Synchronous Operation If the CU is communicating to devices via logical port SP3S, the model 2218 INBUS buffers shall convert model 2218 SB#2 TxD+ and TxD- to EIA-485, which shall then be transmitted to the devices via INBUS TxD. Likewise, the model 2218 INBUS buffers shall convert model 2218 SB#2 TxC+ and TxC- to EIA-485, which shall then be transmitted to the devices via INBUS TxC. If the CU is communicating to detectors via logical port SP3S, the model 2218 INBUS buffers shall convert INBUS RxD from EIA-485, which shall then be transmitted to the ATC via model 2218 SB#2 RxD+ and RxD-. Likewise, the model 2218 INBUS buffers shall convert INBUS RxC from EIA-485, which shall then be transmitted to the ATC via model 2218 SB#2 RxC+ and RxC Asynchronous Operation If the CU is communicating to detectors via logical port SP3, the model 2218 INBUS buffers shall convert model 2218 SB#2 TxD+ and TxD- to EIA-485 which shall be transmitted to the detectors via INBUS TxD. If the CU is communicating to detectors via logical port SP3, the model 2218 INBUS buffers shall convert INBUS RxD from EIA-485, which shall be transmitted to the ATC via model 2218 SB#2 RxD+ and RxD-. Asynchronous operation shall not use SB#2 TxC+, TxC-, RxC+, RxC-, nor INBUS TxC, nor INBUS RxC INBUS RTS Input The INBUS RTS input shall be pulled to +24 Volts via a 10K Ohm resistor on the SIU. In systems using legacy devices that do not use INBUS RTS, this line shall not be used (no connection). Devices equipped with INBUS RTS shall drive this line low when transmitting data from that detector to the model 2218 via INBUS. When not transmitting data, this line shall not be driven low and is pulled to +24V via the 10K Ohm resistor. ATC5301v0202_ Page 16

27 Serial Bus 2 Control The controller transmits a message on SB#2 which shall be received by each device via the model 2218 INBUS TxD and INBUS TxC. If the device is asynchronous, INBUS TxC shall be ignored. Each detector shall compare the address field of the message with its own slot address and assembly address. If the address matches, that device shall respond with data on INBUS RxD and INBUS RxC. If the detector is asynchronous, INBUS RxC shall not be used. The model 2218 of the responding detector shall enable its EIA-485 line drivers to transmit the response from INBUS to SB#2. This driver shall be enabled by any of the three following conditions: Activity on INBUS RxD Activity on INBUS RxC INBUS RTS at low (true) This driver shall be disabled by either of the following two conditions: Lack of activity on both INBUS RxD and RxC for 1.5 milliseconds INBUS RTS transitions from low (true) to high (false) NEMA TS-2 Port 1 NEMA TS-2 Port 1 can operate on SB2 as an option, using TxD, RxD, TxC and RxC signal pairs of Table 7. The communication functions per the BIU Port 1 section of the NEMA TS-2 standard Sensors with Serial Ports Circuitry shown in Figure 5 shall be included in each SIU, providing a direct serial connection from the controller to each individual serial detector. This serial connection shall be in addition to all of the NEMA CALL and STATUS lines are shown: Figure 5: Serial Sensors ATC5301v0202_ Page 17

28 Detectors and other sensor types that include serial ports can be accessed directly by the Controller Unit via Serial Bus 2 as shown above. The protocol is not dependent upon the SIU. For example, serial detector protocol is installed in the CU, which then reads the detector CALLs directly from the detector, and the detectors are configured directly from the CU. The model 2218 circuitry translates the EIA-485 balanced differential signals from the CU into single-ended signals compatible with modern detectors. In addition, the detectors can be tuned and monitored via the serial bus Model 2218 Mechanical Details Form Factor The model 2218 module shall be physically composed of a printed circuit board, 4.5 inches high by 6.5 inches long, a front panel 1.42 inches wide by 4.5 inches high with a DIN 96-pin connector on the connector end (opposite the front panel). Figure 6: Model 2218 Mechanical Dimensions Model 2218 Insertion and Extraction A U handle shall be mounted on the front panel for insertion/extraction LED Indicators Four LED waterclear indicators shall be provided on the front panel, as follows: Active Power Serial Bus #1 TxD Serial Bus #1 RxD Serial Bus #2 TxD (if INBUS is provided) Serial Bus #2 RxD (if INBUS is provided) ATC5301v0202_ Page 18

29 The model 2218 power LED shall indicate that the +24 VDC power supply is within regulation. The model 2218 active LED shall be controlled via model 2218 I/O 55. The Serial Bus #1 indicators shall pulse when a frame is correctly received or transmitted Reset Button The model 2218 front panel shall provide a recessed Reset pushbutton that shall provide a hardware reset to the microprocessor/controller unit Position Subminiature D-Type Connector The front panel EIA-694 connector is a 9 pin DE9S subminiature type connector. The connector shall provide #4-40 mating side jack posts for securing an attached cable. Because the port is configured as a DTE device, a null modem cable is required to connect directly to a personal computer COM port. Table 6: Model 2218 EIA-694 Port Pin # Function I/O 1 RESERVED - 2 RECEIVE DATA I 3 TRANSMIT DATA O 4 RESERVED - 5 SIGNAL GROUND X 6 RESERVED - 7 RESERVED - 8 RESERVED - 9 RESERVED Model 2218 Connector The model 2218 main connector is a three row DIN (96-pin) Header Type. Signal names are with respect to the SIU. Table 7: Model 2218 Connector Assignments Pin Description Pin Description Pin Description A1 +24 VDC IN B1 +24 VDC IN C1 INPUT / OUTPUT 47 A2 INPUT / OUTPUT 0 B2 INPUT / OUTPUT 1 C2 INPUT / OUTPUT 48 A3 INPUT / OUTPUT 2 B3 INPUT / OUTPUT 3 C3 INPUT / OUTPUT 49 A4 INPUT / OUTPUT 4 B4 INPUT / OUTPUT 5 C4 INPUT / OUTPUT 50 A5 INPUT / OUTPUT 6 B5 INPUT / OUTPUT 7 C5 INPUT / OUTPUT 51 A6 INPUT / OUTPUT 8 B6 INPUT / OUTPUT 9 C6 INPUT / OUTPUT 52 ATC5301v0202_ Page 19

30 Pin Description Pin Description Pin Description A7 INPUT / OUTPUT INPUT / OUTPUT INPUT / OUTPUT B7 C A8 INPUT / OUTPUT INPUT / OUTPUT B C8 SB#1 TXD + A9 INPUT / OUTPUT INPUT / OUTPUT B C9 SB#1 TXD - A10 INPUT / OUTPUT INPUT / OUTPUT B C10 SB#1 RXD + A11 INPUT / OUTPUT INPUT / OUTPUT B C11 SB#1 RXD - A12 INPUT / OUTPUT INPUT / OUTPUT B C12 SB#1 TXC + A13 INPUT / OUTPUT INPUT / OUTPUT B C13 SB#1 TXC - A14 INPUT / OUTPUT INPUT / OUTPUT B C14 SB#1 RXC + A15 INPUT / OUTPUT INPUT / OUTPUT B C15 SB#1 RXC - A16 INPUT / OUTPUT INPUT / OUTPUT B C16 LINESYNC + A17 INPUT / OUTPUT INPUT / OUTPUT B C17 LINESYNC - A18 INPUT / OUTPUT INPUT / OUTPUT B C18 NRESET + A19 INPUT / OUTPUT INPUT / OUTPUT B C19 NRESET - A20 INPUT / OUTPUT INPUT / OUTPUT B C20 ASSEMBLY ADR A21 INPUT / OUTPUT INPUT / OUTPUT B C21 INBUS RTS A22 INPUT / OUTPUT INPUT / OUTPUT B C22 SB#2 TXD + A23 INPUT / OUTPUT INPUT / OUTPUT B C23 SB#2 TXD - A24 INPUT / OUTPUT INPUT / OUTPUT B C24 SB#2 RXD + A25 INPUT / OUTPUT 46 B25 OPTO INPUT 1 C25 SB#2 RXD - A26 OPTO INPUT 2 B26 OPTO INPUT 3 C26 SB#2 TXC + A27 OPTO INPUT 4 B27 OPTO COMMON C27 SB#2 TXC - A28 ADDRESS 0 B28 ADDRESS 1 C28 SB#2 RXC + A29 ADDRESS 2 B29 ADDRESS 3 C29 SB#2 RXC - A30 INBUS TXD B30 INBUS RXD C30 INBUS TXC ATC5301v0202_ Page 20

31 Pin Description Pin Description Pin Description EQUIPMENT AC LINE A31 B31 C31 INBUS RXC GROUND REFERENCE A32 24 VDC GROUND B32 24 VDC GROUND C32 RESERVED 6.2 Model 2202 High Density Switch Pack / Flasher Unit (HDSP/FU) Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes Yes Yes General The Model 2202 High-Density Switch Pack / Flasher Unit (HDSP/FU) shall be a modular PCBbased plug-in device providing six solid-state switches (two channels) to drive field signal loads. Each switch shall open or close a connection between applied signal power and external load. The Model 2202 shall operate in either the switch pack mode (HDSP) or the flasher mode (HDFU) depending on the applied SB#3 bus address. This standard defines both high voltage AC output (2202-HV) and low voltage DC output (2202- LV) units. Unless otherwise specified, all HDSP/FU requirements apply to both output types. A common form factor, including connector pin-out, is used for both defined units HDSP/FU Functions Field Output Drivers The HDSP shall provide two channels consisting of three individual field outputs per channel. The HDFU shall provide two channels consisting of two individual field outputs per channel Field Signal Voltage Sense Inputs The 2202 HDSP/FU shall monitor the voltages at each of its six sense terminals. All voltage measurements shall be made over an RMS period of 33.3 milliseconds and shall be performed at a minimum sampling rate of 1920 samples per second. A true RMS voltage measurement shall be made regardless of phase or wave-shape. All HV HDSP/FU voltage measurements shall be accurate to ±2%. All 2202-HV HDSP/FU voltage measurements shall include both positive and negative half wave sinusoids, over the voltage range of 0 to 135 Volts RMS. All 2202-LV HDSP/FU voltage measurements shall be accurate to ±2% over the voltage range of 0 to 64 Volts RMS. ATC5301v0202_ Page 21

32 The 2202 HDSP/FU shall be designed such that unused signal inputs are not sensed by the CMU as active signals. The 2202-HV HDSP/FU shall report an unused input at less than 15 Volts RMS when connected to HV+ SIGNAL through 1500 picofarads Field Load Current Monitor The 2202 HDSP/FU shall sense the output current independently for each of the six outputs. All current measurements shall be made over an RMS period of 33.3 milliseconds and shall be performed at a minimum sampling rate of 1920 samples per second. All 2202 HDSP/FU RMS current measurements shall be accurate to ± 2%. A true RMS current measurement shall be made regardless of phase or wave-shape Diagnostic If the 2202 HDSP/FU is inoperative due to an internal malfunction, it shall go to a Diagnostic state and force the field outputs to the Off state. A DIAGNOSTIC indicator shall illuminate when the 2202 HDSP/FU is inoperative as a result of a diagnostic fault. The definition of Diagnostic fault is not controlled by the standard, but the Diagnostic state is reported as a bit in the Status byte of the SB#3 response frame, see Table 66 and Table Input Signals Field Signal Control Inputs A Ground True input (0 VDC to 6 VDC) shall cause the output switch to conduct (ON), and a Ground False (16 VDC or more) shall cause it to not conduct (OFF). State transition shall occur between 6 VDC and 16 VDC. Each input shall not sink more than 20 milliamperes nor be subjected to more than 30 VDC. Each input shall have reverse polarity protection HDSP/FU Slot Address The address select input pins ADDRESS 4:0 define the Serial Bus #3 address of the HDSP mode as shown in Table 8 and the HDFU mode shown in Table 9. The pins are left open for a logical False, and are connected to ADDRESS COMMON for a logical True. ADDRESS COMMON shall be connected only to the ADDRESS 4:0 pins of the same slot. The Serial Bus #3 address is the binary value of the ADDRESS 4:0 inputs plus 1. Table 8: 2202 HDSP Slot Address ADDR 4 ADDR 3 ADDR 2 ADDR 1 ADDR 0 SB#3 Address Function False False False False False 0x01 Slot #1 Ch 1,2 False False False False True 0x02 Slot #2 Ch 3,4 False False False True False 0x03 Slot #3 Ch 5,6 False False False True True 0x04 Slot #4 Ch 7,8 False False True False False 0x05 Slot #5 Ch 9,10 ATC5301v0202_ Page 22

33 ADDR 4 ADDR 3 ADDR 2 ADDR 1 ADDR 0 SB#3 Address Function False False True False True 0x06 Slot #6 Ch 11,12 False False True True False 0x07 Slot #7 Ch 13,14 False False True True True 0x08 Slot #8 Ch 15,16 False True False False False 0x09 Slot #9 Ch 17,18 False True False False True 0x0A Slot #10 Ch 19,20 False True False True False 0x0B Slot #11 Ch 21,22 False True False True True 0x0C Slot #12 Ch 23,24 False True True False False 0x0D Slot #13 Ch 25,26 False True True False True 0x0E Slot #14 Ch 27,28 False True True True False 0x0F Slot #15 Ch 29,30 False True True True True 0x10 Slot #16 Ch 31,32 Table 9: 2202 HDFU Slot Address ADDR 4 ADDR 3 ADDR ADDR SB#3 Function ADDR Address True False False False False Reserved -- True False False False True Reserved -- True False False True False Reserved -- True False False True True Reserved -- True False True False False Reserved -- True False True False True Reserved -- True False True True False Reserved -- True False True True True Reserved -- True True False False False Reserved -- True True False False True Reserved -- True True False True False Reserved -- True True False True True Reserved -- True True True False False Reserved -- True True True False True 0x1E HDFU #1 True True True True False 0x1F HDFU #2 True True True True True Reserved Output Signals Field Signal Outputs The 2202 HDSP/FU outputs shall be capable of proper operation with signal power over the Operational Power voltage ranges. In the HDFU mode the flashing outputs shall provide not less ATC5301v0202_ Page 23

34 than 50 nor more than 60 flashes per minute with an On period of 50 ± 5%. The flash rate shall not exceed these limits even with variations of the AC Line frequency. Each individual 2202-HV HDSP/FU output shall be capable of supplying an output current of a minimum of 5 milliamperes to a maximum of 2.0 Amperes RMS to the load. In the 2202-HV HDSP mode, the total output current shall be limited to 1.0 Amperes continuous on all six outputs. In the 2202-HV HDFU mode, the total output current shall be limited to 2.0 Amperes at 50 percent duty cycle on all four flasher outputs, and the Ch 1 and Ch 2 Aux outputs shall be limited to 1.0 Ampere continuous. Each 2202-HV HDSP/FU output shall have a peak stand-off voltage of 500 volts or greater. Each individual 2202-LV HDSP/FU output shall be capable of supplying an output current of a minimum of 5 milliamperes to a maximum of 3.0 Amperes RMS to the load. In the 2202-LV HDSP mode, the total output current shall be limited to 2.0 Amperes continuous on all six outputs. In the 2202-LV HDFU mode, the total output current shall be limited to 3.0 Amperes at 50 percent duty cycle on all four flasher outputs, and the Ch 1 and Ch 2 Aux outputs shall be limited to 2.0 Amperes continuous. Each 2202-LV HDSP/FU output shall have a peak stand-off voltage of 100 volts or greater. Each switch shall have an OFF state dv/dt rating of 100 Volts per microsecond or better. Each switch shall provide isolation between control inputs and field outputs of at least 2000 VDC and at least 100 megohms resistive Off-State Leakage When the switch is in the OFF state, the output current through the load shall not exceed 1 milliampere maximum Zero-Cross The 2202-HV HDSP/FU output shall turn On within 10 degrees of the zero voltage point of the AC Line sinusoid on the first turn-on cycle. All subsequent cycles shall turn On within 5 degrees of the zero voltage point of the AC line sinusoid. The output shall turn On within one half cycle following the application of the input signal. The output shall turn Off within 5 degrees of the zero voltage point of the AC line sinusoid and within one half cycle following the removal of the input signal Power Requirements Operational Power The 2202 HDSP/FU shall commence normal operation within 500 ms of application of nominal power. The Field Outputs shall not glitch to the On state during this period. Inrush current drawn from the +24VDC source during power-up shall not exceed 100 ma peak. Inrush current drawn from the HV+MAINS or LV+MAINS source during power-up shall not exceed 2000 ma peak. ATC5301v0202_ Page 24

35 HV+MAINS The HV+MAINS input provides operational power to the 2202-HV HDSP/FU. The 2202-HV HDSP/FU shall be operational over the voltage range of 60 Volts AC to 135 Volts AC HV+SIGNAL The HV+SIGNAL input provides field signal power to the 2202-HV HDSP/FU. This input shall be driven by the output of the Main Contactor secondary. The 2202-HV HDSP/FU field signal outputs shall be operational over the voltage range of 60 Volts AC to 135 Volts AC LV+MAINS The LV+MAINS input provides operational power to the 2202-LV HDSP/FU. The 2202-LV HDSP/FU shall be operational over the voltage range of 18 Volts RMS to 60 Volts RMS LV+SIGNAL The LV+SIGNAL input provides field signal power to the 2202-LV HDSP/FU. This input shall be driven by the output of the Main Contactor secondary. The 2202-LV HDSP/FU field signal outputs shall be operational over the voltage range of 18 Volts RMS to 60 Volts RMS VDC Power Supply The 2202 HDSP shall sense the state of the +24VDC input. The +24VDC circuitry is with respect to DC (LOGIC) GROUND and electrically isolated from the MAINS and SIGNAL referenced circuitry. The HDSP shall report the status of the 24VDC input voltage in the response frame byte Status. A value less than 18 Vdc shall be reported as Low in the response frame Status byte. A value greater than 22 Vdc shall not be reported as Low in the response frame Status byte. A value between 18 Vdc and 22 Vdc may or may not be reported as Low. The maximum current into the +24 VDC input pin over the voltage range of 0 VDC to 30 VDC shall be less than 60 milliamperes Front Panel Indicators All indicators shall be clear LEDs. Clear LEDs shall not depend on a reflector or diffusion as part of its design. Clear LEDs shall not appear to be ON when exposed to ambient light. The following indicators shall be provided: Power A green POWER indicator shall illuminate to indicate Operational input voltage (HV+MAINS or LV+MAINS) is adequate for operation. ATC5301v0202_ Page 25

36 Diagnostic A red DIAGNOSTIC indicator shall illuminate when the 2202 HDSP/FU is inoperative as a result of a diagnostic condition SB#3 Rx A yellow indicator shall pulse On each time the 2202 HDSP/FU correctly receives a frame on Serial Bus #3 from the CMU SB#3 Tx A yellow indicator shall pulse ON each time the 2202 HDSP/FU transmits a frame on Serial Bus #3 to the CMU Field Signal Control Input An individual red, yellow, and green LED indicator shall illuminate when the Field Signal Control input is active. There shall be one indicator for each Control input of each channel Channel ID Status (HDSP mode) Two blue LED indicators shall be provided for each channel and shall illuminate based on the command Frame #01 data from the CMU These Channel ID Status indicators may be used by the CMU-2212 to indicate various status conditions based on an 2202 HDSP/FU channel Flasher Channel Status (HDFU mode) Two LED indicators shall be provided for each flasher channel and shall illuminate to indicate an active Flasher output. The voltage level of the FL#x-x SENSE input is used to determine the active status of the LEDs such that they reflect actual flasher status to the field Flasher Channel Status Thresholds (HDFU-HV mode) The Flasher output status shall be On when the RMS voltage exceeds 70 Vrms. The Flasher output status shall be Off when the RMS voltage is less than 50 Vrms Flasher Channel Status Thresholds (HDFU-LV mode) The Flasher output status shall be On when the RMS voltage exceeds 44 Vrms. The Flasher output status shall be Off when the RMS voltage is less than 40 Vrms HDSP/FU Connector The 2202 HDSP/FU shall connect to the OA2 backplane using a male DIN Type E series, 48-pin connector. The Rx and Tx signal names are with respect to the 2202 HDSP/FU. The connector pin assignments for the HDSP mode are shown in Table 10: ATC5301v0202_ Page 26

37 Table 10: HDSP Mode Connector Pin Assignments Pin # A (Bottom Row) C (Middle Row) E (Top Row) 2 Ch 1 Red In Ch 1 Yellow In Ch 1 Green In 4 Ch 2 Red In Ch 2 Yellow In Ch 2 Green In 6 +24VDC VDC Ground Address 4 8 Equipment Ground MAINS Ground MAINS Ground 10 SB#3 Rx+ SB#3 Tx+ Address Common 12 SB#3 Rx- SB#3 Tx- Address 3 14 Address 0 Address 1 Address 2 16 Ch 1 Red Sense Ch 1 Red Out Ch 1 Red Out 18 Ch 1 Yellow Sense Ch 1 Yellow Out Ch 1 Yellow Out 20 Ch 1 Green Sense Ch 1 Green Out Ch 1 Green Out 22 Ch 2 Red Sense Ch 2 Red Out Ch 2 Red Out 24 Ch 2 Yellow Sense Ch 2 Yellow Out Ch 2 Yellow Out 26 Ch 2 Green Sense Ch 2 Green Out Ch 2 Green Out 28 LV+ Signal LV+ Signal LV+ Signal 30 HV+ Signal HV+ Signal HV+ Signal 32 LV+ MAINS MAINS Ground HV+ MAINS The connector pin assignments for the HDFU mode are shown in Table 11 Table 11: HDFU Mode Connector Pin Assignments Pin # A (Bottom Row) C (Middle Row) E (Top Row) 2 Reserved Reserved Ch 1 Aux In 4 Ch 2 Aux In Reserved Reserved 6 +24VDC VDC Ground Address 4 8 Equipment Ground MAINS Ground MAINS Ground 10 SB#3 Rx+ SB#3 Tx+ Address Common 12 SB#3 Rx- SB#3 Tx- Address 3 14 Address 0 Address 1 Address 2 16 FL#1-1 Sense FL#1-1 Out FL#1-1 Out 18 FL#1-2 Sense FL#1-2 Out FL#1-2 Out 20 Ch 1 Aux Sense Ch 1 Aux Out Ch 1 Aux Out 22 Ch 2 Aux Sense Ch 2 Aux Out Ch 2 Aux Out 24 FL#2-1 Sense FL#2-1 Out FL#2-1 Out 26 FL#2-2 Sense FL#2-2 Out FL#2-2 Out 28 LV+ Signal LV+ Signal LV+ Signal 30 HV+ Signal HV+ Signal HV+ Signal 32 LV+ MAINS MAINS Ground HV+ MAINS ATC5301v0202_ Page 27

38 HDSP/FU Mechanical The 2202 HDSP/FU shall be 1.12 W x 4.50 H x 6.50 D. Mechanical details are illustrated Figure 7. The 2202 HDSP/FU shall slide into two card guides in the High-Density Output Functionality (OA2), each having a nominal slot width of and a maximum slot depth of The nominal thickness of the 2202 HDSP/FU PCB shall be ± 10%. The maximum height of components used on the 2202 HDSP/FU shall be 1.0. The handle shall not extend further than 1.50 from the front panel surface. Figure 7: 2202 HDSP/FU Mechanical Dimensions ATC5301v0202_ Page 28

39 6.3 Model 2212 Cabinet Monitor Unit Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes Yes Yes General The Cabinet Monitor Unit (CMU) is the principle part of the ATC Cabinet monitoring system. The role of the CMU is to query various cabinet conditions and, if the application requires action, the CMU will transfer control from the ATC to a flashing control mode. The Model 2212 CMU is composed of a microprocessor, memory devices including non-volatile memory, communications circuitry to interface with Serial Buses #1 and #3, front panel indicators, front panel communication connector and a serial memory key device. The operating program shall be resident in the non-volatile memory and shall be user upgradeable via a front panel communication port. The serial memory key shall contain all of the conditions and function selections of the CMU. This standard defines both high voltage AC powered (2212-HV) and low voltage DC powered (2212-LV) units. Unless otherwise specified, all CMU requirements apply to both output types Failed State Action (FSA) Only Unit Reset shall reset the CMU from a LATCHED FAILED STATE ACTION (LFSA). Only a Unit Reset or a CMU Power Fail shall reset a LATCHED RESETTABLE FAILED STATE ACTION (LFSA-R). A NONLATCHED FAILED STATE ACTION (NFSA) shall be reset if the fault conditions causing the NFSA have been removed. An NFSA shall last for the programmed Minimum Flash time at a minimum. Only one LFSA, LFSA-R or NFSA fault state shall be set at any time Unit Reset The CMU shall be reset from a FSA as a result of the front panel reset button or the EXTERNAL TEST RESET input. This reset command shall be a one-time event, such that a continuous reset command does not prevent the CMU from operating. The EXTERNAL TEST RESET input shall be True when the voltage is less than 8 VDC. The EXTERNAL TEST RESET input shall be False when the voltage is greater than 16 VDC. A minimum True pulse width on the EXTERNAL TEST RESET input of 100 milliseconds shall be required for a Unit Reset. The EXTERNAL TEST RESET input shall be referenced to VDC GROUND. ATC5301v0202_ Page 29

40 6.3.4 Exit From Failed State Action Prior to the CMU transferring the output relay contacts from the Fault state to the No Fault state, a transition period of 500 milliseconds shall occur. During the transition period the output relay contacts shall be in the Fault state and the CMU shall set the Start-Up Flash Call bit in the Type 209 Frame to 1. At all other times the Start-Up Flash Call bit of the Type 209 Frame shall be set to Monitor Functions Cabinet Power Supply The CMU shall sense the Cabinet +48VDC, +24 VDC, and +12 VDC power supply sources to ± 5 percent accuracy. The CMU shall also sense the Cabinet +24 VDC state in each Output Functionality as reported by each HDSP. A +48 VDC, +24 VDC or +12 VDC failure during the programmed Minimum Flash time or during a CMU Power Failure shall not cause a LFSA. The CMU shall report the value of the +24 VDC and +12 VDC power supply sources in the Type 209 and Type 211 response frame VDC Monitoring (2212-HV CMU Only) Voltages equal to or greater than +46 VDC shall not cause a LFSA. Voltages at or less than +44 VDC for 500 milliseconds or longer shall cause a LFSA. If the sensed voltage is less than +44 VDC for 200 milliseconds or less, the CMU shall not cause a LFSA. All other timing or voltage conditions may or may not cause LFSA. There shall be programming in the serial memory key to disable +48 VDC power supply monitoring for legacy ATC Cabinets that do not provide this 48VDC monitor input to the CMU VDC Monitoring Voltages equal to or greater than +22 VDC shall not cause a LFSA. Voltages at or less than +18 VDC for 500 milliseconds or longer shall cause a LFSA. If the sensed voltage is less than +18 VDC for 200 milliseconds or less, the CMU shall not cause a LFSA. All other timing or voltage conditions may or may not cause LFSA VDC Monitoring Voltages equal to or greater than +11 VDC shall not cause a LFSA. Voltages at or less than +9 VDC for 500 milliseconds or longer shall cause a LFSA. If the sensed voltage is less than +9 VDC for 200 milliseconds or less, the CMU shall not cause a LFSA. All other timing or voltage conditions may or may not cause LFSA. There shall be programming in the serial memory key to disable +12 VDC power supply monitoring Conflicting Channels For purpose of conflict determination, an active signal on either of the Green/Walk or Yellow inputs associated with any of the 32 channels shall be considered as that channel being active. The serial memory key shall contain the permissive channel pair programming. When any ATC5301v0202_ Page 30

41 conflicting channels are detected as concurrently active for less than 200 milliseconds, the CMU shall not cause a LFSA. When any conflicting channels are detected as concurrently active for 500 milliseconds or more, the CMU shall cause a LFSA. When any conflicting channels are detected as concurrently active for more than 200 milliseconds but less than 500 milliseconds, the CMU may or may not cause a LFSA. The time interval between the beginning of the concurrently conflicting channels and the transfer to the LFSA shall not exceed 500 milliseconds Serial Bus Error The CMU communicates using both Serial Buses (SB) #1 and #3. On SB#1, the CMU is a secondary, polled by the CU, which is the primary. On SB#1, the CMU shall respond to the SB#1 address defined by the ADDRESS 0 and ADDRESS 1 pins. On SB#3, the CMU is the primary, polling each high density switch pack (HDSP) and high density flasher unit pack (HDFU) secondary device Serial Bus #1 Error The CMU shall cause a FSA when a Type 67, Type 81, or a Type 83 frame has not been received from the ATC for greater than 600 milliseconds. The first and second failures in a 24-hour period shall be a NFSA. The third failure in a 24-hour period shall be a LFSA-R. If a CMU Power Fail resets the LFSA-R, the SB#1 timeout count shall be reset to 2 such that the next SB#1 timeout results in a LFSA-R. An SB#1 timeout failure during the programmed minimum flash time or during a CMU power failure shall not cause a FSA. The SB#1 timeout function shall be disabled if the SB#1 DISABLE input is at a True (Low) state. The SB#1 DISABLE input shall be True when the voltage is less than 8 VDC. The SB#1 DISABLE input shall be False when the voltage is greater than 16 VDC. The SB#1 DISABLE input shall be referenced to VDC GROUND Serial Bus #3 Error The CMU shall cause a FSA when a Type 129 or Type 130 Frame has not been received from each HDSP for greater than 300 milliseconds. The first and second failures in a 24-hour period shall be a NFSA. The third failure in a 24-hour period shall be a LFSA-R. If a CMU power fail resets the LFSA-R, the SB#3 timeout count shall be reset to 2 such that the next SB#3 timeout results in a LFSA-R. A SB#3 timeout failure during the programmed minimum flash time or during a CMU power failure shall not cause a FSA Type 62 Send to Local Flash Command Message If the N bit is set in a Type 62 Send to Local Flash Command message, the CMU shall react by causing a NFSA. The NFSA shall remain until the receipt of a Type 62 Send to Local Flash Command message with the N bit cleared or until the CMU is reset by a unit reset or CMU power fail. The NFSA shall last for the programmed minimum flash time at a minimum. If the L bit is set in a Type 62 Send to Local Flash Command message, the CMU shall react by causing a LFSA. ATC5301v0202_ Page 31

42 Diagnostics Diagnostic Error The CMU shall be provided with a resident series of self-check diagnostic capabilities. The CMU shall contain provisions to verify all memory elements on power-up. When a fault is detected, the LFSA-R shall be set and the DIAGNOSTIC indicator illuminated RAM Diagnostic This test shall verify that all RAM elements are operating correctly at power-up or following a Unit Reset. Patterns shall be written to RAM. Each write shall be followed by a read to verify that it contains the written pattern Nonvolatile Diagnostic This test shall verify that the nonvolatile ROM(s) contain the proper program. The routine shall perform a check on each ROM and make a comparison with a preprogrammed check value. This test shall be performed at power-up and at a minimum rate of 1024 bits per second during operation Serial Memory Key Memory Diagnostic This test shall verify whether the non-volatile serial memory key contains valid data. The routine shall perform a check on each nonvolatile memory element at power-up and whenever read and make a comparison with a preprogrammed check value as described in section The serial memory key not present shall cause a LFSA if the DOOR SWITCH FRONT input is sensed as not active (door closed) Internal MPU Monitor The CMU shall monitor the operation of its microprocessor with an independent circuit. At a minimum, the monitoring circuit shall receive logic state transitions at least once every 50 milliseconds from the microprocessor. When the logic state transition is not received for 500 milliseconds the monitor circuit shall force a LFSA-R and illuminate the DIAGNOSTIC indicator Multiple Input The CMU shall be capable of monitoring for the presence of an active signal on two or more inputs of a channel. When the presence of an active signal on two or more inputs of a channel is detected for less than 200 milliseconds, the CMU shall not cause a LFSA. When the presence of an active signal on two or more inputs to a channel is detected for 450 milliseconds or more, the CMU shall cause a LFSA. When the presence of an active signal on two or more inputs to a channel is detected for more than 200 milliseconds but less than 450 milliseconds, the CMU may or may not cause a LFSA. Multiple Indication monitoring shall be disabled when the MAIN CONTACTOR COIL STATUS input is not active. There shall be programming in the serial ATC5301v0202_ Page 32

43 memory key to disable Multiple Input monitoring on a color combination basis (G+Y, Y+R, G+R) Lack of Signal Inputs The CMU shall be capable of monitoring for the absence of any required signal voltage OR signal load current (CSU) on the inputs of a channel. For voltage purposes a required signal on the Green or Yellow or Red inputs associated with a channel shall be considered as that channel being active. For current purposes, a load current value that exceeds the programmed threshold shall be considered as that output being active. When an absence of an active channel (voltage OR output current) is detected for less than 1200 milliseconds, the CMU shall not cause a LFSA. When an absence of an active channel is detected for 1500 milliseconds or more, the CMU shall cause a LFSA. When an absence of an active channel is detected for more than 1200 milliseconds but less than 1500 milliseconds, the CMU may or may not cause a LFSA. Lack of Signal Input monitoring shall be disabled for all channels when the MAIN CONTACTOR COIL STATUS input is not active. There shall be programming in the serial memory key to disable Lack of Signal Input monitoring on a per channel basis. Lack of Signal Input monitoring shall also be disabled for any channel which has the DARK CHANNEL MAP bit set to "1" in the serial memory key programming for the DARK CHANNEL MAP addressed by the DARK CHANNEL MAP SELECT bits in a Type 81 message Minimum Yellow Clearance The CMU shall verify that the Yellow Change interval is at least 2.7 seconds (±0.1 seconds). When the minimum Yellow Change interval is not satisfied, the CMU shall cause a LFSA. The CMU shall report a Skipped Yellow Clearance when the Yellow Change interval is less than 100 milliseconds. The CMU shall report a Short Yellow Clearance when the Yellow Change interval is less than 2.7 seconds (±0.1 seconds) and greater than 100 milliseconds. Minimum Yellow Change interval monitoring shall be disabled when the MAIN CONTACTOR COIL STATUS input is not active. There shall be programming in the serial memory key to disable Minimum Yellow Change interval monitoring on a per channel basis Minimum Yellow Plus Red Clearance The CMU shall verify that the Yellow Change plus Red Clearance interval between the end of an active GREEN signal and the beginning of the next conflicting GREEN signal is at least 2.7 (±0.1 seconds). When the minimum Yellow Change plus Red Clearance interval is not satisfied, the CMU shall cause a LFSA. Minimum Yellow Change plus Red Clearance monitoring shall be disabled when the MAIN CONTACTOR COIL STATUS input is not active. There shall be programming in the serial ATC5301v0202_ Page 33

44 memory key to disable Minimum Yellow Change plus Red Clearance interval monitoring on a per channel basis Flashing Yellow Arrow A minimum of six Flashing Yellow Arrow channel pairs shall be supported by the CMU. Programming shall be provided in the serial memory key to specify the Overlap channel, Protected Left Turn channel, and the Opposing Thru channel. Any of the 32 CMU channels may be selected for the FYA operation including Virtual channels Local Flash Status The CMU shall monitor the LF STATUS input. When this signal is sensed as not active for greater than 350 milliseconds, the CMU shall cause a NFSA. When this signal is sensed as not active for less than 200 milliseconds, the CMU shall not cause a NFSA Local Flash Status Recovery Recovery from Local Flash Status NFSA shall occur when this signal is sensed as active for greater than 350 milliseconds. When this signal is sensed as active for less than 200 milliseconds, the CMU shall not cause recovery from Local Flash Status NFSA Circuit Breaker Trip Status The CMU shall monitor the CB TRIP STATUS input. When this signal is sensed as not active for greater than 400 milliseconds, the CMU shall cause a LFSA. When this signal is sensed as not active for less than 200 milliseconds, the CMU shall not cause a LFSA Flasher Unit Output Failed The CMU shall monitor the FLASHER 1-1, FLASHER 1-2, FLASHER 2-1 and FLASHER 2-2 voltage states reported by each HDFU. When a transition from the inactive state to the active state or a transition from the active state to the inactive state is absent for greater than 2600 milliseconds, the CMU shall set a status bit in the Type 209 frame. This alarm condition shall not cause a FSA. It should cause the appropriate response in the ATC. This status is non-latching, such that once a status bit has been set, the sensing of five valid transitions of the input shall clear the status bit HDFU Flasher Thresholds For a 2212-HV CMU these inputs shall be considered active when the input voltage exceeds 70 Volts RMS. These inputs shall not be considered active when the input voltage is less than 50 Volts RMS. Signals between 70 Volts RMS and 50 Volts RMS may or may not be considered active. For a 2212-LV CMU these inputs shall be considered active when the input voltage exceeds 44 Volts RMS. These inputs shall not be considered active when the input voltage is less than 40 ATC5301v0202_ Page 34

45 Volts RMS. Signals between 44 Volts RMS and 40 Volts RMS may or may not be considered active CMU Power Failure The CMU shall monitor the HV/LV MAINS POWER inputs (2212-HV pin B30, 2212-LV pin B29) and the NRESET and POWERDOWN cabinet control inputs to determine a CMU power failure response. The POWERDOWN signal in the low state indicates loss of MAINS in the controller unit. A CMU power failure shall cause a NFSA. A model 2212-HV CMU power failure shall be recognized when both the POWERDOWN and NRESET signals are active low for greater than 100 milliseconds or the HV MAINS POWER voltage is less than 82 Volts RMS (±2 Volts RMS) for 700 milliseconds. A model 2212-LV CMU power failure shall be recognized when both the POWERDOWN and NRESET signals are active low for greater than 100 milliseconds or the LV MAINS POWER voltage is less than 42 Volts RMS (±1 Volts RMS) for 700 milliseconds MAINS POWER Level Sense The CMU shall monitor the MAINS POWER input and MAINS POWER inputs reported by each HDSP. For a 2212-HV CMU, when any MAINS POWER voltage is less than 82 Volts RMS (±2 Volts RMS) for greater than 700 milliseconds (±100 milliseconds) the CMU shall cause a NFSA. Once NFSA has been set, the POWERDOWN and NRESET signals shall not be monitored until all MAINS POWER voltages have exceeded 87 Volts RMS (±2 Volts RMS) for 150 milliseconds. For a 2212-LV CMU, when any MAINS POWER voltage is less than 40 Volts RMS (±1 Volts RMS) for greater than 700 milliseconds (±100 milliseconds) the CMU shall cause a NFSA. Once NFSA has been set, the POWERDOWN and NRESET signals shall not be monitored until all MAINS POWER voltages have exceeded 46 Volts RMS (±1 Volts RMS) for 150 milliseconds Power Interruption The CMU shall disable monitoring of the +48 VDC, +24VDC and +12VDC power supply inputs when either the POWERDOWN or NRESET input is in the low state. When the POWERDOWN and NRESET signals are both in the low state the CMU shall cause a NFSA Power Recovery When the POWERDOWN input is high and the NRESET signal goes from low to high the CMU shall begin timing the programmed Minimum Flash Interval. During the Minimum Flash Interval, the CMU shall be in NFSA Power Up Following initial application of MAINS Power voltage, the CMU shall maintain a NFSA until the POWERDOWN input is high and the NRESET signal goes from low to high. The CMU shall ATC5301v0202_ Page 35

46 then begin timing the programmed Minimum Flash Interval. During the Minimum Flash Interval, the CMU shall be in NFSA Minimum Flash Interval The CMU shall be in NFSA during the Minimum Flash Interval. The Minimum Flash Interval shall be programmed in the serial memory key between the limits of 6 seconds to 16 seconds with an incremental adjustment of 1 second. The CMU shall not set a FSA during the Minimum Flash Interval Field Output Check Field Check Fault The CMU shall compare the active states of the field signals with the states reported by the ATC in the Type 81 or Type 67 frame. When a mismatch is detected for less than 1400 milliseconds the CMU shall not cause a LFSA. When a mismatch is detected for 1600 milliseconds or more, the CMU shall cause a LFSA. When a mismatch is detected for more than 1400 milliseconds but less than 1600 milliseconds, the CMU may or may not cause a LFSA. Field Output Check monitoring shall be disabled when the MAIN CONTACTOR COIL STATUS input is not active. There shall be a programming in the serial memory key to disable Field Output Check monitoring on a field input basis Field Check Status The CMU shall compare the active states of the field signals with the states reported by the ATC in the Type 81 or Type 67 frame. When a mismatch is detected while a conflict, lack of signal, or multiple fault is timing, Field Check Status shall be reported with the fault to indicate the faulty channel(s) and color(s). Field Output Check monitoring shall be disabled when the MAIN CONTACTOR COIL STATUS input is not active. There shall be a programming in the serial memory key to disable Field Output Check monitoring on a field input basis CMU Temperature The CMU shall measure the temperature at the CMU and report this value in the Type 182 frame. Temperature accuracy shall be at most ±6 o C over the operating temperature range of the CMU Input Signals There shall be a programming in the serial memory key to disable the Yellow input for each physical channel HV Field Signal Voltage Inputs For Lack of Signal monitoring (see ) A Green or Yellow or Red signal input shall be sensed active when the reported voltage exceeds 70 Volts RMS and shall not be sensed active ATC5301v0202_ Page 36

47 when it is less than 50 Volts RMS. A Green or Yellow or Red signal between 70 Volts RMS and 50 Volts RMS may or may not be sensed active. For all other monitoring functions a Green or Yellow or Red signal input shall be sensed active when the reported voltage exceeds 25 Volts RMS and shall not be sensed active when it is less than 15 Volts RMS. A Green or Yellow or Red signal between 15 Volts RMS and 25 Volts RMS may or may not be sensed active LV Field Signal Voltage Inputs For Lack of Signal monitoring (see ) A Green or Yellow or Red signal input shall be sensed active when the reported voltage exceeds 44 Volts RMS and shall not be sensed active when it is less than 40 Volts RMS. A Green or Yellow or Red signal between 44 Volts RMS and 40 Volts RMS may or may not be sensed active. For all other monitoring functions a Green or Yellow or Red signal input shall be sensed active when the reported voltage exceeds 9 Volts RMS and shall not be sensed active when it is less than 6 Volts RMS. A Green or Yellow or Red signal between 9 Volts RMS and 6 Volts RMS may or may not be sensed active Field Signal Load Current Outputs A Green or Yellow or Red signal output shall be sensed active when the reported output load current exceeds the programmed threshold for that output and shall not be sensed active when the reported load current is less than the programmed threshold. There shall be a programming in the serial memory key to disable Load Current monitoring on an output basis. There shall be a programming in the serial memory key to specify the Load Current Threshold on an output basis Control Signal Inputs Local Flash Status The LF STATUS input shall be internally connected to the CMU Output Relay common pin. This input shall be considered active when the input voltage exceeds 43 Vdc. This input shall not be considered active when the input voltage is less than 39 Vdc. Signals between 43 Vdc and 39 Vdc may or may not be considered active. Operation of the cabinet in AUTO mode shall place 48 Vdc nominal on this input. Operation of the cabinet in FLASH mode shall be open circuit on this input. The CMU shall report the state of this input in the Type 209 and Type 211 frames Main Contactor Coil Status The MAIN CONTACTOR COIL STATUS input shall be connected to the Main Contactor signal bus relay coil. An active signal on this input indicates the signal bus should be powering the switch packs. This input shall be considered active when the input voltage exceeds 43 Vdc. This input shall not be considered active when the input voltage is less than 39 Vdc. Signals ATC5301v0202_ Page 37

48 between 43 Vdc and 39 Vdc may or may not be considered active. The CMU shall report the state of this input in the Type 209 and Type 211 frames Main Contactor Secondary Status The MAIN CONTACTOR SECONDARY STATUS input shall be connected to the output side of the main contactor signal bus relay. The CMU shall report the state of this input in the Type 209 frame. For a 2212-HV CMU, this input shall be considered active when the input voltage exceeds 89 Volts RMS. This input shall not be considered active when the input voltage is less than 70 Volts RMS. For a 2212-LV CMU, this input shall be considered active when the input voltage exceeds 43 Volts RMS. This input shall not be considered active when the input voltage is less than 39 Volts RMS. Signals between 43 Volts RMS and 39 Volts RMS may or may not be considered active FTR Coil Drive Status The FTR COIL DRIVE STATUS input shall be connected to the FTR COIL DRIVE signal in the AC SIGNAL POWER BUS. This input shall be considered active when the input voltage exceeds 43 Vdc. This input shall not be considered active when the input voltage is less than 39 Vdc. Signals between 43 Vdc and 39 Vdc may or may not be considered active. The CMU shall report the state of this input in the Type 209 and Type 211 frames Circuit Breaker (CB) Trip Status The CB TRIP STATUS input shall be connected to the auxiliary switch output of the circuit breaker unit. This input shall be considered active when the input voltage exceeds 43 Vdc. This input shall not be considered active when the input voltage is less than 39 Vdc. Signals between 43 Vdc and 39 Vdc may or may not be considered active. The CMU shall report the state of this input in the Type 209 and Type 211 frames Front/Rear Door Switch The CMU shall monitor the DOOR SWITCH FRONT and DOOR SWITCH REAR inputs. This input shall be considered active when the input voltage exceeds 14 Vdc. This input shall not be considered active when the input voltage is less than 10 Vdc. Signals between 14 Vdc and 10 Vdc may or may not be considered active. The CMU shall report the state of these inputs in the Type 209 and Type 211 frames Monitor Interlock The MONITOR INTERLOCK input shall be connected to VDC GROUND within the CMU CMU Address Inputs The address select input pins ADDRESS 0 and ADDRESS 1 define the Serial Bus #1 address of the CMU. The pins are left open for a logical False, and are connected to VDC GROUND for a logical True. ATC5301v0202_ Page 38

49 6.3.8 Power and Circuit Requirements MAINS Power Table 12: CMU Address Inputs ADDRESS 1 ADDRESS 0 SB#1 Address False False 0x0F False True 0x10 True False 0x11 True True 0x12 The 2212-HV CMU shall be operational over the voltage range of 80 Volts RMS to 135 Volts RMS. Inrush current on HV MAINS shall be less than 3 Amperes peak. The 2212-LV CMU shall be operational over the voltage range of 35 Volts RMS to 60 Volts RMS. Inrush current on LV MAINS shall be less than 7 Amperes peak VDC Power Supply The +24 VDC MONITOR and +12 VDC MONITOR input circuits shall be optically isolated from the MAINS circuitry. The maximum current into the +24 VDC or +12 VDC Monitor inputs over the voltage range of 0 VDC to 30 VDC shall be less than 20 milliamperes Failed State Output Circuit The output relay of the CMU shall have one set of isolated Form A contacts. These relay contacts shall be rated for a minimum of three Amperes at 120 Volts RMS and 100,000 operations. Contact opening/closing time shall be 30 milliseconds or less. The relay coil shall be energized in the no fault state and de-energized in the FSA state Front Panel Indicators All indicators shall be clear LEDs. Clear LEDs shall not depend on a reflector or diffusion as part of its design. Clear LEDs shall only show the die and not appear to be ON when exposed to ambient light. The following indicators shall be provided: Power A green POWER indicator shall illuminate to indicate MAINS voltage is proper. It shall flash at a 2 Hertz rate when the NRESET or POWERDOWN input is low. For the 2212-HV CMU, it shall remain off when the voltage is less than 80 Volts RMS (±2 Volts RMS). For the 2212-LV CMU, it shall remain off when the voltage is less than 35 Volts RMS (±2 Volts RMS). ATC5301v0202_ Page 39

50 VDC Fail A red 48VDC FAIL indicator shall illuminate when the CMU is in FSA as a result of a 48VDC cabinet power supply fault VDC Fail A red 24VDC FAIL indicator shall illuminate when the CMU is in FSA as a result of a 24VDC cabinet power supply fault. The 24VDC FAIL indicator shall flash at a 2 Hertz rate when the 24 VDC monitor function is disabled VDC Fail A red 12VDC FAIL indicator shall illuminate when the CMU is in FSA as a result of a 12VDC cabinet power supply fault Conflict A red CONFLICT indicator shall illuminate when the CMU is in FSA as a result of a Conflicting channels fault Lack of Signal A red LACK OF SIGNAL indicator shall illuminate when the CMU is in FSA as a result of a Lack of Signal Inputs fault Multiple A red MULTIPLE indicator shall illuminate when the CMU is in FSA as a result of a Multiple Inputs fault CU Flash A red CU FLASH indicator shall illuminate when the CMU is in FSA as a result of a Type 62 Send to Local Flash Command from the ATC Local Flash A red LOCAL FLASH indicator shall illuminate when the CMU is in FSA as a result of the LOCAL FLASH STATUS input sensed inactive, or CB TRIP STATUS sensed active Clearance A red CLEARANCE indicator shall illuminate when the CMU is in FSA as a result of a Yellow Clearance or Yellow Plus Red Clearance fault. ATC5301v0202_ Page 40

51 Field Check A red FIELD CHECK indicator shall illuminate when the CMU is in FSA as a result of a field output check fault. The indicator shall flash at a 2 Hertz rate when the CMU is in FSA with field check status as a result of Conflict, Lack of Signal, or Multiple fault SB#1 Error A red SB#1 ERROR indicator shall illuminate when the CMU is in FSA as a result of a Serial Bus #1 fault SB#3 Error A red SB#3 ERROR indicator shall illuminate when the CMU is in FSA as a result of a Serial Bus #3 fault Diagnostic A red DIAGNOSTIC indicator shall illuminate when the CMU is in FSA as a result of a diagnostic fault. The DIAGNOSTIC indicator shall flash at a 4 Hertz rate if the serial memory key is not present and a FSA state does not exist (Front Door open) SB#1 Rx A yellow indicator shall pulse On each time the CMU correctly receives a frame on Serial Bus # SB#3 Rx A yellow indicator shall pulse On each time the CMU correctly receives a frame on Serial Bus #3. ATC5301v0202_ Page 41

52 Mechanical Figure 8: CMU Mechanical Dimensions ATC5301v0202_ Page 42

53 Serial Bus #3 Terminations The Serial Bus #3 RxD+ input shall be terminated on the CMU to the Serial Bus #3 EIA-485 supply voltage through a 560 Ohm resistor. The Serial Bus #3 RxD- input shall be terminated on the CMU to Mains Ground through a 560 Ohm resistor. A 120 Ohm resistor shall be connected on the CMU between RxD+ and RxD-. The CMU Serial Bus #3 TxD drivers shall remain in the mark state with drivers enabled when the CMU is not transmitting a command frame. Note: A 120 Ohm resistor shall be connected between Serial Bus #3 TxD+ and TxD- in the Auxiliary Display Unit (ADU) or on the Serial Bus #3 cable assembly in the last assembly installed in the Serial Bus #3 daisy chain if an ADU is not installed Terminal Port An Ethernet interface and connector shall be provided for interconnecting the CMU to a personal computer or network. The protocol for this Terminal Port is defined by the manufacturers Terminal Port Functions The Ethernet port shall provide support for a static IP and DHCP Client at a minimum. A DHCP single address Server function option shall be provided to facilitate a direct connection to a PC. If a network DHCP Server is discovered on the network then this DHCP Server function shall be automatically disabled. The network settings of the Ethernet port shall be loaded directly from the serial memory key parameters if the download function is enabled Physical The connector shall be mounted on the front panel and shall be an 8-position RJ-45 connector Serial Memory Key The CMU shall have a Datakey tm model KC4210 Keycepticle tm socket or equivalent serial memory key receptacle, which will intermate with the Datakey tm model LCK4000-RED, mounted on the front panel. The CMU shall be provided with a Datakey tm model LCK4000-RED serial memory key or equivalent. The serial memory key shall be rated for 40 to +85 degrees C operation. Note: Datakey tm and Keycepticle tm are registered trademarks of Datakey, Inc Monitor Unit Serial Memory Key Interface The CMU shall not provide the capability to program the serial memory key. Writing to the serial memory key may be accomplished through the use of a serial memory key writer. The serial memory key shall be used by the CMU as a read only device. The 16 bit Frame Check Sequence (FCS) procedure defined in clause of ISO/IEC (E) shall be used to verify the integrity of the read data. Failure to read the serial memory key correctly shall result in LFSA. Interface circuitry to the device shall utilize the LOFO switch on the serial memory key ATC5301v0202_ Page 43

54 socket to ensure the device is removed and inserted with no power applied to the interface pins (i.e. dead socket) Serial Memory Key Data All bytes and bits marked as reserved shall be set to 0. Table 13 CMU Serial Memory Key Data Byte # Contents Description 1 0x20 Serial Memory Key Version (CMU 2212) 2 Ch 1-9,, 1-2 Permissive Programming for channels 1-32: A bit set to 1 programs a channel pair to the permissive state. In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent channels shall be 0. 3 Ch 1-17,, Ch 1-25,, Ch 2-3,, Ch 2-11,, Ch 2-19,, Ch 2-27,, Ch 3-6,, Ch 3-14,, Ch 3-22,, Ch 3-30,, Ch 4-10,, Ch 4-18,, Ch 4-26,, Ch 5-7,, Ch 5-15,, Ch 5-23,, Ch 5-31,, Ch 6-13,, Ch 6-21,, Ch 6-29,, Ch 7-12,, Ch 7-20,, Ch 7-28,, Ch 8-12,, Ch 8-20,, Ch 8-28,, Ch 9-13,, Ch 9-21,, 9-14 Default programming shall be 0. The Contents parameter contains on channel pair per bit position. For example, the contents of byte #5, Ch 2-3,, 1-26, is as follows: b0 = channel pair 1-26 b1 = channel pair 1-27 b2 = channel pair 1-28 b3 = channel pair 1-29 b4 = channel pair 1-30 b5 = channel pair 1-31 b6 = channel pair 1-32 b7 = channel pair 2-3 If b1 is set, then channel 1 is permissive with channel 27. ATC5301v0202_ Page 44

55 Byte # Contents Description 31 Ch 9-29,, Ch 10-15,, Ch 10-23,, Ch 10-31,, Ch 11-18,, Ch 11-26,, Ch 12-14,, Ch 12-22,, Ch 12-30,, Ch 13-19,, Ch 13-27,, Ch 14-17,, Ch 14-25,, Ch 15-16,, Ch 15-24,, Ch 15-32,, Ch 16-24,, Ch 16-32,, Ch 17-25,, Ch 18-19,, Ch 18-27,, Ch 19-22,, Ch 19-30,, Ch 20-26,, Ch 21-23,, Ch 21-31,, Ch 22-29,, Ch 23-28,, Ch 24-28,, Ch 25-29,, Ch 26-31,, Ch 28-30,, Ch 31-32,, Ch 8:1 Lack of Signal Input Enable: 65 Ch 16:9 66 Ch 24:17 67 Ch 32:18 A bit set to 1 enables the Lack of Signal Input monitoring function for that channel. This bit shall be set to 0 for any channel that has an input mapped to a virtual channel. ATC5301v0202_ Page 45

56 Byte # Contents Description In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Dark Channel Map #1 69 Ch 16:9 70 Ch 24:17 71 Ch 32:18 A bit set to 1 disables the Lack of Signal Input monitoring function for that channel. For channels that are set to 0, Lack of Signal Input Enable programming shall determine Lack of Signal Input operation. Default programming shall be Ch 8:1 Dark Channel Map #2 73 Ch 16:9 A bit set to 1 disables the Lack of Signal 74 Ch 24:17 Input monitoring function for that channel. 75 Ch 32:18 For channels that are set to 0, Lack of Signal Input Enable programming shall determine Lack of Signal Input operation. Default programming shall be Ch 8:1 Dark Channel Map #3 77 Ch 16:9 78 Ch 24:17 79 Ch 32:18 A bit set to 1 disables the Lack of Signal Input monitoring function for that channel. For channels that are set to 0, Lack of Signal Input Enable programming shall determine Lack of Signal Input operation. Default programming shall be Ch 8:1 Dark Channel Map #4 81 Ch 16:9 A bit set to 1 disables the Lack of Signal 82 Ch 24:17 Input monitoring function for that channel. 83 Ch 32:18 For channels that are set to 0, Lack of Signal Input Enable programming shall determine Lack of Signal Input operation. Default programming shall be Ch 8:1 GY Multiple Channel Enable: 85 Ch 16:9 86 Ch 24:17 87 Ch 32:18 A bit set to 1 enables the Green/Yellow Multiple Channel monitoring function for that channel. This bit shall be set to 0 for any channel that has had a Green or Yellow input remapped to a virtual channel. In the event the CMU has fewer than 32 channels, ATC5301v0202_ Page 46

57 Byte # Contents Description the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 YR Multiple Channel Enable: 89 Ch 16:9 90 Ch 24:17 91 Ch 32:18 A bit set to 1 enables the Yellow/Red Multiple Channel monitoring function for that channel. This bit shall be set to 0 for any channel that has had a Yellow or Red input remapped to a virtual channel. In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 GR Multiple Channel Enable: 93 Ch 16:9 A bit set to 1 enables the Green/Red 94 Ch 24:17 Multiple Channel monitoring function for 95 Ch 32:18 that channel. This bit shall be set to 0 for any channel that has had a Green or Red input remapped to a virtual channel. In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Minimum Yellow Change Enable: 97 Ch 16:9 98 Ch 24:17 99 Ch 32:18 A bit set to 1 enables the Minimum Yellow Change monitoring function for that channel. In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Minimum Yellow Change Plus Red Clearance 101 Ch 16:9 Enable: 102 Ch 24:17 A bit set to 1 enables the Minimum Yellow 103 Ch 32:18 Change Plus Red monitoring function for that channel. In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Yellow Input Disable: ATC5301v0202_ Page 47

58 Byte # Contents Description 105 Ch 16:9 A bit set to 1 forces the Yellow input to the 106 Ch 24:17 OFF state for that channel. In the event the 107 Ch 32:25 CMU has fewer than 32 physical channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Output Current Sense Enable Red: 109 Ch 16:9 A bit set to 1 enables the Lack of Signal 110 Ch 24:17 current monitoring function for the Red 111 Ch 32:25 Output of the channel. This bit shall be set to 0 for any Red input that has been mapped to a virtual channel. In the event the CMU has fewer than 32 physical channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Output Current Sense Enable Yellow: 113 Ch 16:9 114 Ch 24: Ch 32:25 A bit set to 1 enables the Lack of Signal current monitoring function for the Yellow Output of the channel. This bit shall be set to 0 for any Yellow input that has been mapped to a virtual channel. In the event the CMU has fewer than 32 physical channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Ch 8:1 Output Current Sense Enable Green: 117 Ch 16:9 A bit set to 1 enables the Lack of Signal 118 Ch 24:17 current monitoring function for the Green 119 Ch 32:25 Output of the channel. This bit shall be set to 0 for any Green input that has been mapped to a virtual channel. In the event the CMU has fewer than 32 physical channels, the bit positions corresponding to the nonexistent channels shall be 0. Default programming shall be Channel 1 Red Output Current Sense Threshold 121 Channel 2 ATC5301v0202_ Page 48

59 Byte # Contents Description 122 Channel 3 The threshold value for Red current sense 123 Channel 4 shall be programmed in scaled milliamps. 124 Channel Channel 6 IF Param > Channel 7 Then Current = (Param *16) Channel 8 Else Current = Param 128 Channel 9 If Param > 250 Then Current = > 2200 ma 129 Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel 1 Yellow Output Current Sense Threshold 153 Channel Channel Channel Channel Channel Channel 7 The threshold value for Yellow current sense shall be programmed in scaled milliamps. IF Param >120 Then Current = (Param *16) 1800 Else Current = Param ATC5301v0202_ Page 49

60 Byte # Contents Description 159 Channel 8 If Param > 250 Then Current = > 2200 ma 160 Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel 1 Green Output Current Sense Threshold 185 Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel 12 The threshold value for Green current sense shall be programmed in scaled milliamps. IF Param >120 Then Current = (Param *16) 1800 Else Current = Param If Param > 250 Then Current = > 2200 ma ATC5301v0202_ Page 50

61 Byte # Contents Description 196 Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Channel Red Ch 8:1 Field Output Check Enable: 217 Red Ch 16:9 218 Red Ch 24: Red Ch 32: Yellow Ch 8:1 221 Yellow Ch 16:9 222 Yellow Ch 24: Yellow Ch 32: Green Ch 8:1 225 Green Ch 16:9 226 Green Ch 24: Green Ch 32:25 A bit set to 1 enables the Field Output Check monitoring function for that input. This bit shall be set to 0 for any input that has been remapped to a virtual channel. In the event the CMU has fewer than 32 channels, the bit positions corresponding to the nonexistent inputs shall be 0. Default programming shall be Minimum Flash Time Minimum Flash Time Values of 0 thru 5 shall result in 6 seconds of minimum flash. Maximum value is 15. Default programming shall be Misc Control Misc Control ATC5301v0202_ Page 51

62 Byte # Contents Description b0 = Set to 1 shall enable the +12 VDC Power Supply monitor. b1 = Set to 1 shall enable HDFU #2 b2 = Set to 1 shall enable the +48 VDC Power Supply monitor. b3:b7 = Reserved Default programming shall be 0x Ch 29 Red Virtual Channel Assignment 231 Ch 29 Yellow Channels that have not been assigned shall 232 Ch 29 Green be set to 0. Default programming shall be Ch 30 Red Bits 4:0 specify the physical channel 234 Ch 30 Yellow number (1 to 28) 235 Ch 30 Green Bits 6:5 specify the physical input 236 Ch 31 Red 01 = Red 237 Ch 31 Yellow 10 = Yellow 238 Ch 31 Green 11 = Green 239 Ch 32 Red Bit 7 = reserved 240 Ch 32 Yellow 241 Ch 32 Green 242 Ch 8:1 HDSP Channel Enable 243 Ch 16:9 244 Ch 24: Ch 32:25 246:285 ASCII string 286: x00 ASCII string A bit set to 1 enables the channel monitoring function of the HDSP. This bit shall be set to 0 for any channel that has been disabled or is not installed. Default programming shall be 1. Monitor ID A packed 40 character ID shall be stored in ASCII format. Allowable characters are 020h through 07Eh. If less than 40 characters are used, the unused locations shall be set to 00h. Default programming shall be 00h. User ID A packed 40 character ID shall be stored in ASCII format. Allowable characters are 020h through 07Eh. If less than 40 characters are used, the unused locations shall be set to 00h. Default programming shall be 00h. Ethernet Control b0: 1=DHCP Client Enable ATC5301v0202_ Page 52

63 Byte # Contents Description b1: 1=DHCP Server Enable (if provided) b2:b6 Reserved b7: 1=Enable download from datakey 327 LS octet Ethernet IP Address 328 octet 329 octet 330 MS octet 331 LS octet Ethernet Subnet Mask 332 octet 333 octet 334 MS octet 335 LS octet Ethernet Gateway Address 336 octet 337 octet 338 MS octet 339 Ascii byte #1 Ethernet Host Name (ascii) 340 Ascii byte #2 A computer name can be up to 15 alphanumeric 341 Ascii byte #3 characters with no blank spaces. The name must 342 Ascii byte #4 be unique on the network and can contain the 343 Ascii byte #5 following characters: 344 Ascii byte #6 0-9, A-Z, _, Ascii byte #7 346 Ascii byte #8 Unused characters shall be set to 0x Ascii byte #9 348 Ascii byte # Ascii byte # Ascii byte # Ascii byte # Ascii byte # Ascii byte # FYA Pair #1 FYA OLP Parameters 355 FYA Pair #2 356 FYA Pair #3 357 FYA Pair #4 358 FYA Pair #5 359 FYA Pair #6 b4:b0 = OLP Channel number - 1 b5 = Channel Enable b6 = Flash Rate Detect b7 = Reserved 360 FYA Pair #1 FYA LT Parameters 361 FYA Pair #2 b4:b0 = Green Arrow Channel number ATC5301v0202_ Page 53

64 Byte # Contents Description 362 FYA Pair #3 b5 = Reserved 363 FYA Pair #4 b6 = R&Y Input Enable 364 FYA Pair #5 b7 = Reserved 365 FYA Pair #6 366 FYA Pair #1 FYA OPP Parameters 367 FYA Pair #2 368 FYA Pair #3 369 FYA Pair #4 370 FYA Pair #5 371 FYA Pair #6 b4:b0 = Opposing Thru Channel number b5 = Reserved b6 = Reserved b7 = Reserved 372 0, 1:130 App Specific Buffer Size Decimal byte count of the App Specific Buffer including the Mfg ID. This buffer (if used) shall extend from offset 510 down to the Reserved limit of 373. The first (lowest) two bytes of the buffer shall be the NEMA Mfg ID number. 373:510 0x00 Reserved for future use or App Specific buffer. 511 FCS lsb 16 bit Check Value 512 FCS lsb FCS Polynomial calculation of bytes #1 through # Serial Memory Key Application Specific Buffer A section shall be reserved for CMU parameters that are defined by the CMU manufacturer for application specific functionality outside of this standard. This section shall begin at a serial memory key location specified by App Specific Buffer Size and end at byte 510. If this section is not used by the CMU, then the App Specific Buffer Size parameter shall be set to zero. The first (lowest) two bytes of this buffer shall be the NEMA Manufacturer Specific ID. The manufacturer specific code is a 16 bit binary number. These codes are maintained and issued by NEMA. The intention in placing manufacturer specific codes in the serial memory key parameter buffer that are reserved for manufacturers use is to allow equipment to differentiate between serial memory keys that may contain the same data. (Authorized Engineering Information.) CMU Connector The CMU connector shall be a DIN (64 pin) Header Type. ATC5301v0202_ Page 54

65 CMU Pin Assignments Signal names are with respect to the CMU. Table 14: CMU Connector Pin Assignments Pin # Function Pin # Function A1 +24VDC Monitor B1 Reserved A2 +12VDC Monitor B2 External Test Reset A3 24VDC Ground B3 Serial Bus #1 Disable A4 Monitor Interlock B4 Reserved A5 Address 0 B5 Address 1 A6 Reserved B6 Reserved A7 SB#1 TxData + B7 SB#1 TxData - A8 SB#1 RxData + B8 SB#1 RxData - A9 SB#1 TxClock + B9 SB#1 TxClock - A10 SB#1 RxClock + B10 SB#1 RxClock - A11 Reserved B11 Reserved A12 Reserved B12 Reserved A13 Reserved B13 Reserved A14 Reserved B14 Reserved A15 Line Sync + B15 Line Sync - A16 Nreset + B16 Nreset - A17 PowerDown + B17 PowerDown - A18 SB#3 TxData + B18 SB#3 TxData - A19 SB#3 RxData + B19 SB#3 RxData - A20 SB#3 Clock+ B20 SB#3 Clock- A21 LF Status B21 LF Status A22 Output Relay NO B22 Output Relay NO A23 CB Trip Status B23 Reserved A24 MC Coil Status B24 Reserved A25 MC Secondary Status B25 Reserved A26 FTR Coil Drive Status B26 Reserved A27 Door Switch Front B27 Reserved A28 Door Switch Rear B28 Reserved A29 Reserved B29 LV MAINS Power / +48VDC Monitor A30 Reserved B30 HV MAINS Power A31 Equipment Ground B31 Reserved A32 Reserved B32 MAINS Ground (Neutral) ATC5301v0202_ Page 55

66 Note #1: Output Relay NO is open during FSA (de-energized). Note #2: For the 2212-HV CMU, B30 is the Power pin for AC Line. For the 2212-LV CMU, B29 is the Power pin for 48 VDC. 6.4 Cabinet Power Supply Requirements, High Voltage Versions Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes No No General Sections through provide requirements for the cabinet DC power supplies. Sections , , and describe the requirements for three basic power supplies with different form factors and ratings that conform to these requirements. Because the interface between the cabinet assemblies and power supply is not controlled by this standard, it is not a conformance requirement that these specific power supplies be used in an ATC cabinet AC Line Input The Power Supply shall be powered from AC Line. The AC input voltage range shall be 90 to 270 Vac, 45 to 65 Hz. Power Factor Correction shall be greater than 0.95 at full load. The TFCS s power supplies shall be designed to operate with an average efficiency of 80% or greater at load. Additional power from a DC source is optional. DC power source requirements are not controlled by this standard Input Inrush Current The AC Line input Inrush current at power-up shall be less than 50 Amps maximum at rated full load Outputs The following DC outputs shall be provided: Standard Power Functionality (HV Cabinet) 48 Vdc +/- 2 Vdc at 1 Amp minimum 24 Vdc +/- 2 Vdc at 4 Amps minimum 12 Vdc +/- 1 Vdc at 5 Amps minimum (12 Vdc output is optional) ATC5301v0202_ Page 56

67 High Power DC Functionality (LV Cabinet) 48 Vdc +/- 2 Vdc at 6 Amps minimum 24 Vdc +/- 2 Vdc at 4 Amps minimum Compact Power Functionality 48 Vdc +/- 2 Vdc at 1 Amp minimum 24 Vdc +/- 2 Vdc at 3 Amps minimum Each DC output shall be electrically isolated from AC Mains, Earth Ground, and other DC outputs. Note: The High Power Functionality is intended for ATCC applications that drive 48Vdc signal heads (LV) DC Output Ripple The DC Output Ripple on each output shall be less than 500 mvpp when measured at 20MHz of bandwidth using a 12" twisted pair-wire terminated with a 0.1uf & 47uf capacitor DC Start-up Time The DC outputs shall attain regulated output levels within 1500 milliseconds of applied AC Line voltage of 120 Vac nominal across the operating temperature, input voltage, and input frequency ranges and at rated full load DC Hold-up Time The DC outputs shall maintain regulated output level for a minimum of 50 milliseconds across the operating temperature, input voltage, and input frequency ranges and at rated full load DC Output Connector The type of DC output connector is not controlled by this standard Indicators Indicators shall be provided to indicate each DC output is active and the fuse is intact Mechanical The mechanical form factor of the enclosure is not controlled by this standard Model 2216 Cabinet Power Supply General The model 2216 Cabinet Power Supply is a modular 19 inch rack mounted power supply device providing the DC voltages necessary for operating the ATC Cabinet in the HV mode. The model HV provides a regulated 24VDC output and a regulated 48 Vdc output. The model ATC5301v0202_ Page 57

68 HV model provides a regulated 24 Vdc output, a regulated 48 Vdc output, and a regulated 12 Vdc output option for powering the Input Functionality devices. Power Factor Correction shall be provided. Unless otherwise specified, all model 2216 requirements apply to both model types. The model 2217 Cabinet Power Supply is a card mounted power supply device providing the DC voltages necessary for operating the ATC Cabinet in the HV mode. The model 2217 provides a regulated 24VDC output and a regulated 48 Vdc output. Power Factor Correction shall be provided Mechanical The model 2216 shall be 1U (1.7 ) in height maximum and designed to mount into a 19 inch EIA rack. The maximum depth of the model 2216 shall be less than Inputs The model 2216 shall be powered from AC Line provided by an AC Line cord with NEMA Type 5-15 plug. The input voltage range shall be 80 to 270 Vac, 45 to 65 Hz. Power Factor Correction shall be greater than 0.95 at full load Input Inrush Current The AC Line input Inrush current at power-up shall be less than 20 Amps maximum at rated full load Outputs Model The model shall provide: 48 Vdc +/- 2 Vdc at 1 Amp maximum 24 Vdc +/- 2 Vdc at 5 Amps maximum Each DC output shall be electrically isolated from AC Mains, Earth Ground, and other DC outputs. Fans shall not be used for cooling Model The model shall provide: 48 Vdc +/- 2 Vdc at 1 Amp maximum 24 Vdc +/- 2 Vdc at 4 Amps maximum 12 Vdc +/- 1 Vdc at 5 Amps maximum Each DC output shall be electrically isolated from AC Mains and Earth Ground. The 24 Vdc and 12 Vdc outputs share a common ground. Fans shall not be used for cooling. ATC5301v0202_ Page 58

69 DC Output Ripple The DC Output Ripple on each output shall be less than 300 mvpp when measured at 20MHz of bandwidth using a 12" twisted pair-wire terminated with a 0.1uf & 47uf capacitor DC Start-up Time The DC outputs shall attain regulated output levels within 1000 milliseconds of applied AC Line voltage of 110 Vac nominal across the operating temperature, input voltage, and input frequency ranges and at rated full load DC Hold-up Time The DC outputs shall maintain regulated output level for a minimum of 50 milliseconds across the operating temperature, input voltage, and input frequency ranges and at rated full load Front Panel Indicators All indicators shall be clear LEDs. Clear LEDs shall not depend on a reflector or diffusion as part of its design. Clear LEDs shall not appear to be ON when exposed to ambient light. The following indicators shall be provided: AC Line A green AC Line indicator shall illuminate to indicate Operational input voltage is proper and the AC Line fuse is intact VDC A green indicator shall illuminate to indicate the 48 VDC output is active and the fuse is intact VDC A green indicator shall illuminate to indicate the 24 VDC output is active and the fuse is intact VDC (model Only) A green indicator shall illuminate to indicate the 12 VDC output is active and the fuse is intact DC Voltage Test Jacks Banana style test jacks shall be provided on the front panel for each DC output and DC ground. Mating banana plug spring width shall be inches nominal DC Output Connector The output connector is a Phoenix Contact # and mates with a Phoenix Contact # or equivalent. Pin #1 is the right most pin when viewed from the rear of the supply. ATC5301v0202_ Page 59

70 Table 15: Power Supply DC Output Connector Pin Function 1 +48VDC 2 48VDC Ground** 3 +24VDC 4 +12VDC (PS only) 5 24/12 VDC Ground 6 Chassis Ground **Note that the 48 VDC output shall be electrically isolated from the AC Line input and the 24VDC and 12 VDC outputs. The 48VDC Ground (pin #2) shall be connected within the cabinet to the same MAINS Ground (Neutral) that the Cabinet Monitor Unit (CMU pin B32) is connected to Model 2217 Cabinet Power Supply General The model 2217 Cabinet Power Supply is a card mounted power supply device providing the DC voltages necessary for operating the ATC Cabinet in the HV mode. The model 2217 provides a regulated 24VDC output and a regulated 48 Vdc output. Power Factor Correction shall be provided Inputs The model 2217 shall be powered from AC Line. The input voltage range shall be 80 to 270 Vac, 45 to 65 Hz. Power Factor Correction shall be greater than 0.95 at full load Input Inrush Current The AC Line input Inrush current at power-up shall be less than 20 Amps maximum at rated full load Outputs The model 2217 shall provide: 48 Vdc +/- 2 Vdc at 1 Amp maximum 24 Vdc +/- 2 Vdc at 3 Amps maximum Each DC output shall be electrically isolated from AC Mains, Earth Ground, and other DC outputs. Fans shall not be used for cooling. ATC5301v0202_ Page 60

71 DC Output Ripple The DC Output Ripple on each output shall be less than 300 mvpp when measured at 20MHz of bandwidth using a 12" twisted pair-wire terminated with a 0.1uf & 47uf capacitor DC Start-up Time The DC outputs shall attain regulated output levels within 1000 milliseconds of applied AC Line voltage of 110 Vac nominal across the operating temperature, input voltage, and input frequency ranges and at rated full load DC Hold-up Time The DC outputs shall maintain regulated output level for a minimum of 50 milliseconds across the operating temperature, input voltage, and input frequency ranges and at rated full load Front Panel Indicators All indicators shall be clear LEDs. Clear LEDs shall not depend on a reflector or diffusion as part of its design. Clear LEDs shall not appear to be ON when exposed to ambient light. The following indicators shall be provided: AC Line A green AC Line indicator shall illuminate to indicate Operational input voltage is proper and the AC Line fuse is intact VDC A green indicator shall illuminate to indicate the 48 VDC output is active and the fuse is intact VDC A green indicator shall illuminate to indicate the 24 VDC output is active and the fuse is intact. ATC5301v0202_ Page 61

72 Mechanical PS2217 Connector Figure 9: Model 2217 Mechanical Dimensions The connector on the model 2217 shall a Phoenix # or equivalent. The mating connector on the rack is a Phoenix # or equivalent. Pin #1 is the right most pin when viewed from the rear of the power supply. See Table 16. Table 16: Model 2217 Power Supply Connector Pin Function 1 Chassis Ground 2 AC- Neutral 3 AC+ Power 4 24VDC Ground 5 +24VDC Output 6 48VDC Ground** 7 +48VDC Output ATC5301v0202_ Page 62

73 **Note that the 48 VDC output shall be electrically isolated from the AC Line input and the 24VDC output. The 48VDC Ground (pin #6) shall be connected within the cabinet to the same MAINS Ground (Neutral) that the Cabinet Monitor Unit (CMU pin B32) is connected to Model 2248 Cabinet Power Supply General The model 2248 Cabinet Power Supply is a modular 19 inch rack mounted power supply device providing the DC voltages necessary for operating the ATC Low Voltage (LV) Cabinet. The model 2248 provides a regulated 24Vdc output and a regulated 48 Vdc output, and is intended to provide 48 Vdc power to the Output Functionality components and DC based signal lamps Mechanical The model 2248 shall be 1U (1.7 ) in height maximum and designed to mount into a 19 inch EIA rack. The maximum depth of the model 2248 shall be less than Inputs The model 2248 shall be powered from AC Line provided by an AC Line cord with NEMA Type 5-15 plug. The input voltage range shall be 80 to 270 Vac, 45 to 65 Hz. Power Factor Correction shall be greater than 0.95 at full load Input Inrush Current The AC Line input Inrush current at power-up shall be less than 50 Amps maximum at rated full load Outputs The model 2248 shall provide: 48 Vdc +/- 2 Vdc at 6 Amp maximum 24 Vdc +/- 2 Vdc at 4 Amps maximum Each DC output shall be electrically isolated from AC Mains, Earth Ground, and other DC outputs. Fans shall not be used for cooling DC Output Ripple The DC Output Ripple on each output shall be less than 500 mvpp when measured at 20MHz of bandwidth using a 12" twisted pair-wire terminated with a 0.1uf & 47uf capacitor DC Start-up Time The DC outputs shall attain regulated output levels within 1000 milliseconds of applied AC Line voltage of 110 Vac nominal across the operating temperature, input voltage, and input frequency ranges and at rated full load. ATC5301v0202_ Page 63

74 DC Hold-up Time The DC outputs shall maintain regulated output level for a minimum of 50 milliseconds across the operating temperature, input voltage, and input frequency ranges and at rated full load Front Panel Indicators All indicators shall be clear LEDs. Clear LEDs shall not depend on a reflector or diffusion as part of its design. Clear LEDs shall not appear to be ON when exposed to ambient light. The following indicators shall be provided: AC Line A green AC Line indicator shall illuminate to indicate Operational input voltage is proper and the AC Line fuse is intact VDC A green indicator shall illuminate to indicate the 48 VDC output is active and the fuse is intact VDC A green indicator shall illuminate to indicate the 24 VDC output is active and the fuse is intact DC Voltage Test Jacks Banana style test jacks shall be provided on the front panel for each DC output and DC ground. Mating banana plug spring width shall be inches nominal DC Output Connector The output connector is a Phoenix Contact # and mates with a Phoenix Contact # or equivalent. Pin #1 is the right most pin when viewed from the rear of the supply. See Table 18. Table 17: Power Supply DC Output Connector Pin Function 1 +48VDC 2 48VDC Ground** 3 +24VDC 4 Reserved 5 24VDC Ground 6 Chassis Ground ATC5301v0202_ Page 64

75 **Note that the 48 VDC output shall be electrically isolated from the AC Line input and the 24VDC output. The 48VDC Ground (pin #2) shall be connected within the cabinet to the same MAINS Ground (Neutral) that the Cabinet Monitor Unit (CMU pin B32) is connected to. 6.5 Model 2220 Auxiliary Display Unit Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes No No General The Auxiliary Display Unit (ADU) is a modular display that provides an enhanced user interface for the ATC Cabinet Monitor Unit system. The ADU shall not be required in the cabinet for the 2212 CMU to operate. The model 2220 provides a display function in a modular fashion for the installed cabinet monitor unit and utilizes an LED based channel output status display and a menu driven LCD display to view status, configuration, and logs. Five buttons are included to navigate the menu system. The CMU communicates to the model 2220 via Serial Bus #3 (SB#3). Guidance: The Auxillary Display Unit is an optional assembly for the ATC Cabinet. Mechanical dimensions as well as connector type and pin assignments are not controlled by the standard. The following section, defining the Model 2220 Auxillary Display Unit, is one example of how the user interface for the Cabinet Monitor Unit can be realized. The display data shall be created and formatted by the installed 2212 CMU Mechanical The model 2220 shall be 1U (1.7 ) in height maximum and designed to mount into a 19 inch EIA rack. The maximum depth of the model 2220 shall be less than Power Connector The 48VDC power is supplied with a Phoenix Contact 3-pin header , with a mating harness plug part number Pin #1 is the rightmost pin when viewed from the connector end (back side of the ADU). Table 18: ADU Power Connector Signals Pin Function 1 +48VDC 2 48VDC Ground** 3 Earth Ground ATC5301v0202_ Page 65

76 **The 48VDC Ground (pin #2) must be connected within the cabinet to the same MAINS GROUND of the Cabinet Monitor Unit (CMU pin B32) SB#3 Connector This port provides the EIA-485 data path to the CMU Cabinet Monitor Unit (CMU) using SB#3. A temperature rated cable assembly meeting CAT5 performance characteristics at a minimum with modular 8p8c connectors shall be used to make the connection. The cable ends shall be terminated per EIA/TIA-586B to maintain signal integrity. Cable and connectors shall meet the temperature rating of The signals shall be MAINS GROUND referenced, which is the same Ground point as the CMU2212. Signal names are with respect to the model Power Table 19: ADU SB#3 Signals Pin Function 1 Reserved 2 Reserved 3 Ground (MAINS GROUND / 48VDC GROUND) 4 RxDATA + 5 RxDATA - 6 Ground (MAINS GROUND / 48VDC GROUND) 7 TxDATA + 8 TxDATA - The model 2220 shall be powered from the cabinet 48 Vdc supply. Input voltage operating range shall be 22.0 Vdc minimum to 60.0 Vdc maximum. The model 2220 input voltage shall be referenced to the cabinet 48 Vdc supply Ground (CMU2212 MAINS GROUND) Front Panel Indicators All indicators shall be clear LEDs. Clear LEDs shall not depend on a reflector or diffusion as part of its design. Clear LEDs shall not appear to be ON when exposed to ambient light. The following indicators shall be provided: Channel Status The model 2220 shall provide 32 columns of LED indicators corresponding to channels 1 through 32. Each column shall be composed of a blue status indicator, a red status indicator, a yellow status indicator, and a green status indicator. ATC5301v0202_ Page 66

77 CMU Status A four row by 20 column LCD display shall be provided for displaying data from the CMU2212. The LCD shall provide a backlight function and operate over the full cabinet temperature range. A heater shall be provided to meet the temperature requirement SB#3 RxD A yellow indicator shall pulse On each time the model 2220 correctly receives a frame on SB#3 from the CMU Front Panel Controls Five buttons shall be provided to navigate the CMU status display menu. The buttons shall be labeled HELP, NEXT, BACK, SEL, and EXIT. 6.6 Sensor Unit Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes Yes Yes General The Sensor Unit functions as an input device used to sense field status conditions such as: NEMA 2-Channel Inductive Loop Detector with (2) Outputs and (2) Status NEMA 4-Channel Inductive Loop Detector with (4) Outputs and (4) Status Type 222 Inductive Loop Detector with (2) channels without Status Type 224 Inductive Loop Detector with (4) channels without Status Type 242L DC Isolator with (2) channels and (2) Status Type 244L DC Isolator with (4) channels and (4) Status Preemptor Form Factor Sensor Unit form factor shall conform to NEMA TS2 standard, Section (see Figures 6-4, 6-5), for both 2 channel and 4 channel form factors Connector and Pin Assignments Sensor Unit connector and pin assignments shall conform to NEMA TS2 standard Section (see Table 6-2) for NEMA 4-Channel Inductive Loop Detector with four Outputs and four Status without INBUS. ATC5301v0202_ Page 67

78 For other Sensor Units listed in above, the Loop connector pins shall be used for field wire inputs according to the sensor product specifications. 7 SLOTS Slots include mechanical mounting hardware and electrical connectors necessary to house interchangeable modules. 7.1 Serial Interface Unit Slot Standardization Level Description Controlled by Standard? Interface Signal Names and Electrical Yes Characteristics Connector Type and Pin Assignments Yes Mechanical Dimensions Yes General The Serial Interface Unit Slot functions to mechanically mount and to electrically connect the Serial Interface Unit (SIU2218) Form Factor The model 2218 Slot Form Factor shall mechanically and electrically accommodate the model 2218 as shown: Figure 10: Model 2218 Slot Mechanical Details ATC5301v0202_ Page 68

79 The model 2218 Slot shall be capable of being mounted in a EIA mm (19 in.) rack (EIA Standard RS-310) and shall not exceed mm (6.0 in.) in height and have a maximum depth of mm (8.50 in.). Tolerance is ± 0.51 mm in0 unless otherwise noted. Connector is centered vertically between card guides. Distance between card guide channel surfaces is 4.52" ± 0.02". Refer to model 2218 section of this standard for horizontal dimension from card guide centerline to centerline of model 2218 circuit board Connector and Pin Assignments Refer to model 2218 section of this standard for mating connector type, orientation, and pin assignments 7.2 Cabinet Monitor Unit Slot Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes Yes Yes General Cabinet Monitor Unit Slot functions to mechanically mount and to electrically connect the Cabinet Monitor Unit (CMU2212) Form Factor CMU2212 Slot Form Factor shall mechanically and electrically accommodate the CMU2212 as shown: Figure 11: CMU Slot Mechanical Details ATC5301v0202_ Page 69

80 1. Refer to CMU2212 section of this standard for horizontal dimension from card guide centerline to centerline of CMU2212 circuit board. 2. CMU is centered vertically between card guides 3. Distance between card guide channel surfaces is 4.31 ± Tolerance ± 0.51 mm (0.02 in) unless otherwise noted Connector and Pin Assignments Refer to CMU2212 section of this standard for connector pin assignments 7.3 IN Slot Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes Yes Yes General IN Slot functions to mechanically mount and to electrically connect the Sensor Units Form Factor Figure 12: IN Slot Mechanical Details ATC5301v0202_ Page 70

81 The IN Slot shall be capable of being mounted in a EIA mm (19 in.) rack (EIA Standard RS-310. It shall have a maximum depth of mm (8.50 in.) and shall not exceed mm (6.0 in.) in height for shelf mount or mm (5.25 in) (3U) for rack mount. The IN Slot shall provide a 44 terminal, double row, mm (0.156 in.) contact spacing, Cinch Jones card edge connector 50-44A-30M, or equivalent centered vertically for each Sensor module. Detector is centered vertically between card guides. Distance between channel surfaces of card guides is 4.52" ± Tolerance is ± 0.51 mm (0.02 in) unless otherwise noted Connector and Pin Assignments Refer to Sensor section of this standard for connector orientation and pin assignments. 7.4 OUT Slot Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Type and Pin Assignments Mechanical Dimensions Controlled by Standard? Yes Yes Yes General OUT Slot functions to mechanically mount and to electrically connect the 2202 HDSP/FU High Density Switch Pack and Flasher Unit Form Factor OUT Slot Form Factor shall mechanically and electrically accommodate the output devices as shown: Figure 13: OUT Slot Mechanical Details ATC5301v0202_ Page 71

82 The connector shall be centered vertically between card guides. The distance between card guide channel surfaces is 4.52" ± 0.02". The tolerance is ± 0.51 mm (0.02 in) unless otherwise noted. The OUT Slot shall be capable of being shelf mounted or mounted in an EIA mm (19 in.) rack (EIA Standard RS-310). It shall have a maximum depth of mm (8.50 in.) and shall not exceed mm (6.0 in.) in height for shelf mount or mm (5.25 in) (3U) for rack mount. The OUT Slot shall provide a mating connector to DIN Type E series, 48-pin for each HDSP/FU module. Connector shall be positioned to mate with the HDSP/FU as detailed in that section Connector and Pin Assignments Refer to Model 2202 HDSP/FU section of this standard for mating connector type, orientation and pin assignments. Support for HDFU pins Channel 1 AUX (In, Sense, Out) and Channel 2 AUX (In, Sense, Out) is optional. 8 INTERFACES Interfaces interconnect system elements shown in the Block Diagrams. 8.1 SIU IN Interface Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments of SIU Slot and IN Slot Mechanical Dimensions of the interface from SIU Slot and IN Slots Controlled by Standard? Yes Yes No General The SIU IN interface functions to electrically connect the IN SLOT connectors to the SIU connectors Form Factor SIU IN mechanical connection from SIU to Sensor Slots is not controlled by this standard Input SIU 1 Pin Assignments Detector functions for channels shall be assigned to Input SIU 2 through 5 in the same sequence as shown in Table 20. Channel 1 and Channel 2 shall be located in Slot #1 and increment sequentially. Signal names are with respect to the Controller Unit. ATC5301v0202_ Page 72

83 The Detector Reset outputs shall be connected to pin C of both assigned slots to provide for a two channel or four channel detector reset function. Table 20: INPUT SIU 1 to IN SLOT Signal Mapping INPUT SIU 1 Row A Row B Row C Pin# Pin Name Function Pin Name Function Pin Name Function 1 +24V POWER +24V POWER IO 47 CHANNEL 18 STATUS 2 IO 0 CHANNEL1-4 RESET IO 1 CHANNEL 5-8 RESET IO 48 CHANNEL 19 STATUS 3 IO 2 CHANNEL9-12 RESET IO 3 CHANNEL13-16 RESET IO 49 CHANNEL 20 STATUS 4 IO 4 CHANNEL17-20 RESET IO 5 CHANNEL RESET IO 50 CHANNEL 21 STATUS 5 IO 6 CHANNEL 1 OUT IO 7 CHANNEL 2 OUT IO 51 CHANNEL 22 STATUS 6 IO 8 CHANNEL 3 OUT IO 9 CHANNEL 4 OUT IO 52 CHANNEL 23 STATUS 7 IO 10 CHANNEL 5 OUT IO 11 CHANNEL 6 OUT IO 53 CHANNEL 24 STATUS 8 IO 12 CHANNEL 7 OUT IO 13 CHANNEL 8 OUT SB#1 RXD+ 9 IO 14 CHANNEL 9 OUT IO 15 CHANNEL 10 OUT SB#1 RXD- 10 IO 16 CHANNEL 11 OUT IO 17 CHANNEL 12 OUT SB#1 TXD+ 11 IO 18 CHANNEL 13 OUT IO 19 CHANNEL 14 OUT SB#1 TXD- 12 IO 20 CHANNEL 15 OUT IO 21 CHANNEL 16 OUT SB#1 RXC+ 13 IO 22 CHANNEL 17 OUT IO 23 CHANNEL 18 OUT SB#1 RXC- 14 IO 24 CHANNEL 19 OUT IO 25 CHANNEL 20 OUT SB#1 TXC+ 15 IO 26 CHANNEL 21 OUT IO 27 CHANNEL 22 OUT SB#1 TXC- 16 IO 28 CHANNEL 23 OUT IO 29 CHANNEL 24 OUT LSYNC+ 17 IO 30 CHANNEL 1 STATUS IO 31 CHANNEL 2 STATUS LSYNC- 18 IO 32 CHANNEL 3 STATUS IO 33 CHANNEL 4 STATUS NRESET+ 19 IO 34 CHANNEL 5 STATUS IO 35 CHANNEL 6 STATUS NRESET- 20 IO 36 CHANNEL 7 STATUS IO 37 CHANNEL 8 STATUS ASSY ADR 21 IO 38 CHANNEL 9 STATUS IO 39 CHANNEL 10 STATUS INBUS RTS 22 IO 40 CHANNEL 11 STATUS IO 41 CHANNEL 12 STATUS SB#2 RXD+ 23 IO 42 CHANNEL 13 STATUS IO 43 CHANNEL 14 STATUS SB#2 RXD- 24 IO 44 CHANNEL 15 STATUS IO 45 CHANNEL 16 STATUS SB#2 TXD+ 25 IO 46 CHANNEL 17 STATUS OPTO IN 1 PED1 SB#2 TXD- 26 OPTO IN 2 PED2 OPTO IN 3 PED3 SB#2 RXC+ 27 OPTO IN 4 PED4 OPTO GND PED GND SB#2 RXC- 28 ADR 0 ADR 1 SB#2 TXC+ 29 ADR 2 ADR 3 SB#2 TXC- 30 INBUS TXD INBUS RXD INBUS TXC 31 EQGND AC LINE REF INBUS RXC 32 DCGND2 DCGND2 DCGND2 ATC5301v0202_ Page 73

84 SIU OUT Interface Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments of SIU Slot and OUT Slot Mechanical Dimensions of the interface from SIU Out to OUT Slot Controlled by Standard? Yes Yes No General The SIU OUT interface functions to electrically connect the OUT SLOT connectors to the SIU connectors Form Factor The mechanical form factor of the OUT SLOT interface to the 2202 HDSP/FU is not controlled by this standard Connector Pin Assignments HDSP functions for channels shall be assigned to Output SIU 2 in the same sequence as shown in Table 22. Control and SB#1 signal names are with respect to the Controller Unit. Table 21: First Output SIU Opto Assignments Pin First Output Functionality Housing Type Opto Input 1 Manual Control Enable All (MCE) Opto Input 2 Interval Advance (IA) All Opto Input 3 Stop Time (STOPTIME) All Opto Input 4 Manual Flash (FLASH) All Opto Input Common 48VDC All Table 22: Output SIU 1 to OUT SLOT Signal Mapping Switch Pack SP1- SP8 Row A Row B Row C Pi Pin Name Switch Pack Pin Name Switch Pack Pin Name Switch Pack n 1 +24V +24V IO 47 SP8 CH2 RED 2 IO 0 SP1 CH1 RED IO 1 SP1 CH1 YEL IO 48 SP8 CH2 YEL 3 IO 2 SP1 CH1 GRN IO 3 SP1 CH2 RED IO 49 SP8 CH2 GRN 4 IO 4 SP1 CH2 YEL IO 5 SP1 CH2 GRN IO 50 ATC5301v0202_ Page 74

85 Switch Pack SP1- SP8 Row A Row B Row C Pi Pin Name Switch Pack Pin Name Switch Pack Pin Name Switch Pack n 5 IO 6 SP2 CH1 IO 7 SP2 CH1 IO 51 RED YEL 6 IO 8 SP2 CH1 IO 9 SP2 CH2 IO 52 GRN RED 7 IO 10 SP2 CH2 IO 11 SP2 CH2 IO 53 YEL GRN 8 IO 12 SP3 CH1 RED IO 13 SP3 CH1 YEL SB#1 RXD+ 9 IO 14 SP3 CH1 GRN IO 15 SP3 CH2 RED SB#1 RXD- 10 IO 16 SP3 CH2 YEL IO 17 SP3 CH2 GRN SB#1 TXD+ 11 IO 18 SP4 CH1 RED IO 19 SP4 CH1 YEL SB#1 TXD- 12 IO 20 SP4 CH1 GRN IO 21 SP4 CH2 RED SB#1 RXC+ 13 IO 22 SP4 CH2 YEL IO 23 SP4 CH2 GRN SB#1 RXC- 14 IO 24 SP5 CH1 RED IO 25 SP5 CH1 YEL SB#1 TXC+ 15 IO 26 SP5 CH1 GRN IO 27 SP5 CH2 RED SB#1 TXC- 16 IO 28 SP5 CH2 IO 29 SP5 CH2 LSYNC+ YEL GRN 17 IO 30 SP6 CH1 IO 31 SP6 CH1 LSYNC- RED YEL 18 IO 32 SP6 CH1 IO 33 SP6 CH2 NRESET+ GRN RED 19 IO 34 SP6 CH2 IO 35 SP6 CH2 NRESET- YEL GRN 20 IO 36 SP7 CH1 RED IO 37 SP7 CH1 YEL ASSY ADR 21 IO 38 SP7 CH1 GRN IO 39 SP7 CH2 RED INBUS RTS 22 IO 40 SP7 CH2 YEL IO 41 SP7 CH2 GRN SB#2 RXD+ 23 IO 42 SP8 CH1 RED IO 43 SP8 CH1 YEL SB#2 RXD- 24 IO 44 SP8 CH1 GRN IO SB#2 TXD+ ATC5301v0202_ Page 75

86 Switch Pack SP1- SP8 Row A Row B Row C Pi Pin Name Switch Pack Pin Name Switch Pack Pin Name Switch Pack n 25 IO OPTO IN 1 MCE SB#2 TXD- 26 OPTO IN 2 INTER ADV OPTO IN 3 STOP TIME SB#2 RXC+ 27 OPTO IN 4 LOC FLASH OPTO GND FACIL GND SB#2 RXC- 28 ADR 0 ADR 1 SB#2 TXC+ 29 ADR 2 ADR 3 SB#2 TXC- 30 INBUS TXD INBUS RXD INBUS TXC 31 EQGND AC LINE REF INBUS RXC 32 DCGND2 DCGND2 DCGND2 8.2 SB#1 / SB#2 Interface Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments Mechanical Dimensions of the interface from model 2218 to Controller Unit Controlled by Standard? Yes Yes No General Serial Bus 1 Serial Bus #1 (SB#1) communicates real-time information required to operate the system. It handles the highest priority, time-sensitive data exchange between the SIUs in the input and output functionalities, controller unit and the CMU. SB#1 is designed for a communications rate of 614,400 bits per second Serial Bus 2 Serial Bus #2 (SB#2) communicates less time critical information between the Controller Unit and sensors in the input functionalities. An example might be to us NEMA TS2 Port1 protocol on SB#2 to communicate with NEMA TS2 devices. Serial bus 2 is designed for an allowable communications rate of up to 614,400 bits per second. ATC5301v0202_ Page 76

87 Terminator Unit An SB#1 and SB#2 terminator unit shall be provided. There are two acceptable methods for implementing termination. Method #1 is accomplished by installing the terminator unit into the DC POWER / COMMUNICATIONS ASSEMBLY DB25S End Connector if that functionality is provided in the cabinet. Method #2 is accomplished by installing the termination unit into the "THROUGH" connector of the last assembly connected to the SB#1 / SB#2 serial chain when a serial "Daisy Chain" method, consisting of "IN" and "THROUGH" on each assembly is used. In either method the terminator unit should be installed at the furthest end of the communications cable from the ATC. The source of +5VDC and Ground for powering the termination bias resistors shall be derived from Pins 12 and 13, respectively, of the SB#1 / SB#2, 25-pin, D-Sub connector. The terminator unit shall provide a 150 ohm termination resistor between the RxD+ and RxD-, the TxD+ and TxD-, the RxC+ and RxC-, and the TxC+ and TxC- pairs for both serial bus #1 and serial bus #2. The terminator unit shall also provide 1K ohm DC bias resistors from +5VDC ISO to the RxD+, the RxC+, the TxD+, and the TxC+ of both SB#1 and SB#2. The terminator unit shall provide 1K ohm DC bias resistors from ISO GND to the RxD-, the RxC-, the TxD-, and the TxC- of both SB#1 and SB#2. See Figure Form Factor SB#1 and SB#2 are included in one SB#1 / SB#2 physical interface consisting of a single communications cable terminated by a male 25 pin D connector at one end. Connector shall include two 4-40 male screw locks. Cable wiring shall be per Table 23. Cable type and destination connector is not controlled by the standard, but at a minimum must be CAT-5 compliant to carry EIA-485 balanced differential signals at 614,400 bits per second. See Figure 14. Figure 14: SB#1/SB#2 Communications Interface Form Factor ATC5301v0202_ Page 77

88 Figure 15: SB#1 / SB#2 Terminator Unit ATC5301v0202_ Page 78

89 The R3 value is selected to match the bus characteristic impedance. The value shown for R3 is selected to match characteristic impedance of the transmission line used. Proper selection is verified by the signal waveform measured as being critically-damped without reflections. The R1 = R2 value is selected to bias the receivers to MARK state when not driven Connector Pin Assignment Electrical Table 23: SB#1 / SB#2 Connector Pin Assignment Pin AT the CU AT the SIU AT the CMU 1 SB#1 TxD+ SB#1 RxD+ SB#1 RxD+ 2 SB#1 RxD+ SB#1 TxD+ SB#1 TxD+ 3 SB#1 TxC+ SB#1 RxC+ SB#1 RxC+ 4 SB#1 RxC+ SB#1 TxC+ SB#1 TxC+ 5 SB#2 TxD+ SB#2 RxD+ SB#2 RxD+ 6 SB#2 RxD+ SB#2 TxD+ SB#2 TxD+ 7 SB#2 TxC+ SB#2 RxC+ SB#2 RxC+ 8 SB#2 RxC+ SB#2 TxC+ SB#2 TxC+ 9 LINE SYNC+ LINE LINE SYNC+ SYNC+ 10 NRESET+ NRESET+ NRESET+ 11 POWER DOWN+ -- POWER DOWN VDC ISO ISO GND SB#1 TxD- SB#1 RxD- SB#1 RxD- 15 SB#1 RxD- SB#1 TxD- SB#1 TxD- 16 SB#1 TxC- SB#1 RxC- SB#1 RxC- 17 SB#1 RxC- SB#1 TxC- SB#1 TxC- 18 SB#2 TxD- SB#2 RxD- SB#2 RxD- 19 SB#2 RxD- SB#2 TxD- SB#2 TxD- 20 SB#2 TxC- SB#2 RxC- SB#2 RxC- 21 SB#2 RxC- SB#2 TxC- SB#2 TxC- 22 LINE SYNC- LINE LINE SYNC- SYNC- 23 NRESET- NRESET- NRESET- 24 POWER DOWN- -- POWER DOWN- 25 EQ GND -- SB#1 / SB#2 Interface shall consist of the following interface links conforming to the requirements of the Electronic Industries Association EIA-485 Standard for Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems, dated April 1983: ATC5301v0202_ Page 79

90 SB#1 of two interface links (SB#1 TXD ± and SB#1 RXD ±) SB#2 of two interface links (SB#2 TXD ± and SB#2 RXD ±) LINE SYNC of one interface link (LINE SYNC ±) NRESET of one interface link (NRESET ±) POWER DOWN of one interface link (POWERDOWN ±) Where differences occur between the EIA-485 standard and this document, this document shall govern SB#1 / SB#2 Interface shall also include the following power conductors: +5 VDC ISO positive bias for Terminator Unit depicted in Figure 5 ISO GND negative bias for Terminator Unit depicted in Figure 5 EQ GND Equipment Ground 8.3 SB#3 Interface Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments Mechanical Dimensions of the interface from CMU to HDSP/FU Controlled by Standard? Yes Yes No General The 2202 HDSP/FU and ADU shall respond to serial data frames transmitted by the CMU2212 on the Serial Bus #3 (SB#3) SB#3 Terminations No termination loads shall be provided by the 2202 HDSP/FU. Serial Bus #3 termination is provided by the CMU2212 (CMU RXD) and the model 2220 ADU (CMU TXD) if installed. A 120 ohm resistor shall be provided in the model 2220 ADU between RxD+ and RxD SB#3 Electrical The SB#3 shall consist of two interface links (TXD ± and RXD ±) conforming to the requirements of the Electronic Industries Association EIA-485, Standard for Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems, dated April Where differences occur between the EIA-485 standard and this document, this document shall govern. SB#3 RXD ± shall be inputs to the 2202 HDSP/FU and ADU from the CMU SB#3 TXD ± shall be outputs to the CMU-2212 from the 2202 HDSP/FU and ADU. All voltage potentials on the SB#3 interface shall be referenced to the same MAINS Ground (Neutral) that the Cabinet Monitor Unit (CMU pin B32) is connected to. ATC5301v0202_ Page 80

91 8.3.4 Form Factor SB#3 interface on cabinet shall consist of (2) RJ-45 8-pin sockets wired in parallel for daisychain: Figure 16: SB#3 Communications Interface Form Factor SB#3 interface cable shall consist of (2) RJ-45 8-pin plugs on sheathed, color coded cable. RJ-11 PLUG SB3 RJ-11 PLUG Figure 17: SB#3 Communications Cable Form Factor Connector Pin Assignments Table 24: SB#3 Connector Pin Assignment Pin Pair Color AT the CMU AT the HDSP/FU, ADU 1 White Orange SB#3 TxC+ SB#3 RxC+ 2 Orange SB#3 TxC- SB#3 RxC- 3 White Green Ground (MAINS GROUND / 48VDC GROUND) Ground (MAINS GROUND / 48VDC GROUND) 4 Blue SB#3 TxD+ SB#3 RxD+ 5 White Blue SB#3 TxD- SB#3 RxD- 6 Green Ground (MAINS GROUND / 48VDC GROUND) 7 White Brown SB#3 RxD+ SB#3 TxD+ 8 Brown SB#3 RxD- SB#3 TxD- Ground (MAINS GROUND / 48VDC GROUND) ATC5301v0202_ Page 81

92 8.4 CC Interface Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments Mechanical Dimensions of the interface from CMU to Door Switch Controlled by Standard? Yes Yes No General The Cabinet Control (CC) interface functions to electrically connect the various cabinet switches to the functionality containing the CMU Form Factor The CC Interface shall use a Molex , with pin number , or equivalent intermatable connector on one end and is either hardwired to the appropriate door and Police Panel (PP) switches on the other end or is point-to-point, parallel, wired to an identical connector on the other end, depending on cabinet architecture. AWG-18 wire shall be used for all conductors. Free swinging cables shall always be sheathed while fixed cable bundles need only be dressed with zip ties or lacing twine Connector Pin Assignments CC Figure 18: CC Interface Form Factor Table 25: CC Connector Pin Assignments Pins Function 1 1 MC Coil from PP VDC to PP (and Fan if used) 3-3 FTR Coil from PP 4-4 Signal Flash 5-5 Front Door Switch 6-6 From Auto Flash Switch 7 7 Reserved 8 8 From Rear Door Switch ATC5301v0202_ Page 82

93 Pins Function 9 9 CB Trip Status CMU to PP No Connect VDC GROUND VDC MANUAL CONTROL ENABLE In INTERVAL ADV Out STOP TIME Switch Table 26: Definitions of Terms relating to switches in the Police Panel Term AUTO FLASH SIGNALS ON SIGNALS OFF Definition The condition whereby both the MC and FTR are energized and the HDSP outputs are connected to the field terminals. The LF status to the CMU is inactive. The condition whereby both the MC and FTR are de-energized and the HDFU outputs are connected to the field terminals. The LF status to the CMU is active. The state whereby either the AUTO or FLASH condition is present, depending on the position of the AUTO/FLASH switch. The condition whereby the MC is deenergized and the FTR is energized and there is no energy is present on the field terminals. The LF status to the CMU is active. ATC5301v0202_ Page 83

94 Figure 19: CC Interface Connection Diagram ATC5301v0202_ Page 84

95 CDC Interface Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments Mechanical Dimensions of the interface Controlled by Standard? Yes Yes No General The Cabinet D Connector (CDC) interface functions to provide access to the four opto-isolator inputs on each SIU. These inputs may be used to facilitate isolated pedestrian switch signals or other signals requiring isolation. The CDC interface is optional, but if included, shall conform to this section of the standard Output SIU #1 Opto Inputs The Manual Control Enable (MCE), Manual Flash (FLASH) switch, Interval Advance (IA) and Stop Time (STOPTIME) switch signals shall be a 48Vdc signal with a series resistor (see ). They shall be low voltage signals referenced to 48VDC GROUND. CDC pin 5 (Opto Common) shall be referenced to 48VDC GROUND Form Factor The CDC Interface consists of 9-pin D plugs parallel wired (point to point) with #18 gauge minimum wire size. The CDC Interface consists of 9-pin D-subminiature socket connectors (DE9S) with #4-40 mating side screw jacks. Figure 20: CDC Interface Form Factor ATC5301v0202_ Page 85

96 CDC Connector Pin Assignments Table 27: CDC Connector Pin Assignments DE9S Pin # SIU Out #1 (or Combo #1) SIU Out #2 SIU In #1 (or Combo #2) SIU In #x (x>1) 1 MCE Opto O2-1 PED1 Opto lx-1 2 IA Opto O2-2 PED2 Opto lx-2 3 STOPTIME Opto O2-3 PED3 Opto lx-3 4 FLASH Opto O2-4 PED4 Opto lx-4 5 PP-Common Opto O2- PED GND Opto lx-common Common 6 (Reserved) (Reserved) (Reserved) (Reserved) 7 (Reserved) (Reserved) (Reserved) (Reserved) 8 CMU Test Reset Spare 1 Spare3 Spare 9 24VDC Ground Spare 2 Spare4 Spare Note: CMU Test Reset is intended for testing purposes only. 8.5 Output Termination Functionality Standardization Level Description Interface Signal Names and Electrical Characteristics Connector Types and Pin Assignments Mechanical Dimensions of the interface from OUT SLOT to Field Wires Controlled by Standard? Yes Yes No General The Output Termination Functionality interface functions to: Provide the electrical connection point between the Signal Head Field Wires and the Output Functionalities' OUT SLOT connectors. Physically program the signal flash either as RED or YELLOW Under control of the CMU, selects between the HDSP outputs or the Flasher, as the source for feeding the Signal Head Field Wires Functional Characteristics The electrical characteristics and signals of the Output Termination Functionality interface shall be controlled by the standard. The Output Termination Functionality interface shall functionally conform to Figure 21, which depicts the circuitry required for each High Density Switch Pack, in a cabinet assembly, that provides two channels of RED, YELLOW, and GREEN outputs (six physical outputs). ATC5301v0202_ Page 86

97 Figure 21: Termination Interface for 2 Switch Pack Channels OUT SLOT Interface The OUT SLOT interface shall electrically connect to its associated OUT SLOT located on the Output Functionality. The HDSP in that slot controls two sets of RED, YELLOW and GREEN signal indicators Flash Programming Blocks Each flash programming block (FPB) shall provide Flash Programming for its HDSP channel. The FPBs shall accept RED plugs to program RED flash and shall accept YELLOW plugs to program YELLOW flash as shown in Figure 21. When a Red plug is installed, the Red signal from its associated HDSP shall be routed through the FTR contacts allowing the FTR to select either the HDSP Red signal or the Flasher signal to be routed to the Field Wire Interface. Yellow FPBs shall operate in a similar manner. FPB1, FPB2 and the programming jumpers shall be electrically sized for the load. ATC5301v0202_ Page 87

98 Flash Transfer Relay The Flash Transfer Relay (FTRn) shall provide Flash Transfer that does the following: Connects FTR1 field wires and FTR2 field wires to the HDSP outputs when the FTR coil is energized Connects FTR1 field wires and FTR2 field wires to the HDFU outputs when the FTR coil is de-energized. Connects the FTR coil to FTR DRIVE signal controlled by the CMU. FTR DRIVE is referenced to 48VDC Ground. The FTR contacts shall be electrically sized for the load. The FTR coil pull-in and drop-out specifications shall provide operation as described above over the service voltage operating range Field Wire Sense Each HDSP includes a sense wire input associated with each of its outputs. The Field Wire Sense Interface shall provide a connection between the HDSP sense inputs and the field wires attached to the Field Wire Interface. The conductors of the Field Wire Sense Interfaces shall be attached as close as possible to the field wire terminals. The sense conductors shall be non-current carrying providing a remote measurement of the field wire voltage that avoids a resistive voltage drop Flasher Sense Interface Each HDFU includes a sense wire input associated with each of its outputs. The Flasher Wire Sense Interface shall provide a connection between the HDFU sense inputs and the Flash Signal inputs of the FTRs. The conductors of the Flasher Sense Interfaces shall be attached as close as possible to the FTR terminals. The sense conductors shall be non-current carrying providing a remote measurement of the field wire voltage that avoids a resistive voltage drop Form Factor The mechanical form factor of the Termination interface is not controlled by this standard, including the flash programming blocks, flash transfer relay, and connectors Field Wire Interface The Field Wire Interface connects the field signal loads controlled by the ATCC. The Field Wire Interface conductors and contacts shall be electrically sized for a minimum of 3 Amps. ATC5301v0202_ Page 88

99 9 PROTOCOLS 9.1 SB#1 Communications Protocol Electrical The Serial Bus #1 shall consist of four interface links (TXD ± and RXD ±, TXC ± and RXC ±) conforming to the requirements of the TIA-485-A, Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems. Where differences occur between the TIA-485-A standard and this document, this document shall govern. All voltage potentials on the SB#1 interface shall be referenced to +24VDC Ground Data Link Layer The data link layer protocol is based on a subset of HDLC as defined by ISO/IEC 13239:2002. Each frame shall consist of the following fields: Flag byte = 0x7E Address byte = 0x01 through 0x20 Control byte = 0x83 Information field = defined below in Sections 9.1.5, 9.1.6, and Frame Check Sequence = 16 bit FCS procedure defined in clause of ISO/IEC 13239:2002. Flag byte = 0x7E Transmission shall be in synchronous mode as defined by clause of ISO/IEC 13239:2002. The format shall be 8 bit data at 614,000 bits per second (±2%). The Primary Station (ATC) shall keep the Tx Clock and Tx Data drivers enabled continuously. Mark Idle shall be added during periods without data transmission from the Primary Station. A secondary transmitting station shall ensure that the last bit of its last byte has been transmitted for the full bit time prior to disabling its transmission clock or transmission drivers Procedures Frames transmitted by the ATC shall be referred to as command frames and frames transmitted by the secondary stations shall be referred to as response frames. Response frames shall only be transmitted as a result of correctly receiving a command frame. The first eight bits in each information field shall contain the Frame Type number. Reserved bits in any message shall always be set to zero by the transmitting station Message Timing The secondary station shall begin its response to command frames from the ATC within a designated period of time following the correct reception of a complete command frame including the closing flag. This period shall be known as the Service Time and shall have a maximum value of 500 microseconds. The secondary station link output shall be in the high impedance state outside of the interval defined by the Service Time plus Response Time. ATC5301v0202_ Page 89

100 The secondary station shall complete its transmission of the response frame including the closing flag within a designated time known as the Response Time, depending on the number of bytes transmitted in the response frame. The secondary station link output shall transition to a high impedance state a maximum of 25 microseconds following the transmission of the closing flag. Following the transmission of each command frame, there shall be a Dead Time during which the ATC does not transmit. This Dead Time shall be a minimum of the Service Time plus the Response Time SB#1 Frame Types The frame type shall be determined by the value of the first byte of the message. The command frames type values and associated response frame type are allocated to the manufacturer diagnostics. All other frame types not called out are reserved. The commandresponse frame type values shall be as follows: Module Command I/0 Module Response Table 28: SB#1 Frame Types Description Destination Device Request Module Status SIU MILLISECOND CTR. Mgmt. SIU Configure Inputs SIU Poll Raw Input Data SIU Poll Filtered Input Data SIU Poll Input Transition Buffer SIU Command Outputs SIU request 184 Configure Input Tracking SIU module Functions Configure Complex Output SIU Functions Reserved Reserved Module Identification SIU, CMU Reserved (deprecated) Send to Local Flash CMU Reserved Reserved Reserved (deprecated) Time / Date ALL Switch Pack Drivers (short) CMU Module Description SIU, CMU Switch Pack Drivers (long) CMU CMU Configuration CMU Switch Pack Drivers (high Res) CMU ATC5301v0202_ Page 90

101 Messages 62/190, 67/195, 81/209, 82/210 and 83/211shall be for the CMU. See CMU2212 SB#1 Frame Types section for command and response frames. Message 66 is a broadcast message to Address 255 containing the current time. Any device may receive and process this message if it has the software capacity Module Identification The Module Identification command frame shall be used to request the identification value for the SIU and CMU. Reply message shall use the following addresses: ATC field I/Os shall respond with address 20. SIUs respond with their own address ranging from CMUs respond with their own addresses, ranging from The command and response frames shall be shown as follows: Table 29: Module Identification Command Description msb lsb Byte Number (Type Number= 60) Byte 1 Table 30: Module Identification Response Description msb lsb Byte Number (Type Number= 188) Byte 1 model 2218 ID byte x x x x x x x x Byte Type 66 Command _Time and Date Broadcast Table 31: Type 66 Command Byte # Contents Description 1 66 Frame Type 2 0x01:0x0C Month 3 0x01:0x1F Day 4 0x00:0x63 Year 5 0x00:0x17 Hour 6 0x00:0x3B Minutes 7 0x00:0x3B Seconds 8 0x00:0x3B Tenth Seconds ATC5301v0202_ Page 91

102 This frame shall be transmitted from the ATC once every second. The destination address shall be the all-station address of 255 (0xFF). No response from secondary devices is allowed to the all station address. The transmission of this frame shall begin within ±100 milliseconds of the ATC real time contained within the frame Module Description The Module Description command frame shall be used to request the device type for the model 2218 and CMU. A text string is provided for device properties. Table 32: Module Description Command Byte # Contents Description 1 80 Frame Type Table 33: Module Description Response Byte # Contents Description Frame Type 2 Device Enumerated Device Type 1: CMU-212 2: CMU-2212-LV 3: CMU-2212-HV 4: CMU-2212-VHV (Reserved) 5: SIU-218 6: SIU :255 Reserved 3:42 ASCII Text A packed 40 character field describing the device properties. Allowable ASCII characters are 020h through 07Eh. If less than 40 characters are used, the unused locations shall be set to 00h. Default programming shall be 00h SIU2218 SB#1 Frame Types Request Module Status The command shall be used to request model 2218 status information response. Command/response frames shall be as follows: ATC5301v0202_ Page 92

103 Table 34: Request Module Status Command Description msb lsb Byte Number (Type Number = 49) Byte 1 Reset Status Bits P E K R T M L W Byte 2 Table 35: Request Module Status Response Description msb lsb Byte Number (Type Number = 177) Byte 1 System Status P E K R T M L W Byte 2 SCC Receive Error Count Receive Error Count Byte 3 SCC Transmit Error Count Transmit Error Count Byte 4 MC Timestamp MSB MC Timestamp MSB Byte 5 MC Timestamp NMSB MC Timestamp NMSB Byte 6 MC Timestamp NLSB MC Timestamp NLSB Byte 7 MC Timestamp LSB MC Timestamp LSB Byte 8 The response status bits are defined as follows: P - Indicates model 2218 hardware reset E - Indicates a communications loss of greater than two seconds M - Indicates an error with the Millisecond Counter interrupt L - Indicates an error in the LINESYNC W - Indicates that the model 2218 has been reset by the Watchdog R - Indicates that the EIA-485 receive error count byte has rolled over T - Indicates that the EIA-485 transmit error count byte has rolled over K - Not Used Each of these bits shall be individually reset by a '1' in the corresponding bit of any subsequent Request Module Status frame, and the response frame shall report the current status bits. The SCC error count bytes shall not be reset. When a count rolls over (255-0), its corresponding roll-over flag shall be set Millisecond Counter Management The millisecond counter management frame shall be used to set the value of the millisecond counter. The 'S' bit shall return status '0' on completion or '1' on error. The 32-bit value shall be loaded into the millisecond counter at the next 0-1 transition of the LINESYNC signal. The frames shall be as follows: ATC5301v0202_ Page 93

104 Table 36: Millisecond Counter Management Command Description msb lsb Byte Number (Type Number = 50) Byte 1 New MC Timestamp MSB x x x x x x x x Byte 2 New MC Timestamp NMSB x x x x x x x x Byte 3 New MC Timestamp NLSB x x x x x x x x Byte 4 New MC Timestamp LSB x x x x x x x x Byte 5 Table 37: Millisecond Counter Management Response Description msb lsb Byte Number (Type Number = 178) Byte 1 Status S Byte Configure Inputs The configure inputs command frame shall be used to change input configurations. The command-response frames shall be as follows: Table 38: Configure Inputs Command Description msb lsb Byte Number (Type Number = 51) Byte 1 Number of Items (n) n n n n n n n n Byte 2 Item # - Byte 1 E Input Number (I0 I59) Byte 3(I-1)+3 Item # - Byte 2 Leading edge filter (e) Byte 3(I-1)+4 Item # - Byte 3 Trailing edge filter (r) Byte 3(I-1)+5 Table 39: Configure Inputs Response Description msb lsb Byte Number (Type Number = 179) Byte 1 Status S Byte 2 ATC5301v0202_ Page 94

105 Block field definitions shall be as follows: E - Ignore Input Flag. "1" = do not record transition entries for this input, "0" = record transition entries for this input e - A one-byte leading edge filter specifying the number of consecutive input samples which must be "0" before the input is considered to have entered to "0" state from "1" state (range 1 to 255, 0 = filtering disabled) r - A one-byte trailing edge filter specifying the number of consecutive input samples which must be "1" before the input is considered to have entered to "1" state from "0" state (range 1 to 255, 0 = filtering disabled) S - return status S = '0' on completion or '1' on error Poll Raw Inputs Data The poll raw input data frame shall be used to poll the model 2218 for the current unfiltered status of all inputs. The response frame shall contain 8 bytes (Inputs 0-63) of information indicating the current input status. The frames shall be as follows: Table 40: Poll Raw Input Data Description msb lsb Byte Number (Type Number = 52) Byte 1 Table 41: Poll Raw Data Response Description msb lsb Byte Number (Type Number = 180) Byte 1 Inputs I0 (lsb) to I7 (msb) x x x x x x x x Byte 2 Inputs I8 to I54 x x x x x x x x Bytes 3 to 8 Inputs I56 to I59, A0 to A3 A3 A2 A1 A0 I59 I58 I57 I56 Byte 9 MC Timestamp MSB x x x x x x x x Byte 10 MC Timestamp NMSB x x x x x x x x Byte 11 MC Timestamp NLSB x x x x x x x x Byte 12 MC Timestamp LSB x x x x x x x x Byte Poll Filtered Input Data The poll filtered input data frame shall be used to poll the model 2218 for the current filtered status of all inputs. The response frame shall contain 8 bytes (Inputs 0-63) of information indicating the current filtered status of the inputs. Raw input data shall be provided in the response for inputs that are not configured for filtering. The frames shall be as follows: ATC5301v0202_ Page 95

106 Table 42: Poll Filtered Data Command Description msb lsb Byte Number (Type Number = 53) Byte 1 Table 43: Poll Filtered Data Response Description msb lsb Byte Number (Type Number = 181) Byte 1 Inputs I0 (lsb) to I7 (msb) x x x x x x x x Byte 2 Inputs I8 to I53, I56 to I59 x x x x x x x x Bytes 3 to 9 MC Timestamp MSB x x x x x x x x Byte 10 MC Timestamp NMSB x x x x x x x x Byte 11 MC Timestamp NLSB x x x x x x x x Byte 12 MC Timestamp LSB x x x x x x x x Byte Poll Input Transition Buffer The poll input transition buffer frame shall poll the model 2218 for the contents of the input transition buffer. The response frame shall include a three-byte information field for each of the input changes that have occurred since the last interrogation. The frames are as follows: Table 44: Poll Input Transition Buffer Command Description msb lsb Byte Number (Type Number = 54) Byte 1 Block Number x x x x x x x x Byte 2 Table 45: Poll Input Transition Buffer Response Description msb lsb Byte Number (Type Number = 182) Byte 1 Block Number x x x x x x x x Byte 2 Number of Entries = N x x x x x x x x Byte 3 Item # S Input Number (I0 I59) Byte 3(I-1)+4 Item # MC Timestamp NLSB x x x x x x x x Byte 3(I-1)+5 ATC5301v0202_ Page 96

107 Description msb lsb Byte Number Item # MC Timestamp LSB x x x x x x x x Byte 3(I-1)+6 Status C F E G Byte 3(I-1)+7 MC Timestamp MSB x x x x x x x x Byte 3(N-1)+8 MC Timestamp NMSB x x x x x x x x Byte 3(N-1)+9 MC Timestamp NLSB x x x x x x x x Byte 3(N-1)+10 MC Timestamp LSB x x x x x x x x Byte 3(N-1)+11 Each detected state transition for each active input (see and ) is placed in the queue as it occurs. Bit definitions are as follows: S - Indicates the state of the input after the transition, bit is 1 if the Input is ON after the transition, bit is 0 if the Input is OFF after the transition C - Indicates the 255 entry buffer limit has been exceeded F - Indicates the 1024 buffer limit has been exceeded G - Indicates the requested block number is out of monotonic increment sequence E - Same block number requested, E is set in response The entries provided within the transition buffer poll response shall be ordered from the start of the reply as the oldest to newest. The very first access provides the oldest entry. The model 2218 device shall initialize, upon Power Up or Reset, its last block number received value to 0xFF in order to facilitate suppression of the G Bit response when the ATC program starts and uses 0x00 as the first block number. Subsequent responses are subject to the old-buffer purge mechanism stated below. The ATC program monotonically increases the block number after each command issued to purge the old buffer. When the model 2218 module receives this command, it shall compare the associated block number with the block number of the previously received command. If it is the same, the previous buffer shall be re-sent to the ATC and the 'E' flag set in the status response frame. If it is not equal to the previous block number, the old buffer shall be purged and the next block of data sent. If the block number is not incremented by one, the status G bit shall be set. The block number received becomes the current number (even if out of sequence). The block number byte sent in the response block shall be the same as that received in the command block. The block number counter rollover (0xFF becomes 0x00) shall be considered as a normal increment Set Outputs The set outputs frame shall be used to command the model 2218 to set the outputs according to the data in the frame. If there is any error configuring the outputs, the 'E' flag in the response frame shall be set to '1'. If the LINESYNC reference has been lost, the 'L' bit in the response frame shall be set. Loss of LINESYNC reference shall also be indicated in system status information. These command and response frames are as follows: ATC5301v0202_ Page 97

108 Table 46: Set Outputs Command Description msb lsb Byte Number (Type Number = 55) Byte 1 Outputs O0 (lsb) to O7 (msb) Data x x x x x x x x Byte 2 Outputs O8 to O54 Data x x x x x x x x Bytes 3 to 8 Outputs O56 to O63 Data (reserved) Byte 9 Outputs O0 (lsb) to O7 (msb) Control x x x x x x x x Byte 10 Outputs O8 to O54 Control x x x x x x x x Bytes 11 to 16 Outputs O56 to O63 Control (reserved) Byte 17 Table 47: Set Outputs Response Description msb lsb Byte Number (Type Number = 183) Byte 1 Status L E Byte Configure Input Tracking Functions The Configure Input Tracking Functions frame shall be used to configure the definition for an output that responds to transitions on a particular input. The maximum number of active definitions is 8. Please note that Configure Input Tracking Functions is not intended for use with Traffic Signal Control Applications. (Authorized Engineering Information.) Command and Response Frames The command and response frames for Input Tracking Functions shall be as follows: Table 48: Configure Input Tracking Function Command Description msb lsb Byte Number (Type Number = 56) Byte 1 Number of Items Number of Items Byte 2 Item # - Byte 1 E Output Number (O0 O54) Byte 2(I-1)+3 Item # - Byte 2 I Input Number (I0 I59) Byte 2(I-1)+4 Number of Items: 0-16 Tracking Definitions are contained in this message. ATC5301v0202_ Page 98

109 Field Definitions: E '1 - Enable Input Tracking function for this Output '0' - Remove Input Tracking function for this Output I '1' - Output is OFF when Input is ON, ON when Input OFF '0' - Output is ON when Input is ON, OFF when Input is OFF Output Number: Input Number: 0 - Maximum Output Number for the model 2218 device type. 0 - Maximum Input Number for the model 2218 device type. Table 49: Configure Input Tracking Function Response Description msb lsb Byte Number (Type Number = 184) Byte 1 Status V Byte 2 MC Timestamp MSB x x x x x x x x Byte 3 MC Timestamp NMSB x x x x x x x x Byte 4 MC Timestamp NLSB x x x x x x x x Byte 5 MC Timestamp LSB x x x x x x x x Byte 6 Field Definitions: V '1' - Maximum number of configurable outputs will be exceeded. '0' - No error Timestamp The timestamp value shall be sampled prior to the response frame Output Updates Outputs, which track inputs, shall be updated no less than once per millisecond. Input to output signal propagation delay shall not exceed 2 milliseconds Tracking Functions Overview A maximum of eight different output numbers may be activated by specifying eight definitions. One complete definition for an output that tracks an Input consists of two bytes containing four parameters: 1) the instruction to install or to remove the definition, 2) the output number, 3) the relationship of the state of the output to the input and 4) the input number. Each definition specifies the controlling input number for that unique output number. More than one output definition may specify the same input controlling source. [That is, the same input may be used as the control source for more than one tracking output.] ATC5301v0202_ Page 99

110 A complete definition is called an item in the command message frame. The Number of Items byte specifies the quantity of complete definitions contained in the command frame. If the value is 0, all existing active input tracking definitions shall be removed. The transmission of a definition may do the following: a) Install a new active tracking definition. b) Remove an existing active tracking definition. When an input tracking definition is removed, the output is set according to the most recently received set outputs command. c) Convert an active output definition from complex or square wave definition to tracking conversion removes the existing definition and assigns the tracking definition without a transition through the output is set according to the most recently received set outputs command state. The most recent state of the output remains until the new function changes it. d) Redefine an existing tracking definition. If a command frames to be processed by the model 2218 would result in having more than the maximum number (8) of definitions activated, the entire command frame shall be rejected. The response V bit shall be set to 1. The V bit response is based on counting the current active quantity plus the projected enable definitions after accounting for remove definitions and invalid output numbers. The V bit response evaluation takes the currently active definition quantity, adds the projected enable definitions, subtracts the remove definitions, ignores invalid input and output numbers and compares the result to the maximum number of active tracking definitions allowed. If the quantity of active definitions would become greater than the maximum number of active tracking definitions, or if there are more remove definitions than existing active definitions, the V bit shall be set in the response. While processing an enable request, an out of range input number shall preclude processing for that definition. The out of range output and input numbers shall not affect the active definition count. No error response is returned. The rest of the message shall be processed. The Number of Items field is valid from 0 to 16 because the longest message may contain eight Enable and eight Remove definitions. The input state always comes from the filtered input data source. Valid Input and Output Number Ranges: model 2218 device types: Inputs 0-53 & 56-59, Outputs 0-54 ATC5301v0202_ Page 100

111 Configure Complex Output Functions The Configure Complex Output Functions frame shall be used to configure the definition for an output that provides a complex operation. The maximum number of active definitions is eight. Note that Configure Complex Output Functions is not intended for use with Traffic Signal Control Applications. (Authorized Engineering Information.) Command and Response Frames The command and response frames shall be as follows: Table 50: Configure Complex Outputs Description msb lsb Byte Number (Type Number = 57) Byte 1 Number of Items Number of Items Byte 2 Item # - Byte 1 0 Output Number (O0 O54) Byte 7(I-1)+3 Item # - Byte 2 Primary Duration (MSB) Byte 7(I-1)+4 Item # - Byte 3 Primary Duration (LSB) Byte 7(I-1)+5 Item # - Byte 4 Secondary Duration (MSB) Byte 7(I-1)+6 Item # - Byte 5 Secondary Duration (LSB) Byte 7(I-1)+7 Item # - Byte 6 0 Input Number (I0 I59) Byte 7(I-1)+8 Item # - Byte 7 P W G E J F R L Byte 7(I-1)+9 Number of Items: 0-16 Complex Output Definitions are contained in this message. Output Number: 0 - Maximum Output Number for the model 2218 device type. Primary Duration: MSB & LSB form a 16 bit Hex numerical value 0x0000-0xffff. Secondary Duration: MSB & LSB form a 16 bit Hex numerical value 0x0000-0xffff. Input Number: 0 - Maximum Input Number for the model 2218 device type. Field Definitions: P '1' - The output is configured for single-pulse operation. Once complete, the complex output function shall be disabled. '0' - The output is configured for continuous oscillation. W '1' - It is triggered by the specified input. Triggered complex output shall commence within 2 milliseconds of the associated trigger recognition. '0' - Operation shall begin within two milliseconds of the command receipt. G '1' - Operation shall be gated active by the specified input. '0' - Gating is inactive. E '1' Enable complex output function for this output '0' Remove complex output function for this output J '1' During primary duration, the output shall be written as a logic '1'. During secondary duration, the output shall be written as a logic '0'. ATC5301v0202_ Page 101

112 '0' During primary duration, the output shall be written as a logic '0'. During secondary duration, the output shall be written as a logic '1' F '1' - The trigger or gate shall be acquired subsequent to filtering the specified input. The raw input signal shall be used if filtering is not enabled for the specified input. '0' - The trigger or gate shall be derived from the raw input. R '1' - For triggered output, the output shall be triggered by an ON-to-OFF transition of the..specified input and shall be triggered immediately upon command receipt if the input is..off. '0' - For gated output, the output shall be active while the input is OFF. For triggered output, the output shall be triggered by an OFF-to-ON transition of the specified input and shall be triggered immediately upon command receipt if the input is ON. For gated output, the output shall be active while the input is ON. L '1' The LINESYNC based clock shall be used for the time ticks. '0' - The millisecond counter shall be used for the time ticks. Table 51: Configure Complex Output Functions Response Description msb lsb Byte Number (Type Number = 57) Byte 1 Number of Items Number of Items Byte 2 Item # - Byte 1 0 Output Number (O0 O54) Byte 7(I-1)+3 Item # - Byte 2 Primary Duration (MSB) Byte 7(I-1)+4 Item # - Byte 3 Primary Duration (LSB) Byte 7(I-1)+5 Item # - Byte 4 Secondary Duration (MSB) Byte 7(I-1)+6 Item # - Byte 5 Secondary Duration (LSB) Byte 7(I-1)+7 Item # - Byte 6 0 Input Number (I0 I59) Byte 7(I-1)+8 Item # - Byte 7 P W G E J F R L Byte 7(I-1)+9 Field Definitions: V '1' - Maximum number of configurable outputs will be exceeded. '0' - No error Sampling Rate Controlling input signals shall be sampled at least once per millisecond Complex Output Functions Overview A maximum of eight different output numbers may be activated by specifying eight definitions. One complete definition for a complex output consists of seven bytes containing fourteen parameters: 1) The Output Number 2, 3) Primary Duration: MSB & LSB form a 16 bit Hex numerical value ATC5301v0202_ Page 102

113 4, 5) Secondary Duration: MSB & LSB form a 16 bit Hex numerical value 6) The Input Number 7) Bit P: One Pulse or Continuous Oscillation 8) Bit W: Output Operation is Edge Triggered by Input or Not Triggered by Input 9) Bit G: Output Operation is Gated by Input or is Continuous Oscillation 10) Bit E: Enable Definition or Remove Definition 11) Bit J: Defines Primary/Secondary Duration relationship: ON/OFF or OFF/ON 12) Bit F: Input from Filtered or Raw Data 13) Bit R: Selects Edge for Triggered by Input ON to OFF or OFF to ON. Bit R: Selects State for Gated to be active by Input OFF or by Input ON 14) Linesync edges or millisecond counter provides tick timing Each definition specifies the controlling input number for that unique output number. The input is a functional control only when the operation is specified as Triggered (W=1) or Gated (G=1). Otherwise, the input number is ignored. More than one output definition may specify the same Input controlling source. [That is, the same input may be used as the control source for more than one complex output.] If both W=1 and G=1 are set in the definition, the G=1 shall be used as if W=0. The primary duration is the first timed interval of a pulse or the first portion of a continuous oscillation. The first portion follows acquisition of a trigger or gated input. If not triggered or gated, the first portion follows the activation of the definition. The secondary duration follows the primary duration. A complete definition is called an item in the command message frame. The Number of Items byte specifies the quantity of complete definitions contained in the command frame. If the value is 0, all existing active complex output definitions shall be removed. The transmission of a definition may do the following: a) Install a new active complex output definition. b) Remove an existing active complex output definition. When a complex output definition is removed, the output is set according to the most recently received set outputs command. c) Convert an active output definition from tracking or square wave definition to complex output. Conversion removes the existing definition and assigns the complex output definition without a transition through the output is set according to the most recently received Set Outputs Command state. The most recent state of the output remains until the new function changes it. d) Redefine an existing complex output definition. ATC5301v0202_ Page 103

114 If a command frame to be processed by the model 2218 would result in having more than the maximum number (8) definitions activated, the entire command frame shall be rejected. The response V bit shall be set to 1. The V bit response evaluation takes the currently active definition quantity, adds the projected enable definitions, subtracts the remove definitions, ignores invalid input and output number,s and compares the result to the maximum number of active complex definitions allowed. If the quantity of active definitions would become greater than the maximum number of active complex output definitions, or if there are more Remove definitions than existing active complex output definitions, the V bit shall be set in the response. While processing an Enable request that requires triggered or gated operation, an out of range input number shall preclude processing for that definition. The out of range output and input numbers shall not affect the active definition count. No error response is returned. The rest of the message shall be processed. The Number of Items field is valid from 0 to 16 because the longest message may contain eight enable and eight remove definitions. The input state comes from the filtered or raw input data source as specified by the bit F value. Valid Input and Output Number Ranges: model 2218 device types: Inputs 0-53 & 56-59, Outputs 0-54 The LINESYNC based clock shall used both the rising and falling edges providing a nominal 8.33 millisecond time tick CMU2212 SB#1 Frame Types Type 62 Send to Local Flash Command SET FSA Table 52 Type 62 Command Byte # Contents Description 1 62 Frame Type 2 FSA mode Set Failed State Action b0 = Set LFSA (L) b1 = Set NFSA (N) b2:7 = reserved ATC5301v0202_ Page 104

115 Type 190 Response Send to Local Flash Response Set FSA Table 53: Type 190 Response Byte # Contents Description Frame Type Type 67 Command Switch Pack Drivers The format of this command frame shall be identical to Message 81 and 83 but requests a short status response from the CMU. This frame may be used as an alternate to Message 81 or 83. The destination for this frame shall be the CMU. The channel numbers in the description column below refer to the channel numbers of the CMU. The ATC shall include a definition, via program entry, of the CMU channel to ATC signal driver group utilization. The Dark Channel Map Select bits shall select a preprogrammed mask in the CMU serial memory key that disables Lack of Signal Input monitoring for the selected channels. Table 54: CMU Type 67 Command Byte # Contents Description 1 67 Frame Type 2 Channel 8:1 Red Switch Pack Status 3 Channel 16:9 Red A bit set to 1 indicates the HDSP output is set ON. 4 Channel 24:17 Red 5 Channel 32:25 Red 6 Channel 8:1 Yellow 7 Channel 16:9 Yellow 8 Channel 24:17 Yellow 9 Channel 32:25 Yellow 10 Channel 8:1 Green 11 Channel 16:9 Green 12 Channel 24:17 Green 13 Channel 32:25 Green ATC5301v0202_ Page 105

116 Byte # Contents Description 14 Map Select Dark Channel Map Select Bit 1 and bit 0 shall select one of four Dark Channel Maps programmed in the serial memory key that disables Lack of Signal Input monitoring for a selected channel. Bits 2 thru 7 are reserved. 00 = Mask #1 01 = Mask #2 10 = Mask #3 11 = Mask # Type 195 Response CMU Short Status If the CMU is in FSA (byte #2, Fault Type not equal to 0), then the channel color status bytes shall contain an exact image of the signals that were applied to the CMU at the point in time of the detection of the failure. Control Status 1, Control Status 2, and Output Assembly Flasher Status shall always reflect current status. Table 55: CMU Type 195 Response Byte # Contents Description Frame Type 2 Fault Type Enumerated fault code 00 = No Fault 01 = CMU/HDSP +24 VDC 02 = CMU +12 VDC 03 = Conflict 04 = Serial Bus #1 05 = Serial Bus #3 06 = ATC LFSA Flash (Type 62) 07 = ATC NFSA Flash (Type 62) 08 = Diagnostic 09 = Multiple 10 = Lack of Signal Input 11 = Short Yellow Clearance 12 = Skipped Yellow Clearance 13 = Yellow + Red Clearance 14 = Field Output Check 15 = Serial Memory Key absent 16 = Serial Memory Key FCS error ATC5301v0202_ Page 106

117 Byte # Contents Description 17 = Serial Memory Key Data error 18 = Local Flash 19 = CB Trip 20 = CMU/HDSP Mains Fail 21 = NRESET Active 22 = HDSP Diagnostic 23 = FYA Flash Rate Fault 24 = CMU +48 VDC 25:127 = Reserved 128:255 = Spare (Reserved for Mfg Use) 3 Channel Fault Status 8:1 Channel Fault Status 4 Channel Fault Status 16:9 5 Channel Fault Status 24:17 6 Channel Fault Status 32:25 Channel Fault Status bits shall be set to 1 for channels that were detected in fault for fault types 03, 09, 10, 11, 12, 13, and 14. For fault type 01, 05, 20, and 22 a bit shall be set in Channel Fault Status 32:1 for each enabled HDSP channel that failed. For type 01, if the CMU 24VDC input failed then Channel Fault Status shall be set to 0. For type 20, if the CMU MAINS input failed then Channel Fault Status shall be set to 0. For all other fault types the Channel Fault Status bits shall be set to 0. 7 Channel Red Status 8:1 Channel Color Status 8 Channel Red Status 16:9 Channel Color Status bits shall be set to 1 for 9 Channel Red Status 24:17 channels that are sensed active. For channel 10 Channel Red Status 32:25 inputs that have been remapped to a virtual 11 Channel Yellow Status 8:1 channel (29-32), the Channel Color Status bits 12 Channel Yellow Status 16:9 shall be set to 0. For virtual channel (29-32) 13 Channel Yellow Status 24:17 inputs that have not been assigned to a physical 14 Channel Yellow Status 32:25 output, the Channel Color Status bits shall be 15 Channel Green Status 8:1 set to Channel Green Status 16:9 17 Channel Green Status 24:17 18 Channel Green Status 32:25 19 Control Status #1 Control Status #1 ATC5301v0202_ Page 107

118 Byte # Contents Description b7 = Start-up Call (1=Exit from Flash) b6 = Flasher Output Fail (1 = Fail) b5 = Rear Door (1=Open) b4 = Front Door (1=Open) b3 = MAIN CONTACTOR Coil (1=Active) b2 = MAIN CONTACTOR Secondary (1=Active) b1 = FTR Coil Drive (1= Active) b0 = Output Relay Transfer (1=Fault) 20 Control Status #2 Control Status #2 b7 = Reserved b6 = Reserved b5 = Reserved b4 = Reserved b3 = Reserved b2 = HDFU #2 Comm Error b1 = HDFU #1 Comm Error b0 = Configuration Change This bit set to 1 indicates the configuration programming has changed since the last poll of frame Type 82. It shall also be set to 1 when the CMU is exiting flash (Start-up Call bit changes from 0 to 1) and at CMU power-up. 21 Flasher Status Flasher Status (1=Fail) b0 = HDFU #1 FL1-1 b1 = HDFU #1 FL1-2 b2 = HDFU #1 FL2-1 b3 = HDFU #1 FL2-2 b4 = HDFU #2 FL1-1 b5 = HDFU #2 FL1-2 b6 = HDFU #2 FL2-1 b7 = HDFU #2 FL x00 Reserved 23 0x00 Reserved 24 0x00 Reserved ATC5301v0202_ Page 108

119 Type 80 Command Module Description Table 56: Serial Bus #1 Type 80 Command Byte # Contents Description 1 80 Frame Type Type 208 Response Module Description Table 57: Serial Bus #1 Type 208 Response Byte # Contents Description Frame Type 2 Device Enumerated Device Type 1: CMU-212 2: CMU-2212-LV 3: CMU-2212-HV 4: CMU-2212-VHV (Reserved) 5: SIU-218 6: model :255 Reserved 3:42 ASCII Text A packed 40 character field describing the device properties. Allowable ASCII characters are 020h through 07Eh. If less than 40 characters are used, the unused locations shall be set to 00h. Default programming shall be 00h Type 81 Command Switch Pack Drivers (Long) The destination for this frame shall be the CMU. The channel numbers in the description column below refer to the channel numbers of the CMU. The ATC shall include a definition, via program entry, of the CMU channel to ATC signal driver group utilization. The Dark Channel Map Select bits shall select a preprogrammed mask in the CMU serial memory key that disables Lack of Signal Input monitoring for the selected channels. Table 58: Serial Bus #1 Type 81 Command Byte # Contents Description 1 81 Frame Type 2 Channel 8:1 Red HDSP Status ATC5301v0202_ Page 109

120 Byte # Contents Description 3 Channel 16:9 Red A bit set to 1 indicates the HDSP output is set ON. 4 Channel 24:17 Red 5 Channel 32:25 Red 6 Channel 8:1 Yellow 7 Channel 16:9 Yellow 8 Channel 24:17 Yellow 9 Channel 32:25 Yellow 10 Channel 8:1 Green 11 Channel 16:9 Green 12 Channel 24:17 Green 13 Channel 32:25 Green 14 Map Select Dark Channel Map Select Bit 1 and bit 0 shall select one of four Dark Channel Maps programmed in the serial memory key that disables Lack of Signal Input monitoring for a selected channel. 00 = Mask #1 01 = Mask #2 10 = Mask #3 11 = Mask #4 Bits 2 thru 7 are Reserved Type 209 Response CMU Status If the CMU is in FSA (byte #2, Fault Type not equal to 0), then all bytes of the information field of this frame except Control Status 1, Control Status 2 and Output Assembly Flasher Status shall contain an exact image of the signals that were applied to the CMU at the point in time of the detection of the failure. Control Status 1, Control Status 2 and Output Assembly Flasher Status shall always reflect current status. Table 59: Serial Bus #1 Type 81 Response Byte # Contents Description Frame Type 2 Fault Type Enumerated fault code 00 = No Fault 01 = CMU/HDSP +24 VDC 02 = CMU +12 VDC 03 = Conflict 04 = Serial Bus #1 05 = Serial Bus #3 ATC5301v0202_ Page 110

121 Byte # Contents Description 06 = ATC LFSA Flash (Type 62) 07 = ATC NFSA Flash (Type 62) 08 = Diagnostic 09 = Multiple 10 = Lack of Signal Input 11 = Short Yellow Clearance 12 = Skipped Yellow Clearance 13 = Yellow + Red Clearance 14 = Field Output Check 15 = Serial Memory Key absent 16 = Serial Memory Key FCS error 17 = Serial Memory Key Data error 18 = Local Flash 19 = CB Trip 20 = CMU/HDSP Mains Fail 21 = NRESET Active 22 = HDSP Diagnostic 23 = FYA Flash Rate Fault 24 = CMU +48 VDC 25:127 = Reserved 128:255 = Spare (Reserved for Mfg Use) 3 Channel Fault Status 8:1 Channel Fault Status 4 Channel Fault Status 16:9 5 Channel Fault Status 24:17 6 Channel Fault Status 32:25 Channel Fault Status bits shall be set to 1 for channels that were detected in fault for fault types 03, 09, 10, 11, 12, 13, and 14. For fault type 01, 05, 20, and 22 a bit shall be set in Channel Fault Status 32:1 for each enabled HDSP channel that failed. For type 01, if the CMU 24VDC input failed then Channel Fault Status shall be set to 0. For type 20, if the CMU MAINS input failed then Channel Fault Status shall be set to 0. For all other fault types the Channel Fault Status bits shall be set to 0. 7 Channel Red Status 8:1 Channel Color Status 8 Channel Red Status 16:9 Channel Color Status bits shall be set to 1 for 9 Channel Red Status 24:17 channels that are sensed active. For channel ATC5301v0202_ Page 111

122 Byte # Contents Description 10 Channel Red Status 32:25 inputs that have been remapped to a virtual 11 Channel Yellow Status 8:1 channel (29-32), the Channel Color Status bits 12 Channel Yellow Status 16:9 shall be set to 0. For virtual channel (29-32) 13 Channel Yellow Status 24:17 inputs that have not been assigned to a 14 Channel Yellow Status 32:25 physical output, the Channel Color Status bits 15 Channel Green Status 8:1 shall be set to Channel Green Status 16:9 17 Channel Green Status 24:17 18 Channel Green Status 32:25 19 Channel Red Status 8:1 Field Check Status 20 Channel Red Status 16:9 Field Check Status bits shall be set to 1 for 21 Channel Red Status 24:17 channels that are sensed with field check 22 Channel Red Status 32:25 status. For channel inputs that have been 23 Channel Yellow Status 8:1 remapped to a virtual channel (29-32), the 24 Channel Yellow Status 16:9 Field Check Status bits shall be set to 0. For 25 Channel Yellow Status 24:17 virtual channel (29-32) inputs that have not 26 Channel Yellow Status 32:25 been assigned to a physical output, the Field 27 Channel Green Status 8:1 Check Status bits shall be set to Channel Green Status 16:9 29 Channel Green Status 24:17 30 Channel Green Status 32:25 31 Control Status #1 Control Status #1 b7 = Start-up Call (1=Exit from Flash) b6 = Flasher Output Fail (1 = Fail) b5 = Rear Door (1=Open) b4 = Front Door (1=Open) b3 = MAIN CONTACTOR Coil (1=Active) b2 = MAIN CONTACTOR Secondary (1=Active) b1 = FTR Coil Drive (1= Active) b0 = Output Relay Transfer (1=Fault) 32 Control Status #2 Control Status #2 b7 = Reserved b6 = Reserved b5 = Reserved b4 = Reserved b3 = Reserved b2 = HDFU #2 Comm Error ATC5301v0202_ Page 112

123 Byte # Contents Description b1 = HDFU #1 Comm Error b0 = Configuration Change This bit set to 1 indicates the configuration programming has changed since the last poll of frame Type 82. It shall also be set to 1 when the CMU is exiting flash (Start-up Call bit changes from 0 to 1) and at CMU power-up. 33 Mains Raw Voltage CMU Mains Voltage 34 Assembly #1 Signal Power Voltage 35 Assembly #2 Signal Power Voltage HDSP Signal Voltage Signal Voltage for any HDSP in assembly #1 (channels 1:16) Signal Voltage for any HDSP in assembly #2 (channels 17:32) 36 Channel 1 Red Voltage Channel Input Voltages 37 Channel 2 Red Voltage The Channel input voltages shall be the most 38 Channel 3 Red Voltage recent values reported from the HDSPs. For 39 Channel 4 Red Voltage channel inputs that have been remapped to a 40 Channel 5 Red Voltage virtual channel (29-32), the Channel Voltage value 41 Channel 6 Red Voltage shall be set to Channel 7 Red Voltage 43 Channel 8 Red Voltage. 44 Channel 9 Red Voltage 45 Channel 10 Red Voltage 46 Channel 11 Red Voltage 47 Channel 12 Red Voltage 48 Channel 13 Red Voltage 49 Channel 14 Red Voltage 50 Channel 15 Red Voltage 51 Channel 16 Red Voltage 52 Channel 17 Red Voltage 53 Channel 18 Red Voltage 54 Channel 19 Red Voltage 55 Channel 20 Red Voltage 56 Channel 21 Red Voltage 57 Channel 22 Red Voltage 58 Channel 23 Red Voltage 59 Channel 24 Red Voltage ATC5301v0202_ Page 113

124 Byte # Contents Description 60 Channel 25 Red Voltage 61 Channel 26 Red Voltage 62 Channel 27 Red Voltage 63 Channel 28 Red Voltage 64 Channel 29 Red Voltage 65 Channel 30 Red Voltage 66 Channel 31 Red Voltage 67 Channel 32 Red Voltage 68 Channel 1 Yellow Voltage 69 Channel 2 Yellow Voltage 70 Channel 3 Yellow Voltage 71 Channel 4 Yellow Voltage 72 Channel 5 Yellow Voltage 73 Channel 6 Yellow Voltage 74 Channel 7 Yellow Voltage 75 Channel 8 Yellow Voltage 76 Channel 9 Yellow Voltage 77 Channel 10 Yellow Voltage 78 Channel 11 Yellow Voltage 79 Channel 12 Yellow Voltage 80 Channel 13 Yellow Voltage 81 Channel 14 Yellow Voltage 82 Channel 15 Yellow Voltage 83 Channel 16 Yellow Voltage 84 Channel 17 Yellow Voltage 85 Channel 18 Yellow Voltage 86 Channel 19 Yellow Voltage 87 Channel 20 Yellow Voltage 88 Channel 21 Yellow Voltage 89 Channel 22 Yellow Voltage 90 Channel 23 Yellow Voltage 91 Channel 24 Yellow Voltage 92 Channel 25 Yellow Voltage 93 Channel 26 Yellow Voltage 94 Channel 27 Yellow Voltage 95 Channel 28 Yellow Voltage 96 Channel 29 Yellow Voltage 97 Channel 30 Yellow Voltage ATC5301v0202_ Page 114

125 Byte # Contents Description 98 Channel 31 Yellow Voltage 99 Channel 32 Yellow Voltage 100 Channel 1 Green Voltage 101 Channel 2 Green Voltage 102 Channel 3 Green Voltage 103 Channel 4 Green Voltage 104 Channel 5 Green Voltage 105 Channel 6 Green Voltage 106 Channel 7 Green Voltage 107 Channel 8 Green Voltage 108 Channel 9 Green Voltage 109 Channel 10 Green Voltage 110 Channel 11 Green Voltage 111 Channel 12 Green Voltage 112 Channel 13 Green Voltage 113 Channel 14 Green Voltage 114 Channel 15 Green Voltage 115 Channel 16 Green Voltage 116 Channel 17 Green Voltage 117 Channel 18 Green Voltage 118 Channel 19 Green Voltage 119 Channel 20 Green Voltage 120 Channel 21 Green Voltage 121 Channel 22 Green Voltage 122 Channel 23 Green Voltage 123 Channel 24 Green Voltage 124 Channel 25 Green Voltage 125 Channel 26 Green Voltage 126 Channel 27 Green Voltage 127 Channel 28 Green Voltage 128 Channel 29 Green Voltage 129 Channel 30 Green Voltage 130 Channel 31 Green Voltage 131 Channel 32 Green Voltage 132 Channel 1 Red Current Scaled Load Current 133 Channel 2 Red Current 134 Channel 3 Red Current 135 Channel 4 Red Current The output load current values for current sense shall be programmed in scaled milliamps. ATC5301v0202_ Page 115

126 Byte # Contents Description 136 Channel 5 Red Current 137 Channel 6 Red Current 138 Channel 7 Red Current 139 Channel 8 Red Current 140 Channel 9 Red Current 141 Channel 10 Red Current 142 Channel 11 Red Current 143 Channel 12 Red Current 144 Channel 13 Red Current 145 Channel 14 Red Current 146 Channel 15 Red Current 147 Channel 16 Red Current 148 Channel 17 Red Current 149 Channel 18 Red Current 150 Channel 19 Red Current 151 Channel 20 Red Current 152 Channel 21 Red Current 153 Channel 22 Red Current 154 Channel 23 Red Current 155 Channel 24 Red Current 156 Channel 25 Red Current 157 Channel 26 Red Current 158 Channel 27 Red Current 159 Channel 28 Red Current 160 Channel 29 Red Current 161 Channel 30 Red Current 162 Channel 31 Red Current 163 Channel 32 Red Current 164 Channel 1 Yellow Current 165 Channel 2 Yellow Current 166 Channel 3 Yellow Current 167 Channel 4 Yellow Current 168 Channel 5 Yellow Current 169 Channel 6 Yellow Current 170 Channel 7 Yellow Current 171 Channel 8 Yellow Current 172 Channel 9 Yellow Current 173 Channel 10 Yellow Current IF Param >120 Then Current = (Param *16) 1800 Else Current = Param If Param > 250 Then Current = > 2200 ma ATC5301v0202_ Page 116

127 Byte # Contents Description 174 Channel 11 Yellow Current 175 Channel 12 Yellow Current 176 Channel 13 Yellow Current 177 Channel 14 Yellow Current 178 Channel 15 Yellow Current 179 Channel 16 Yellow Current 180 Channel 17 Yellow Current 181 Channel 18 Yellow Current 182 Channel 19 Yellow Current 183 Channel 20 Yellow Current 184 Channel 21 Yellow Current 185 Channel 22 Yellow Current 186 Channel 23 Yellow Current 187 Channel 24 Yellow Current 188 Channel 25 Yellow Current 189 Channel 26 Yellow Current 190 Channel 27 Yellow Current 191 Channel 28 Yellow Current 192 Channel 29 Yellow Current 193 Channel 30 Yellow Current 194 Channel 31 Yellow Current 195 Channel 32 Yellow Current 196 Channel 1 Green Current 197 Channel 2 Green Current 198 Channel 3 Green Current 199 Channel 4 Green Current 200 Channel 5 Green Current 201 Channel 6 Green Current 202 Channel 7 Green Current 203 Channel 8 Green Current 204 Channel 9 Green Current 205 Channel 10 Green Current 206 Channel 11 Green Current 207 Channel 12 Green Current 208 Channel 13 Green Current 209 Channel 14 Green Current 210 Channel 15 Green Current 211 Channel 16 Green Current ATC5301v0202_ Page 117

128 Byte # Contents Description 212 Channel 17 Green Current 213 Channel 18 Green Current 214 Channel 19 Green Current 215 Channel 20 Green Current 216 Channel 21 Green Current 217 Channel 22 Green Current 218 Channel 23 Green Current 219 Channel 24 Green Current 220 Channel 25 Green Current 221 Channel 26 Green Current 222 Channel 27 Green Current 223 Channel 28 Green Current 224 Channel 29 Green Current 225 Channel 30 Green Current 226 Channel 31 Green Current 227 Channel 32 Green Current 228 Binary Seconds CMU Time and Date 229 Binary Minutes 230 Binary Hours (0:23) 231 Binary Date 232 Binary Month 233 Binary Year 234 Voltage * 4 CMU 24VDC Supply Voltage 235 Voltage * 4 CMU 48VDC Supply Voltage 236 degrees F + 40 CMU Temperature (Fahrenheit) 237 Red Status 8:1 Channel Current Sense Status 238 Red Status 16:9 239 Red Status 24: Red Status 32: Yellow Status 8:1 242 Yellow Status 16:9 243 Yellow Status 24: Yellow Status 32: Green Status 8:1 246 Green Status 16:9 247 Green Status 24: Green Status 32:25 Status bits shall be set to 1 for channels that are sensed active. Status bits shall be set to 0 for channels that have the Current Sense monitor function disabled. ATC5301v0202_ Page 118

129 Byte # Contents Description 249 Flasher Status Flasher Status (1=Fail) b0 = HDFU #1 FL1-1 b1 = HDFU #1 FL1-2 b2 = HDFU #1 FL2-1 b3 = HDFU #1 FL2-2 b4 = HDFU #2 FL1-1 b5 = HDFU #2 FL1-2 b6 = HDFU #2 FL2-1 b7 = HDFU #2 FL Type 82 Command Get CMU Configuration The ATC shall request the serial memory key programming using this message and validate that the CMU permissive program settings are equal or less permissive than the ATC controller unit programming, and that the HDSP configuration programming is consistent with Output Functionality model 2218 assignment. If these checks are not validated, then the ATC shall issue a Type 62 frame with the L bit set causing a LFSA in the CMU. This check shall be performed at initialization and when the Type 209 or Type 195 Control Status 2, Configuration Change bit is set to 1. Table 60: CMU Type 82 Command Byte # Contents Description 1 82 Frame Type Type 210 Response CMU Configuration Table 61: CMU Type 210 Response Byte # Contents Description Frame Type 2:513 Bytes #1 thru #512 Serial Memory Key Contents Type 83 Command Switch Pack Drivers (High Resolution) The destination for this frame shall be the CMU. The channel numbers in the description column below refer to the channel numbers of the CMU. The ATC shall include a definition, via program entry, of the CMU channel to ATC signal driver group utilization. The Dark Channel Map Select bits shall select a preprogrammed mask in the CMU serial memory key that disables Lack of Signal Input monitoring for the selected channels. ATC5301v0202_ Page 119

130 Table 62: Serial Bus #1 Type 83 Command Byte # Contents Description 1 83 Frame Type 2 Channel 8:1 Red HDSP Status 3 Channel 16:9 Red A bit set to 1 indicates the HDSP output is set ON. 4 Channel 24:17 Red 5 Channel 32:25 Red 6 Channel 8:1 Yellow 7 Channel 16:9 Yellow 8 Channel 24:17 Yellow 9 Channel 32:25 Yellow 10 Channel 8:1 Green 11 Channel 16:9 Green 12 Channel 24:17 Green 13 Channel 32:25 Green 14 Map Select Dark Channel Map Select Bit 1 and bit 0 shall select one of four Dark Channel Maps programmed in the serial memory key that disables Lack of Signal Input monitoring for a selected channel. 00 = Mask #1 01 = Mask #2 10 = Mask #3 11 = Mask #4 Bits 2 thru 7 are Reserved Type 211 Response CMU Status (High Resolution) If the CMU is in FSA (byte #2, Fault Type not equal to 0), then all bytes of the information field of this frame except Control Status 1, Control Status 2, HDFU Load Current, and Output Assembly Flasher Status shall contain an exact image of the signals that were applied to the CMU at the point in time of the detection of the failure. Control Status 1, Control Status 2, HDFU Load Current, and Output Assembly Flasher Status shall always reflect current status. Table 63: Serial Bus #1 Type 211 Response Byte # Contents Description Frame Type 2 Fault Type Enumerated fault code ATC5301v0202_ Page 120

131 Byte # Contents Description 00 = No Fault 01 = CMU/HDSP +24 VDC 02 = CMU +12 VDC 03 = Conflict 04 = Serial Bus #1 05 = Serial Bus #3 06 = ATC LFSA Flash (Type 62) 07 = ATC NFSA Flash (Type 62) 08 = Diagnostic 09 = Multiple 10 = Lack of Signal Input 11 = Short Yellow Clearance 12 = Skipped Yellow Clearance 13 = Yellow + Red Clearance 14 = Field Output Check 15 = Serial Memory Key absent 16 = Serial Memory Key FCS error 17 = Serial Memory Key Data error 18 = Local Flash 19 = CB Trip 20 = CMU/HDSP Mains Fail 21 = NRESET Active 22 = HDSP Diagnostic 23 = FYA Flash Rate Fault 24 = CMU +48 VDC 25:127 = Reserved 128:255 = Spare (Reserved for Mfg Use) 3 Channel Fault Status 8:1 Channel Fault Status 4 Channel Fault Status 16:9 5 Channel Fault Status 24:17 6 Channel Fault Status 32:25 Channel Fault Status bits shall be set to 1 for channels that were detected in fault for fault types 03, 09, 10, 11, 12, 13, and 14. For fault type 01, 05, 20, and 22 a bit shall be set in Channel Fault Status 32:1 for each enabled HDSP channel that failed. For type 01, if the CMU 24VDC input failed then Channel Fault Status shall be set to 0. For type 20, if the CMU MAINS input failed then Channel Fault Status shall be set to 0. For all other fault types the Channel Fault Status bits shall be set to 0. 7 Channel Red Status 8:1 Channel Color Status ATC5301v0202_ Page 121

132 Byte # Contents Description 8 Channel Red Status 16:9 Channel Color Status bits shall be set to 1 9 Channel Red Status 24:17 for channels that are sensed active. For 10 Channel Red Status 32:25 channel inputs that have been remapped 11 Channel Yellow Status 8:1 to a virtual channel (29-32), the Channel 12 Channel Yellow Status 16:9 Color Status bits shall be set to 0. For 13 Channel Yellow Status 24:17 virtual channel (29-32) inputs that have 14 Channel Yellow Status 32:25 not been assigned to a physical output, 15 Channel Green Status 8:1 the Channel Color Status bits shall be set 16 Channel Green Status 16:9 to Channel Green Status 24:17 18 Channel Green Status 32:25 19 Channel Red Status 8:1 Field Check Status 20 Channel Red Status 16:9 21 Channel Red Status 24:17 22 Channel Red Status 32:25 23 Channel Yellow Status 8:1 24 Channel Yellow Status 16:9 25 Channel Yellow Status 24:17 26 Channel Yellow Status 32:25 27 Channel Green Status 8:1 28 Channel Green Status 16:9 29 Channel Green Status 24:17 30 Channel Green Status 32:25 31 Control Status #1 Control Status #1 Field Check Status bits shall be set to 1 for channels that are sensed with field check status. For channel inputs that have been remapped to a virtual channel (29-32), the Field Check Status bits shall be set to 0. For virtual channel (29-32) inputs that have not been assigned to a physical output, the Field Check Status bits shall be set to 0. b7 = Start-up Call (1=Exit from Flash) b6 = Flasher Output Fail (1 = Fail) b5 = Rear Door (1=Open) b4 = Front Door (1=Open) b3 = MAIN CONTACTOR Coil (1=Active) b2 = MAIN CONTACTOR Secondary (1=Active) b1 = FTR Coil Drive (1= Active) b0 = Output Relay Transfer (1=Fault) 32 Control Status #2 Control Status #2 b7 = Reserved b6 = Reserved b5 = Reserved b4 = Reserved b3 = Reserved b2 = HDFU #2 Comm error b1 = HDFU #1 Comm error b0 = Configuration Change ATC5301v0202_ Page 122

133 Byte # Contents Description This bit set to 1 indicates the configuration programming has changed since the last poll of message 65. It shall also be set to 1 when the CMU is exiting flash (Start-up Call bit changes from 0 to 1) and at CMU power-up. 33 Mains Raw Voltage CMU Mains Voltage 34 Assembly #1 Signal Power Voltage HDSP Signal Voltage 35 Assembly #2 Signal Power Voltage Signal Voltage for any HDSP in assembly #1 (channels 1:16) Signal Voltage for any HDSP in assembly #2 (channels 17:32) 36 Channel 1 Red Voltage Channel Input Voltages 37 Channel 2 Red Voltage 38 Channel 3 Red Voltage 39 Channel 4 Red Voltage 40 Channel 5 Red Voltage 41 Channel 6 Red Voltage 42 Channel 7 Red Voltage 43 Channel 8 Red Voltage 44 Channel 9 Red Voltage 45 Channel 10 Red Voltage 46 Channel 11 Red Voltage 47 Channel 12 Red Voltage 48 Channel 13 Red Voltage 49 Channel 14 Red Voltage 50 Channel 15 Red Voltage 51 Channel 16 Red Voltage 52 Channel 17 Red Voltage 53 Channel 18 Red Voltage 54 Channel 19 Red Voltage 55 Channel 20 Red Voltage 56 Channel 21 Red Voltage 57 Channel 22 Red Voltage 58 Channel 23 Red Voltage 59 Channel 24 Red Voltage 60 Channel 25 Red Voltage 61 Channel 26 Red Voltage 62 Channel 27 Red Voltage 63 Channel 28 Red Voltage 64 Channel 29 Red Voltage 65 Channel 30 Red Voltage 66 Channel 31 Red Voltage The Channel input voltages shall be the most recent values reported from the HDSPs. For channel inputs that have been remapped to a virtual channel (29-32), the Channel Voltage value shall be set to 0. ATC5301v0202_ Page 123

134 Byte # Contents Description 67 Channel 32 Red Voltage 68 Channel 1 Yellow Voltage 69 Channel 2 Yellow Voltage 70 Channel 3 Yellow Voltage 71 Channel 4 Yellow Voltage 72 Channel 5 Yellow Voltage 73 Channel 6 Yellow Voltage 74 Channel 7 Yellow Voltage 75 Channel 8 Yellow Voltage 76 Channel 9 Yellow Voltage 77 Channel 10 Yellow Voltage 78 Channel 11 Yellow Voltage 79 Channel 12 Yellow Voltage 80 Channel 13 Yellow Voltage 81 Channel 14 Yellow Voltage 82 Channel 15 Yellow Voltage 83 Channel 16 Yellow Voltage 84 Channel 17 Yellow Voltage 85 Channel 18 Yellow Voltage 86 Channel 19 Yellow Voltage 87 Channel 20 Yellow Voltage 88 Channel 21 Yellow Voltage 89 Channel 22 Yellow Voltage 90 Channel 23 Yellow Voltage 91 Channel 24 Yellow Voltage 92 Channel 25 Yellow Voltage 93 Channel 26 Yellow Voltage 94 Channel 27 Yellow Voltage 95 Channel 28 Yellow Voltage 96 Channel 29 Yellow Voltage 97 Channel 30 Yellow Voltage 98 Channel 31 Yellow Voltage 99 Channel 32 Yellow Voltage 100 Channel 1 Green Voltage 101 Channel 2 Green Voltage 102 Channel 3 Green Voltage 103 Channel 4 Green Voltage 104 Channel 5 Green Voltage 105 Channel 6 Green Voltage 106 Channel 7 Green Voltage 107 Channel 8 Green Voltage 108 Channel 9 Green Voltage 109 Channel 10 Green Voltage ATC5301v0202_ Page 124

135 Byte # Contents Description 110 Channel 11 Green Voltage 111 Channel 12 Green Voltage 112 Channel 13 Green Voltage 113 Channel 14 Green Voltage 114 Channel 15 Green Voltage 115 Channel 16 Green Voltage 116 Channel 17 Green Voltage 117 Channel 18 Green Voltage 118 Channel 19 Green Voltage 119 Channel 20 Green Voltage 120 Channel 21 Green Voltage 121 Channel 22 Green Voltage 122 Channel 23 Green Voltage 123 Channel 24 Green Voltage 124 Channel 25 Green Voltage 125 Channel 26 Green Voltage 126 Channel 27 Green Voltage 127 Channel 28 Green Voltage 128 Channel 29 Green Voltage 129 Channel 30 Green Voltage 130 Channel 31 Green Voltage 131 Channel 32 Green Voltage 132 Channel 1 Red Current (LS) HDSP Load Current scaled to 1 ma per bit 133 Channel 1 Red Current (MS) 134 Channel 2 Red Current (LS) 135 Channel 2Red Current (MS) 136 Channel 3 Red Current (LS) 137 Channel 3 Red Current (MS) 138 Channel 4 Red Current (LS) 139 Channel 4 Red Current (MS) 140 Channel 5 Red Current (LS) 141 Channel 5 Red Current (MS) 142 Channel 6 Red Current (LS) 143 Channel 6 Red Current (MS) 144 Channel 7 Red Current (LS) 145 Channel 7 Red Current (MS) 146 Channel 8 Red Current (LS) 147 Channel 8 Red Current (MS) 148 Channel 9 Red Current (LS) 149 Channel 9 Red Current (MS) 150 Channel 10 Red Current (LS) 151 Channel 10 Red Current (MS) 152 Channel 11 Red Current (LS) ATC5301v0202_ Page 125

136 Byte # Contents Description 153 Channel 11 Red Current (MS) 154 Channel 12 Red Current (LS) 155 Channel 12 Red Current (MS) 156 Channel 13 Red Current (LS) 157 Channel 13 Red Current (MS) 158 Channel 14 Red Current (LS) 159 Channel 14 Red Current (MS) 160 Channel 15 Red Current (LS) 161 Channel 15 Red Current (MS) 162 Channel 16 Red Current (LS) 163 Channel 16 Red Current (MS) 164 Channel 17 Red Current (LS) 165 Channel 17 Red Current (MS) 166 Channel 18 Red Current (LS) 167 Channel 18 Red Current (MS) 168 Channel 19 Red Current (LS) 169 Channel 19 Red Current (MS) 170 Channel 20 Red Current (LS) 171 Channel 20 Red Current (MS) 172 Channel 21 Red Current (LS) 173 Channel 21 Red Current (MS) 174 Channel 22 Red Current (LS) 175 Channel 22 Red Current (MS) 176 Channel 23 Red Current (LS) 177 Channel 23 Red Current (MS) 178 Channel 24 Red Current (LS) 179 Channel 24 Red Current (MS) 180 Channel 25 Red Current (LS) 181 Channel 25 Red Current (MS) 182 Channel 26 Red Current (LS) 183 Channel 26 Red Current (MS) 184 Channel 27 Red Current (LS) 185 Channel 27 Red Current (MS) 186 Channel 28 Red Current (LS) 187 Channel 28 Red Current (MS) 188 Channel 29 Red Current (LS) 189 Channel 29 Red Current (MS) 190 Channel 30 Red Current (LS) 191 Channel 30 Red Current (MS) 192 Channel 31 Red Current (LS) 193 Channel 31 Red Current (MS) 194 Channel 32 Red Current (LS) 195 Channel 32 Red Current (MS) ATC5301v0202_ Page 126

137 Byte # Contents Description 196 Channel 1 Yellow Current (LS) 197 Channel 1 Yellow Current (MS) 198 Channel 2 Yellow Current (LS) 199 Channel 2Yellow Current (MS) 200 Channel 3 Yellow Current (LS) 201 Channel 3 Yellow Current (MS) 202 Channel 4 Yellow Current (LS) 203 Channel 4 Yellow Current (MS) 204 Channel 5 Yellow Current (LS) 205 Channel 5 Yellow Current (MS) 206 Channel 6 Yellow Current (LS) 207 Channel 6 Yellow Current (MS) 208 Channel 7 Yellow Current (LS) 209 Channel 7 Yellow Current (MS) 210 Channel 8 Yellow Current (LS) 211 Channel 8 Yellow Current (MS) 212 Channel 9 Yellow Current (LS) 213 Channel 9 Yellow Current (MS) 214 Channel 10 Yellow Current (LS) 215 Channel 10 Yellow Current (MS) 216 Channel 11 Yellow Current (LS) 217 Channel 11 Yellow Current (MS) 218 Channel 12 Yellow Current (LS) 219 Channel 12 Yellow Current (MS) 220 Channel 13 Yellow Current (LS) 221 Channel 13 Yellow Current (MS) 222 Channel 14 Yellow Current (LS) 223 Channel 14 Yellow Current (MS) 224 Channel 15 Yellow Current (LS) 225 Channel 15 Yellow Current (MS) 226 Channel 16 Yellow Current (LS) 227 Channel 16 Yellow Current (MS) 228 Channel 17 Yellow Current (LS) 229 Channel 17 Yellow Current (MS) 230 Channel 18 Yellow Current (LS) 231 Channel 18 Yellow Current (MS) 232 Channel 19 Yellow Current (LS) 233 Channel 19 Yellow Current (MS) 234 Channel 20 Yellow Current (LS) 235 Channel 20 Yellow Current (MS) 236 Channel 21 Yellow Current (LS) 237 Channel 21 Yellow Current (MS) 238 Channel 22 Yellow Current (LS) ATC5301v0202_ Page 127

138 Byte # Contents Description 239 Channel 22 Yellow Current (MS) 240 Channel 23 Yellow Current (LS) 241 Channel 23 Yellow Current (MS) 242 Channel 24 Yellow Current (LS) 243 Channel 24 Yellow Current (MS) 244 Channel 25 Yellow Current (LS) 245 Channel 25 Yellow Current (MS) 246 Channel 26 Yellow Current (LS) 247 Channel 26 Yellow Current (MS) 248 Channel 27 Yellow Current (LS) 249 Channel 27 Yellow Current (MS) 250 Channel 28 Yellow Current (LS) 251 Channel 28 Yellow Current (MS) 252 Channel 29 Yellow Current (LS) 253 Channel 29 Yellow Current (MS) 254 Channel 30 Yellow Current (LS) 255 Channel 30 Yellow Current (MS) 256 Channel 31 Yellow Current (LS) 257 Channel 31 Yellow Current (MS) 258 Channel 32 Yellow Current (LS) 259 Channel 32 Yellow Current (MS) 260 Channel 1 Green Current (LS) 261 Channel 1 Green Current (MS) 262 Channel 2 Green Current (LS) 263 Channel 2Green Current (MS) 264 Channel 3 Green Current (LS) 265 Channel 3 Green Current (MS) 266 Channel 4 Green Current (LS) 267 Channel 4 Green Current (MS) 268 Channel 5 Green Current (LS) 269 Channel 5 Green Current (MS) 270 Channel 6 Green Current (LS) 271 Channel 6 Green Current (MS) 272 Channel 7 Green Current (LS) 273 Channel 7 Green Current (MS) 274 Channel 8 Green Current (LS) 275 Channel 8 Green Current (MS) 276 Channel 9 Green Current (LS) 277 Channel 9 Green Current (MS) 278 Channel 10 Green Current (LS) 279 Channel 10 Green Current (MS) 280 Channel 11 Green Current (LS) 281 Channel 11 Green Current (MS) ATC5301v0202_ Page 128

139 Byte # Contents Description 282 Channel 12 Green Current (LS) 283 Channel 12 Green Current (MS) 284 Channel 13 Green Current (LS) 285 Channel 13 Green Current (MS) 286 Channel 14 Green Current (LS) 287 Channel 14 Green Current (MS) 288 Channel 15 Green Current (LS) 289 Channel 15 Green Current (MS) 290 Channel 16 Green Current (LS) 291 Channel 16 Green Current (MS) 292 Channel 17 Green Current (LS) 293 Channel 17 Green Current (MS) 294 Channel 18 Green Current (LS) 295 Channel 18 Green Current (MS) 296 Channel 19 Green Current (LS) 297 Channel 19 Green Current (MS) 298 Channel 20 Green Current (LS) 299 Channel 20 Green Current (MS) 300 Channel 21 Green Current (LS) 301 Channel 21 Green Current (MS) 302 Channel 22 Green Current (LS) 303 Channel 22 Green Current (MS) 304 Channel 23 Green Current (LS) 305 Channel 23 Green Current (MS) 306 Channel 24 Green Current (LS) 307 Channel 24 Green Current (MS) 308 Channel 25 Green Current (LS) 309 Channel 25 Green Current (MS) 310 Channel 26 Green Current (LS) 311 Channel 26 Green Current (MS) 312 Channel 27 Green Current (LS) 313 Channel 27 Green Current (MS) 314 Channel 28 Green Current (LS) 315 Channel 28 Green Current (MS) 316 Channel 29 Green Current (LS) 317 Channel 29 Green Current (MS) 318 Channel 30 Green Current (LS) 319 Channel 30 Green Current (MS) 320 Channel 31 Green Current (LS) 321 Channel 31 Green Current (MS) 322 Channel 32 Green Current (LS) 323 Channel 32 Green Current (MS) 324 HDFU #1, 1-1 Current (LS) HDFU Load Current scaled to 1 ma per bit ATC5301v0202_ Page 129

140 Byte # Contents Description 325 HDFU #1, 1-1 Current (MS) 326 HDFU #1, 1-2 Current (LS) 327 HDFU #1, 1-2 Current (MS) 328 HDFU #1, 2-1 Current (LS) 329 HDFU #1, 2-1 Current (MS) 330 HDFU #1, 2-2 Current (LS) 331 HDFU #1, 2-2 Current (MS) 332 HDFU #1, Aux 1Current (LS) 333 HDFU #1, Aux 1Current (MS) 334 HDFU #1, Aux 2Current (LS) 335 HDFU #1, Aux 2Current (MS) 336 HDFU #2, 1-1 Current (LS) 337 HDFU #2, 1-1 Current (MS) 338 HDFU #2, 1-2 Current (LS) 339 HDFU #2, 1-2 Current (MS) 340 HDFU #2, 2-1 Current (LS) 341 HDFU #2, 2-1 Current (MS) 342 HDFU #2, 2-2 Current (LS) 343 HDFU #2, 2-2 Current (MS) 344 HDFU #2, Aux 1Current (LS) 345 HDFU #2, Aux 1Current (MS) 346 HDFU #2, Aux 2Current (LS) 347 HDFU #2, Aux 2Current (MS) 348 Binary Seconds CMU Time and Date 349 Binary Minutes 350 Binary Hours (0:23) 351 Binary Date 352 Binary Month 353 Binary Year 354 Voltage * 4 CMU 24VDC Supply Voltage 355 Voltage * 4 CMU 48VDC Supply Voltage 356 degrees F + 40 CMU Temperature (Fahrenheit) 357 Red Status 8:1 Channel Current Sense Status 358 Red Status 16:9 359 Red Status 24: Red Status 32: Yellow Status 8:1 362 Yellow Status 16:9 363 Yellow Status 24: Yellow Status 32: Green Status 8:1 366 Green Status 16:9 367 Green Status 24:17 Status bits shall be set to 1 for channels that are sensed active. Status bits shall be set to 0 for channels that have the Current Sense monitor function disabled. ATC5301v0202_ Page 130

141 Byte # Contents Description 368 Green Status 32: Flasher Status Flasher Status (1=Fail) b0 = HDFU #1 FL1-1 b1 = HDFU #1 FL1-2 b2 = HDFU #1 FL2-1 b3 = HDFU #1 FL2-2 b4 = HDFU #2 FL1-1 b5 = HDFU #2 FL1-2 b6 = HDFU #2 FL2-1 b7 = HDFU #2 FL SB#2 Communications Protocol General Serial Bus #2 (SB#2) shall be dedicated to gathering preprocessed data from the Cabinet Smart Input Devices resident in the input functionalities. SB#2 connects in parallel with C12S of the ATC 5201 Controller Unit and one or more SIUs. Each model 2218 SIU routes SB#2 to one or more sensor devices using the INBUS function. This SB#2 can be for ATC data collection such as sensor operational status, detection speed reports, occupancy reports, vehicle counts, etc Data Link Layer For INBUS SB#2 shall be designed to operate Asynchronous (1) START BIT Programmable number of DATA BITS (1) or (2) STOP BIT(s) Optional PARITY BIT Selectable data rates up to 19,200 bits per second. For other applications defined by the ATC, the SB#2 is designed to operate up to a 614.4K bps synchronous data rate Communication Frames The protocol for SB#2 is not controlled by this standard. 9.3 SB#3 Communications Protocol General Serial Bus #3 is used by the CMU2212 to communicate with the 2202 HDSP/FU and the model 2220 ADU. ATC5301v0202_ Page 131

142 9.3.2 Serial Bus Terminations See section Electrical The Serial Bus #3 shall consist of two interface links (TXD ± and RXD ±) conforming to the TIA-485-A, Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems. Where differences occur between the TIA-485-A standard and this document, this document shall govern. All voltage potentials on the 2202 HDSP/FU SB#3 interface shall be referenced to CMU MAINS GROUND Data Link Layer The data link layer protocol is based on a subset of HDLC as defined by ISO/IEC 13239:2002. Each frame shall consist of the following fields: Flag byte = 0x7E Address byte = 0x01 through 0x20 for HDFSP/FU, 0xFA for ADU2220 Control byte = 0x13 (U Format) Information field = defined below in Section 9.3.7, 9.3.8, and Frame Check Sequence = 16 bit FCS procedure defined in clause of ISO/IEC 13239:2002. Flag byte = 0x7E Transmission shall be in start/stop mode with basic transparency defined by clause of ISO/IEC 13239:2002 applied. The format shall be 8 bit data, 1 stop bit, no parity, and 307,200 bits per second (±2%). Only asynchronous half duplex operation shall be permitted Procedures Frames transmitted by the CMU-2212 shall be referred to as command frames and frames transmitted by the 2202 HDSP/FU and ADU shall be referred to as response frames. Response frames shall only be transmitted as a result of correctly receiving a command frame. The first eight bits in each information field shall contain the Frame Type number. Reserved bits in any message shall always be set to zero by the transmitting station Message Timing The 2202 HDSP/FU and ADU shall begin its response to command frames from the CMU-2212 within a designated period of time following the correct reception of a complete command frame including the closing flag. This period shall be known as the Service Time and shall have a maximum value of 500 microseconds. The 2202 HDSP/FU and ADU TXD link output shall be in the high impedance state outside of the interval defined by the Service Time plus Response Time. ATC5301v0202_ Page 132

143 The 2202 HDSP/FU and ADU shall complete its transmission of the response frame including the closing flag within a designated time known as the Response Time, depending on the number of bytes transmitted in the response frame. The 2202 HDSP/FU and ADU TXD link output shall transition to a high impedance state a maximum of 25 microseconds following the transmission of the closing flag. The Response Time period shall have a maximum value of: (1.1)*(# of bytes in information field + 6)*(10/307200) Note that due to the transparency mechanism, any occurrence of the flag byte (0x7E) or control escape byte (0x7D) in the information field adds a second byte to the count. Thus, the number of bytes in the information field could be higher if data characters are 0x7E or 0x7D. Following the transmission of each command frame, there shall be a Dead Time during which the CMU-2212 does not transmit. This Dead Time shall be a minimum of the Service Time plus the Response Time SB#3 Information Field Formats The first eight bits in each information field shall contain the frame Type Number. There shall be a maximum of 64 different command frame types defined by this standard and 64 different response frame types defined by this standard. Additionally, there shall be 64 different command frame types reserved for manufacturers use and 64 different response frame types reserved for manufacturer s use, as outlined below. Table 64: SB#3 Frame Types Frame Types Function 0-63 Command Frame Command Frame, Manufacturers Use Response Frame Response Frame, Manufacturers Use The information fields of frame types 64 through 127 and 192 through 255 shall contain a manufacturer specific code (MFG Code). The manufacturer specific code is a 16 bit binary number which shall be placed in bits 9 24 of the information field. These codes are maintained and issued by NEMA. Reserved bits shall always be set to zero by the transmitting station. The SB#3 frames to and from the model 2220 shall use only Command frame types and corresponding Response frame types The intention in placing manufacturer specific codes in frame types that are reserved for manufacturers use is to allow equipment to differentiate between frames that may contain the same frame type. (Authorized Engineering Information.) ATC5301v0202_ Page 133

144 HDSP/FU SB#3 Frame Types Voltage / Current Encoding RMS voltage and current data shall be reported as a 14 bit positive integer, and shall be encoded in the frames as follows: The LSB byte in the frame is composed of the least significant 7 bits (b6:b0) of the reported value with bit 7 of the frame byte set to 1. The MSB byte in the frame is composed of the next most significant 7 bits (b13:b7) of the reported value with bit 7 of the frame byte set to 1. Bit # LSB 1 b6 b5 b4 b3 b2 b1 b0 MSB 1 b13 b12 b11 b10 b9 b8 b HDSP/FU Status Type 01 Command HDSP Status Table 65: SB#3 Type 01 Command Byte # Contents Description 1 01 Frame Type 2 Channel Fault Indicator Channel ID Indicators b0 = Channel 1a indicator active b1 = Channel 2a indicator active b2 = Channel 1b indicator active b3 = Channel 2b indicator active b4 = Display Sleep mode b5 = Disable RxTx Indicators b6 = reserved 3 Channel Output Disable b7 = 1 Channel 1, 2 Output Disable b0 = Channel 1 Red Disable b1 = Channel 1 Yellow Disable b2 = Channel 1 Green Disable b3 = Channel 2 Red Disable b4 = Channel 2 Yellow Disable b5 = Channel 2 Green Disable b6 = Reserved b7 = 1 ATC5301v0202_ Page 134

145 Type 129 Response HDSP Status Table 66: SB#3 Type 129 Response Byte # Contents Description Frame Type 2 Status HDSP Status b0 = set to 1 if +24 VDC MONITOR input is Low b1 = set if 2202 HDSP/FU has reset since last poll b2 = set if last RMS period data was not transmitted b3 = diagnostic failure b4:6 = Reserved b7 = 1 3 Signal Power LSB HV+SIGNAL or LV+SIGNAL RMS Voltage (Units are Signal Power MSB Vrms) 5 Channel 1 Red LSB Field Output RMS Voltage (Units are 0.1 Vrms) 6 Channel 1 Red MSB 7 Channel 1 Yellow LSB 8 Channel 1 Yellow MSB 9 Channel 1 Green LSB 10 Channel 1 Green MSB 11 Channel 2 Red LSB 12 Channel 2 Red MSB 13 Channel 2 Yellow LSB 14 Channel 2 Yellow MSB 15 Channel 2 Green LSB 16 Channel 2 Green MSB 17 Channel 1 Red LSB Field Output RMS Current (Units are 1 Milliampere) 18 Channel 1 Red MSB 19 Channel 1 Yellow LSB 20 Channel 1 Yellow MSB 21 Channel 1 Green LSB 22 Channel 1 Green MSB 23 Channel 2 Red LSB 24 Channel 2 Red MSB 25 Channel 2 Yellow LSB 26 Channel 2 Yellow MSB ATC5301v0202_ Page 135

146 Byte # Contents Description 27 Channel 2 Green LSB 28 Channel 2 Green MSB 29 Channel Input Control Channel 1, 2 Input State (1=Input Active) b0 = Channel 1 Red On b1 = Channel 1 Yellow On b2 = Channel 1 Green On b3 = Channel 2 Red On b4 = Channel 2 Yellow On b5 = Channel 2 Green On b6 = reserved b7 = 1 30 Channel Output Disabled Channel 1, 2 (1=Output Disabled) b0 = Channel 1 Red Disabled b1 = Channel 1 Yellow Disabled b2 = Channel 1 Green Disabled b3 = Channel 2 Red Disabled b4 = Channel 2 Yellow Disabled b5 = Channel 2 Green Disabled b6 = reserved b7 = Type 02 Command HDFU Status Table 67: SB#3 Type 02 Command Byte # Contents Description 1 02 Frame Type 2 Channel Output Disable Channel 1, 2 Output Disable (1=Output Disabled) b0 = Channel 1-1 Disable b1 = Channel 1-2 Disable b2 = Channel 1 Aux Disable (Ch1 Green) b3 = Channel 2 Aux Disable (Ch 2 Red) b4 = Channel 2-1 Disable b5 = Channel 2-2 Disable b6 = Disable RxTx Indicators 3 Channel Fault Indicator b7 = 1 Channel ID Indicators b0 = Channel 1a indicator active b1 = Channel 2a indicator active b2 = Channel 1b indicator active b3 = Channel 2b indicator active b4 = Display Sleep mode ATC5301v0202_ Page 136

147 Byte # Contents Description b5 = Use display bits b0:3 b6 = reserved b7 = 1 If b5 is set, then the HDFU will use b3:b0 to drive the Channel ID LEDs Type 130 Response HDFU Status Table 68: SB#3 Type 130 Response Byte # Contents Description Frame Type 2 HDFU Status HDFU Status b0 = Reserved b1 = set if HDFU has reset since last poll b2 = set if last RMS period data was not transmitted b3 = diagnostic failure b4:6 = Reserved b7 = 1 3 Signal Power LSB HV+SIGNAL or LV+SIGNAL RMS Voltage (Units are Signal Power MSB Vrms) 5 Channel 1-1 LSB Field Output RMS Voltage (Units are 0.1 Vrms) 6 Channel 1-1 MSB 7 Channel 1-2 LSB 8 Channel 1-2 MSB 9 Channel 1 Aux LSB 10 Channel 1 Aux MSB 11 Channel 2 Aux LSB 12 Channel 2 Aux MSB 13 Channel 2-1 LSB 14 Channel 2-1 MSB 15 Channel 2-2 LSB 16 Channel 2-2 MSB 17 Channel 1-1 LSB Field Output RMS Current (Units are 1 Milliampere) 18 Channel 1-1 MSB 19 Channel 1-2 LSB 20 Channel 1-2 MSB 21 Channel 1 Aux LSB 22 Channel 1 Aux MSB 23 Channel 2 Aux LSB 24 Channel 2 Aux MSB 25 Channel 2-1 LSB ATC5301v0202_ Page 137

148 Byte # Contents Description 26 Channel 2-1 MSB 27 Channel 2-2 LSB 28 Channel 2-2 MSB 29 Channel Input Control Channel 1, 2 Input State b0 = 1-1 Control On b1 = 1-2 Control On b2 = Channel X On b3 = Channel Y On b4 = 2-1 Control On b5 = 2-2 Control On b6 = Reserved b7 = 1 30 Channel Output Disabled Channel 1, 2 (1=Output Disabled) b0 = Channel 1-1 Disabled b1 = Channel 1-2 Disabled b2 = Channel X Disabled b3 = Channel Y Disabled b4 = Channel 2-1 Disabled b5 = Channel 2-2 Disabled b6 = Reserved b7 = Type 60 Command HDFU Module ID Table 69: SB#3 Type 60 Command Byte # Contents Description 1 60 Frame Type Type 188 Response HDFU Module ID Table 70: SB#3 Type 188 Response Byte # Contents Description Frame Type 2 Device Type 2202 HDSP/FU Type 1 = 2202 HDSP/FU-HV 2 = 2202 HDSP/FU-LV 3 = 2202 HDSP/FU-VHV (reserved) 4 = 2200 HDSP-HV ATC5301v0202_ Page 138

149 Byte # Contents Description 5 = 2200 HDSP-LV 6 = 2200 HDSP-VHV (reserved) 7 = 2204 HDFU-HV 8 = 2204 HDFU-LV 9 = 2204 HDFU-VHV (reserved) 10:255 = Reserved 3:62 ID String Manufacturer-specified Identification String A packed 60 character ID shall be stored in ASCII format. Allowable characters are 020h through 07Eh. If less than 60 characters are used, the unused locations shall be set to 20h. Default programming shall be 20h Type 01, 02 Response Negative Acknowledge This frame shall be transmitted from the 2202 HDSP/FU to the CMU as a negative acknowledge response frame if the 2202 HDSP/FU correctly receives a Type 01 command frame or a Type 02 command frame with an invalid parameter, including the Frame Type. Table 71: SB#3 Type 128 Response Byte # Contents Description Frame Type 2 Status 2202 HDSP/FU SB#3 Error Type b0 = set to 1 if invalid frame type received b1 = set to 1 if invalid parameter is received b2:6 = reserved b7 = 1 3 Parameter Number Invalid Parameter Byte Number The byte number of the Type 01 or Type 02 frame that contained the invalid parameter. If more than one parameter is invalid then this offset shall be the first byte in the frame in error Model 2220 SB#3 Frame Types The model 2220 shall respond to serial data frames transmitted by the CMU2212 on the Serial Bus #3. The SB#3 address of the model 2220 shall be 0xFA Type 70 Command Set LEDs Table 72: ADU Type 70 Command ATC5301v0202_ Page 139

150 Byte # Contents Description 1 70 Frame Type MFG Code LS MFG Code MS 4 LED Control b0 = LED Enable b1 = Disable RxTx Indicators b7:2 = reserved 5 Ch 8:1 6 Ch 16:9 Blue LEDs 7 Ch 24:17 8 Ch 32:25 9 Ch 8:1 Red LEDs 12 Ch 32:25 13 Ch 8:1 Yellow LEDs 16 Ch 32:25 17 Ch 8:1 Green LEDs 20 Ch 32: Ch 16:9 Ch 16:9 Ch 16: Ch 24:17 Ch 24:17 Ch 24: Type 198 Response Set LEDs Table 73: ADU Type 198 Response Byte # Contents Description Frame Type MFG Code LS MFG Code MS 4 Button Status (A value of 1 shall be set when the button is in the pressed state) b0 = Help b1 = Next b2 = Back b3 = Select b4 = Exit b7:5 = reserved ATC5301v0202_ Page 140

151 Type 71 Command Set LCD Table 74: ADU Type 71 Command Byte # Contents Description 1 71 Frame Type MFG Code LS MFG Code MS 4 LCD Control b0 = Back Light Enable b1 = Heater Enable b7:2 = reserved 5 Line Number LCD Line Number 6 Ascii Char ASCII Text for the 20 Character Line 7 Ascii Char Character #1 is the leftmost character 8 Ascii Char 9 Ascii Char 10 Ascii Char 11 Ascii Char 12 Ascii Char 13 Ascii Char 14 Ascii Char 15 Ascii Char 16 Ascii Char 17 Ascii Char 18 Ascii Char 19 Ascii Char 20 Ascii Char 21 Ascii Char 22 Ascii Char 23 Ascii Char 24 Ascii Char 25 Ascii Char Type 199 Response Set LCD Table 75: ADU Type 199 Response Byte # Contents Description Frame Type MFG Code LS MFG Code MS ATC5301v0202_ Page 141

152 Byte # Contents Description 4 Button Status (A value of 1 shall be set when the button is in the pressed state) b0 = Help b1 = Next b2 = Back b3 = Select b4 = Exit b7:5 = reserved 10 PRODUCT SAFETY AND RELIABILITY 10.1 Mercury Mercury shall not be used in components that will create a disposal issue Shock Hazard For the ATCC Low Voltage Version, voltages shall be constrained to eliminate shock hazard as defined in NFPC 70 B E Arc Flash Electromotive force of electrical signals shall be constrained to eliminate arc flash hazard as defined in NFPC 70 B E 10.4 Flashing Operation During Service and Replacement The cabinet shall be capable of remaining in Flashing Mode when any element of the cabinet is removed or replaced except the combined Power & Service Functionality and Field Termination functionality Mean Time Between Failure (MTBF) If published, MTBF shall be calculated using the latest revision of MIL standard 217 and published with the calculation criteria Derating The parts used to create the elements of the TFCS shall not be operated at greater than 80 percent of their rated values unless otherwise indicated within this standard. 11 ENVIRONMENTAL AND TESTING REQUIREMENTS NOTE: All references in this section to NEMA TS2 explicitly refer to the NEMA Standards Publication TS v3.07, Traffic Controller Assemblies with NTCIP Requirements. ATC5301v0202_ Page 142

153 11.1 General This section establishes the environmental and operational conditions for a First Article ATCC, and defines the minimum test procedures which may be used to demonstrate conformance of an ATCC cabinet with the provisions of the Standard. Testing shall be performed either within an environmental chamber or on a bench. These test procedures do not verify equipment performance under every possible combination of environmental requirements covered by the Standard. However, nothing in this testing profile shall be construed as to relieve the requirement that the equipment provided must fully conform with the Standard under all environmental conditions stated herein Inspection A visual and physical inspection of the ATCC unit shall verify mechanical, dimensional, and assembly conformance to all parts of this standard Testing Certification A complete quality control and final test report shall be supplied with each item Definitions of Design Acceptance Testing (DAT) and Production Testing. Design Acceptance Testing (DAT) is performed on the first article ATCC unit and is a part of the pre-production process. Production testing is performed on all units prior to their shipment to an agency Environmental and Operating Requirements The requirements (voltage, temperature, etc.) of this section shall apply in any combination Voltage and Frequency Operating Voltage The nominal operating voltage shall be 120 VAC, unless otherwise noted for the ATCC High Voltage version (HV) and at 48 VDC for the ATCC Low Voltage version (LV) Operating Frequency The nominal AC line operating frequency range shall be 60 Hz (±3.0 Hz), unless otherwise noted for the ATCC High Voltage version (HV) and at DC for the ATCC Low Voltage version (LV) Transients, Power Service (DAT) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section 2.1.6, Transients, Power Service. ATC5301v0202_ Page 143

154 Nondestructive Transient Immunity (DAT) Nondestructive Transient Immunity (DAT) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section 2.1.8, Nondestruct Transient Immunity, with the following variations: Test voltage amplitude shall be 2000 ± 100 V, both positive and negative polarity Nondestructive Transient protection Output Output AC transient protection The HV cabinet shall provide protection for AC outputs from voltage surges introduced through output wiring. Surge devices shall have a peak surge current rating between 26kA and 240 Joules of energy, clamp voltage of 1KA Output DC transient protection The LV Cabinet shall provide protection for all DC outputs from voltage surges introduced through peripheral load devices (i.e. loop, camera, LED Lamp etc.). The device must be rated to clamp to DC 60 V at a surge current of 250A. An example of such a device would have the same form factor as an HE103C-9. The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section 2.1.8, Nondestruct Transient Immunity, with the following variations: Test voltage amplitude shall be 2000 ± 100 V, both positive and negative polarity Temperature and Humidity The ATC unit under test shall maintain all programmed functions when the temperature and humidity ambients are within the specified limits defined herein Ambient Temperature The operating ambient temperature range shall be from -37 C to +74 C. The storage temperature range shall be from -45 C to +85 C. The rate of change in ambient temperature shall not exceed 18 C per hour, during which the relative humidity shall not exceed 95 percent Humidity The relative humidity shall not exceed 95 percent non-condensing over the temperature range of -37 C to +74 C. Above +46 C, constant absolute humidity shall be maintained. This will result in the relative humidities shown in Table 76 for dynamic testing. ATC5301v0202_ Page 144

155 Table 76: Ambient Temperature versus Relative Humidity At Barometric Pressures (29.92 In. Hg.) (Non-Condensing) Ambient Temperature/ Dry Bulb ( C) Relative Humidity (in%) Ambient Temperature/ Wet Bulb ( C) to to to Test Facilities All instrumentation required in the test procedures, such as voltmeters, ammeters, thermocouples, pulse timers, etc. shall be selected in accordance with good engineering practice. Calibration records for all test equipment shall be provided with test documentation. In all cases where time limit tests are required, the allowance for any instrumentation errors shall be included in the limit test. 1. Variable Voltage Source: A variable source capable of supplying 20 A from 0 VAC to 135 VAC for the ATCC High Voltage version and 0-48 VDC for the ATCC Low Voltage version. 2. Environmental Chamber: An environmental chamber capable of attaining temperatures of -37 C to +74 C and relative humidities given in Table Transient Generator(s): Transient generator(s) capable of supplying the transients outlined in and Test Procedures: Transients, Temperature, Voltage, and Humidity Test A: Placement in Environmental Chamber and Check-Out of Hook-Up (DAT and Production Testing) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test A: Placement in Environmental Chamber and Check-Out of Hook-Up, with the following variations: For DAT purposes only, the transient generator shall be connected to the AC input circuit at a point at least 25 feet from the AC power source and not over 10 feet from the input to the test unit ATC5301v0202_ Page 145

156 Upon the satisfactory completion and verification of the test hook-up, proceed with Test B (DAT) or Test C (DAT and Production Testing. Figure 22 describes the test profile used for Tests C through G to demonstrate the ability of the test unit to function reliably under stated conditions of temperature, voltage and humidity. Where the characteristics of Figure 22 differ from those specified in NEMA TS2, Figure 2-1, those in Figure 22 will apply unless specified otherwise Test B: Temperature Cycling and Applied Transient Tests (Power Service) (DAT) Note: In this section the term dwell refers to an application in its resting state awaiting inputs, and the actual resting state depends on the application. The goal is to determine if the transients introduced affect the operation of the application by triggering false inputs and/or outputs causing inappropriate application program activity (e.g. improper timing, false calls, error alarms, etc). The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test B: Transient Tests (Power Service), with the following variations: Test voltage amplitude in Step 13 shall be 2000 ± 100 V, both positive and negative polarity X X 60 TEMPERATURE, in DEGREES CELSIUS (AMBIENT) X 120 VAC SEE NOTES 1 AND 2 SEE NOTES 1 AND VAC 135 VAC 135 VAC 100 VAC X SEE NOTES 1 AND VAC 40 X X A+B C D E F G Figure 22: Test Profile NOTES: 1. The rate of change in temperature shall not exceed 18 C per hour. ATC5301v0202_ Page 146

157 2. Humidity controls shall be set in conformance with the humidities given in Table 8-1 during the temperature change between Test D and Test E. 3. If a change in both voltage and temperature are required for the next test, the voltage shall be selected prior to the temperature change Test C: Low-Temperature Low-Voltage Tests (DAT and Production Testing) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test C: Low-Temperature Low-Voltage Tests, with the following variations: Utilize Figure 22 for the test profile (temperature: -37 C, low voltage). Skip tests 2.c.2) Timing Accuracy Tests and 2.c.3) Repeatability Test D: Low-Temperature High-Voltage Tests (DAT and Production Testing) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test D: Low-Temperature High-Voltage Tests, with the following variations: Utilize Figure 22 for the test profile (temperature: -37 C). Skip tests 2.c.2) Timing Accuracy Tests and 2.c.3) Repeatability Test E: High-Temperature High-Voltage Tests (DAT and Production Testing) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test E: High-Temperature High-Voltage Tests, with the following variations: Utilize Table Table 76 for the humidity controls. In Step 3, utilize the temperature range of +1.1 C to +46 C and C wet bulb. Skip tests Timing Accuracy Tests and Repeatability Test F: High-Temperature Low-Voltage Tests (DAT and Production Testing) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test F: High-Temperature Low-Voltage Tests, with the following variations: Utilize Table Table 76 for the humidity controls. In Step 3, utilize the temperature range of +1.1 C to +46 C and C wet bulb. Skip tests Timing Accuracy Tests and Repeatability Test G: Test Termination (All tests) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test G: Test Termination, with the following variations: Utilize Figure 22 for the test profile. ATC5301v0202_ Page 147

158 Test H: Appraisal of Equipment Under Test The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section , Test H: Appraisal of Equipment Under Test Vibration Test (DAT) The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section 2.2.8, Vibration Test. Shock and vibration tests shall be performed prior to environmental tests Shock (Impact) Test (DAT) Purpose of Test The ATC unit under test shall meet all requirements as defined in NEMA TS2, Section 2.2.9, Shock (Impact) Test, with the following modifications: a) Program the table to subject the test unit to a 10G force having a duration of 11 ms. b) The test shall use a waveform suitable to simulate a drop test, such as saw tooth. The waveform shall be a saw tooth with 11 ms rise time and 0 ms fall time. c) Subject the test unit to the above test setup three times in both the positive and negative direction. Shock and vibration tests shall be performed prior to environmental tests Electronic Emissions The TFCS shall adhere to the code of Federal Regulations, Title 47 Telecommunications, Chapter 1 Federal Communications Commission, Part 15, tested with the TFCS functionality mounted in a grounded electrical enclosure Electrostatic Discharge The TFCS shall adhere to applicable sections of International Electrotechnical Commission (IEC) Standard :2008 Electromagnetic compatibility (EMC) Part 4-2: Testing and Measurement Techniques Electrostatic Discharge Immunity Test, tested with the TFCS functionality mounted in a grounded electrical enclosure. 12 WIRE REQUIREMENTS 12.1 Capacity ratings All wire used in shall be copper. All #14 to 30 AWG shall be stranded. Wires shall be sized per the ampacity ratings of Table 77. ATC5301v0202_ Page 148

159 Table 77: Ampacity AWG Wire Size Ampacity Rating Conductors Conductors shall conform to military specification MIL-W-16878D, Electrical Insulated High Temperature Wire, type B. Conductors #14 AWG or larger shall be permitted to be UL type THHN Splicing Conductors shall not be spliced between terminations Cables Cable may be used in lieu of individual conductors to interconnect equipment or panels within the controller cabinet. The cable shall be constructed of #28 AWG or larger conductors. Insulation shall have a voltage rating of 300 volts minimum and shall be rated for use at 105 o C. Cables shall be provided with strain relief. 13 ACRONYMS Term AASHTO AC ATC ATCC CB CBD ConOps DC Definition American Association of State Highway and Transportation Officials alternating current Advanced Transportation Controller ATC Cabinet Circuit Breaker Central Business District Concept of Operations direct current ATC5301v0202_ Page 149

160 Term EMI FHWA ESD GFI IEEE I/F I/O IEC IMSA IPC ITE ITS JPO LED MTBF NEC NEMA NRTL NTCIP NFPA PF RFI SDO SEMP SEP SSC StdRS StdHLD TFCS UPS USA USDOT VAC VDC WG Definition electromagnetic interference Federal Highway Administration Electrostatic Discharge Ground Fault Interrupt Institute of Electrical and Electronics Engineers interface input/output International Electrotechnical Commission International Municipal Signal Association Formerly, the Institute for Printed Circuits. This same institution was later called the Institute Interconnecting and Packaging Electronic Circuits. It is now referred to as IPC-Association Connecting Electronics Industries. Institute of Transportation Engineers Intelligent Transportation System Joint Program Office light emitting diode mean time between failures National Electrical Code National Electrical Manufacturers Association Nationally Recognized Testing Lab National Transportation Communications for ITS Protocol National Fire Protection Association power factor radio frequency interference Standard Development Organization System Engineering Management Plan Systems Engineering Process Small-Sized Cabinet Standards Requirements Specification Standards High Level Design transportation field cabinet system Uninterruptible Power Source United States of America United States Department of Transportation voltage alternating current voltage direct current Working Group ATC5301v0202_ Page 150

161 14 NEEDS TO REQUIREMENTS TO DESIGN TRACEABILITY Needs to Requirements of this section were posted on the ITE Community Website in April, 2016 minus Related Design Elements field that was added in May 2018 for traceability to sections of this document. Verify the Requirement Requirement ID Requirement Title Patents and Copyrights Requirement Text Interfaces that are patented or copyrighted shall not be included as part of the TFCS Justification for the Requirement: 1. The user needs the TFCS to be specified as an open architecture system Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Section 9 Describes the standardized interfaces Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 151

162 Verify the Requirement Requirement ID Requirement Title Commonly-Available Components Requirement Text Components that make up the TFCS shall be available for purchase from distribution or shall be able to be fabricated from commonly available materials. Justification for the Requirement: 1. The user needs the TFCS to be specified as an open architecture system. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: After discussion, includes purchased parts available from distributors and fabricated parts available from the manufacturer, such as custom sheet metal or electronic subassemblies. Related Design Elements Fabricated from commonly available materials: Model 2218 Mechanical Details HDSP/FU Mechanical Mechanical Mechanical Form Factor Form Factor Form Factor Form Factor Form Factor Form Factor Form Factor Form Factor Form Factor 14. Form Factor Form Factor Form Factor Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X ATC5301v0202_ Page 152

163 5 Is the requirement verifiable? X 6 If verifiable, by which method? X Insp. Anal. Test Demo. Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. Verify the Requirement Requirement ID Requirement Title Rack Mountable Requirement Text The TFCS subsystems and assemblies shall be suitable for mounting in a 19 inch rack Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: It is the intent of the design team, to focus on the two door cabinet design but the solution should not preclude the use of a single door cabinet with a removable rack. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 153

164 Verify the Requirement Requirement ID Requirement Title Utilizes a Controller Subsystem Requirement Text The TFCS shall utilize a Controller Subsystem (CS) to perform the functions of an application computer and provide external communication interfaces for the TFCS Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. 4. The user needs the TFCS to provide a means to quickly transfer cabinet and application data from an external computer to a TFCS or from one TFCS to another. 5. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 6. The user needs the TFCS to provide uniform internal interfaces and protocols. 7. The user needs the TFCS to have a non-volatile method of maintaining the system reports and logs. Source for Justification: 1. UN ID UN ID UN ID UN ID UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements Serial Bus 1 Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field. ATC5301v0202_ Page 154

165 Verify the Requirement Requirement ID Requirement Title Utilizes an Input Assembly Requirement Text The TFCS shall utilize an input assembly (IA) to accept devices used for field inputs. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Utilize means that an input assembly is required when input devices are used. Does not mean that an input assembly is always required. Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements Sensor Unit IN Slot Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 155

166 Verify the Requirement Requirement ID Requirement Title Utilizes an Output Assembly Requirement Text The TFCS shall utilize an output assembly (OA) to accept devices used for field outputs. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Utilize means that an output assembly is required when output devices are used. Does not mean that an output assembly is always required. Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements Model 2202 High Density Switch Pack / Flasher Unit (HDSP/FU) OUT Slot Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 156

167 Verify the Requirement Requirement ID Requirement Title Utilizes an Input/Output Assembly Requirement Text The TFCS shall utilize an input/output assembly (IOA) to accept devices used for both field inputs and field outputs. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Utilize means that an input/output assembly is required when input and output devices are desired in the same rack to save space. Does not mean that an input/output assembly is always required. Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Typical Input Functionality (Note 1) 2. Figure 3 Typical Input Functionality (Note 1) Mechanical packaging of Input/Output is not controlled by the Standard. Standard provides common signal names, electrical characteristics and protocols to support Input/Output function. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 157

168 Verify the Requirement Requirement ID Requirement Title Utilizes a Field Terminal Assembly Requirement Text The TFCS shall utilize a field termination assembly (FTA) to secure field wiring within the cabinet. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Utilize means that a field terminal assembly is required to secure field wires inside the cabinet, not a direct connection of field wires to assemblies. Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Typical Output Termination Functionality (Note 1) 2. Figure 3 Typical Output Termination Functionality (Note 1) Output Termination Functionality Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 158

169 Verify the Requirement Requirement ID Requirement Title Utilizes a Monitor Assembly Requirement Text The TFCS shall utilize a monitor assembly (MA) to monitor the operation of the TFCS and provide diagnostic information. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Model 2212 Cabinet Monitor Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 159

170 Verify the Requirement Requirement ID Requirement Title Utilizes a Service Assembly Requirement Text The TFCS shall utilize a service assembly (SA) to provide raw power and clean power. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Raw Power is power that is protected against surges and spikes. Clean Power is protected against surges and spikes and filtered to regulate electrical noise. Related Design Elements 1. Figure 2 Service Functionality (Note 1) 2. Figure 3 Service Functionality (Note 1) Flashing Operation During Service and Replacement Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 160

171 Verify the Requirement Requirement ID Requirement Title Utilizes a Serial Bus Assembly Requirement Text The TFCS shall utilize a serial bus assembly (SBA) to facilitate access to the serial bus by the elements of the TFCS. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 SB1 / SB2 2. Figure 3 SB1 / SB SB#1 / SB#2 Interface Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 161

172 Verify the Requirement Requirement ID Requirement Title Utilizes a Clean Power Bus Assembly Requirement Text The TFCS shall utilize a power assembly (CPBA) to distribute clean power for the elements of the TFCS. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Power Functionality (Note 1) 2. Figure 3 Power Functionality (Note 1) Cabinet Power Supply Requirements, High Voltage Versions Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 162

173 Verify the Requirement Requirement ID Requirement Title Utilizes a Cabinet Power Supply Assembly Requirement Text The TFCS shall utilize a cabinet power supply to provide DC power to the elements of the TFCS. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Power Functionality (Note 1) 2. Figure 3 Power Functionality (Note 1) Cabinet Power Supply Requirements, High Voltage Versions Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 163

174 Verify the Requirement Requirement ID Requirement Title Hot-Swappable Input Devices Requirement Text The TFCS input modules shall be hot-swappable within the input assembly. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Sensor Unit (refer to specifications for each sensor type listed) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 164

175 Verify the Requirement Requirement ID Requirement Title Multiple Input Assemblies Requirement Text The TFCS shall support the use of multiple Input Assemblies in a single TFCS. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. 4. The user needs the TFCS to support input devices that have higher channel density than commonly deployed field input devices. Source for Justification: 1. UN ID UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Typical Input Functionality (Note 1) 2. Figure 3 Typical Input Functionality (Note 1) Input Functions SB#1 Address Select Inputs Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 165

176 Verify the Requirement Requirement ID Requirement Title Open Standard Requirement Text The TFCS s physical, electrical and communication interfaces shall be based on existing open standards or defined herein. Justification for the Requirement: 1. The user needs the TFCS to be specified with a modular internal structure. 2. The user needs the TFCS to be extensible. 3. The user needs the TFCS to provide standardized external interfaces and protocols. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Constrain requirement. Communications conform to a referenced standard. If not, the communications interface must be defined in this standard. Extensible relates to future proofing, meaning the interfaces can accommodate future local needs that are unknown at design. Related Design Elements 1. Section 8 INTERFACES (normative references to EIA standards or defined in this standard) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 166

177 Verify the Requirement Requirement ID Requirement Title Input Channels Requirement Text The TFCS shall provide an input assembly that provides for up to 48 input channels. Justification for the Requirement: 2. The user needs the TFCS to be scalable. 3. The user needs the TFCS to be expandable. 4. The user needs the TFCS to support the use of commonly deployed field sensors 5. The user needs the TFCS to support input devices that have higher channel density than commonly deployed field input devices. Source for Justification: 2. UN ID UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Field sensors external to the cabinet Related Design Elements 1. Figure 2 Typical Input Functionality (Note 1) 2. Figure 3 Typical Input Functionality (Note 1) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 167

178 Verify the Requirement Requirement ID Requirement Title Multiple Input Assemblies Requirement Text The TFCS shall support the use of multiple Input Assemblies in a single TFCS. Justification for the Requirement: 1. The user needs the TFCS to be scalable. 2. The user needs the TFCS to be expandable. 3. The user needs the TFCS to be specified with a modular internal structure. 4. The user needs the TFCS to support input devices that have higher channel density than commonly deployed field input devices. Source for Justification: 1. UN ID UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Typical Input Functionality (Note 1) 2. Figure 3 Typical Input Functionality (Note 1) Input Functions SB#1 Address Select Inputs Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 168

179 Verify the Requirement Requirement ID Requirement Title At least seven high density switch pack modules Requirement Text The TFCS output assembly shall accept at least 7 high density switch pack (HDSP) modules. Justification for the Requirement: 1. The user needs the TFCS to be scalable. 2. The user needs the TFCS to be expandable. 3. The user needs the TFCS to be of a design that reduces the time required for maintenance personnel to perform maintenance actions in the field. 4. The user needs the TFCS to support input devices that have higher channel density than commonly deployed field input devices. 5. The user needs the TFCS to support the use of output devices that have higher channel density than the commonly deployed field output devices Source for Justification: 1. UN ID UN ID UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements 1. Figure 2 Typical Output Functionality (Note 1) 2. Figure 3 Typical Output Functionality (Note 1) Output Functions Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 169

180 Verify the Requirement Requirement ID Requirement Title Subsystems not interdependent Requirement Text Replacement of any individual TFCS subsystems in any combination shall not affect the operation of other TFCS subsystems. Justification for the Requirement: 1. The user needs the TFCS to be scalable. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements Flashing Operation During Service and Replacement Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 170

181 Verify the Requirement Requirement ID Requirement Title Subsystem Quantities Requirement Text The Subsystem quantities shall match those addresses assigned in Section of the cabinet V1 standard Justification for the Requirement: 1. The user needs the TFCS to be scalable. 2. The user needs the TFCS to be expandable. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Scalable means deployable for a range of applications. Expandable means can add capacity later. Related Design Elements SIU2218 SB#1 Frame Types includes the addresses of the V1 standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 171

182 Verify the Requirement Requirement ID Requirement Title Multiple Output Assemblies Requirement Text The TFCS shall support the use of multiple Output Assemblies in a single TFCS. Justification for the Requirement: 1. The user needs the TFCS to be expandable. 2. The user needs the TFCS to support the use of output devices that have higher channel density than the commonly deployed field output devices. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Expandable means can add capacity later. Related Design Elements 1. Figure 2 Typical Output Functionality (Note 1) 2. Figure 3 Typical Output Functionality (Note 1) Output Functions Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 172

183 Verify the Requirement Requirement ID Requirement Title Future Subsystems Requirement Text The TFCS shall reserve the Subsystem module addresses for future use shown in Section of the cabinet V1 standard. Justification for the Requirement: 1. The user needs the TFCS to be extensible. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Extensible relates to future proofing, meaning the interfaces can accommodate future local needs that are unknown at design. Related Design Elements SB#1 Communications Protocol (RESERVED fields) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 173

184 Verify the Requirement Requirement ID Requirement Title Relocating Elements Requirement Text The TFCS CS, IA, OA, IOA, FTA, SBA, MA, CPBA and SA shall be able to be located in various positions within the TFCS. Justification for the Requirement: 1. The user needs the TFCS to be space-efficient. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1 2. Figure 3, Note 1 Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 174

185 Verify the Requirement Requirement ID Requirement Title /7 Operation Requirement Text The TFCS shall operate 24 hours a day and seven days a week without user intervention. Justification for the Requirement: 1. The user needs the TFCS to be designed for reliable and continuous operation without user intervention. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Section 10.6 Derating 2. The parts used to create the elements of the TFCS shall not be operated at greater than 80 percent of their rated values unless otherwise indicated within this standard. 3. ENVIRONMENTAL AND TESTING REQUIREMENTS Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 175

186 Verify the Requirement Requirement ID Requirement Title MTBF Requirement Text If published, MTBF shall be calculated using the latest revision of MIL standard 217 and published with the calculation criteria. Justification for the Requirement: 1. The user needs the TFCS to be designed for reliable and continuous operation without user intervention. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Mean Time Between Failure (MTBF) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 176

187 Verify the Requirement Requirement ID Requirement Title Design Life Requirement Text Design Life shall be stated in terms of MTBF. Justification for the Requirement: 1. The user needs the TFCS to be designed for reliable and continuous operation without user intervention. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Mean Time Between Failure (MTBF) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 177

188 Verify the Requirement Requirement ID Requirement Title Derating Requirement Text The parts used to create the elements of the TFCS shall not be operated at greater than 80 percent of their rated values unless otherwise indicated within this standard. Justification for the Requirement: 1. The user needs the TFCS to be designed for reliable and continuous operation without user intervention. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Derating Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 178

189 Verify the Requirement Requirement ID Requirement Title Corrosion Resistance Requirement Text The TFCS shall be constructed of materials that are inherently corrosion resistant or have been treated so as to be corrosion resistant. Justification for the Requirement: 1. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 179

190 Verify the Requirement Requirement ID Requirement Title Aluminum Sheet Requirement Text Aluminum sheets used in the construction of the TFCS shall be Type 3003-H14 or Type 5052-H32 ASTM Designation B209 aluminum alloy. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 180

191 Verify the Requirement Requirement ID Requirement Title Aluminum Sheet Plating Requirement Text Aluminum sheeting used in the construction of the TFCS internal subassemblies shall treated using clear chromate conversion per MIL-C-5541, Class 3. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 181

192 Verify the Requirement Requirement ID Requirement Title Stainless Steel Sheet Requirement Text Stainless steel sheets used in the construction of the TFCS shall be annealed or onequarter-hard complying with ASTM Designation A666 for Type 304, Grades A or B, stainless steel sheet. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 182

193 Verify the Requirement Requirement ID Requirement Title Cold Rolled Steel Requirement Text Cold rolled steel sheet, rod, bar, and extruded used in the construction of the TFCS shall be Type 1018/1020. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 183

194 Verify the Requirement Requirement ID Requirement Title Cold Rolled Steel Plating Requirement Text Cold rolled steel used in the construction of the TFCS shall be plated using either cadmium plating meeting the requirements of Federal Specification QQ-P-416C, Type 2 Class l or zinc plating meeting the requirements of ASTM B Type II SC4. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 184

195 Verify the Requirement Requirement ID Requirement Title Stainless Steel Hardware Requirement Text All bolts, nuts, washers, screws, hinges and hinge pins used in the construction of the TFCS shall be stainless steel unless otherwise specified. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be made of materials that are resistant to rust and corrosion. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 185

196 Verify the Requirement Requirement ID Requirement Title Doors Requirement Text The TFCS cabinet designs shall include door(s) with appropriate door frames, seals, gaskets, strikers, stops and three-point locking mechanisms. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to include one or more doors to support easy user access to subsystems and assemblies. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, cabinet shell and packaging is not controlled by the standard. 2. Figure 3, Note 1, cabinet shell and packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 186

197 Verify the Requirement Requirement ID Requirement Title Ventilation Requirement Text The TFCS cabinet housings shall be designed with thermostatic ventilation in the event that the internal cabinet temperature exceeds the pre-programmed temperature. Incoming air shall be filtered. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to protect its subsystems and assemblies from heat, wind, snow, dust and rain. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, housings and packaging is not controlled by the standard. 2. Figure 3, Note 1, housings and packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 187

198 Verify the Requirement Requirement ID Requirement Title Cabinet Thickness Requirement Text The TFCS cabinet housing shall be fabricated of inch minimum thickness aluminum sheet. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to protect its subsystems and assemblies from heat, wind, snow, dust and rain. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, housing and packaging is not controlled by the standard. 2. Figure 3, Note 1, housing and packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 188

199 Verify the Requirement Requirement ID Requirement Title Rodent Resistance Requirement Text The TFCS cabinet housings shall be designed to reduce or eliminate any openings which might permit rodents or insects to enter the cabinet. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS to protect its subsystems and assemblies from small animals and insects. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, housing and packaging is not controlled by the standard. 2. Figure 3, Note 1, housing and packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 189

200 Verify the Requirement Requirement ID Requirement Title High Security Design Requirement Text The TFCS shall support a high-security cabinet design which permits the usage of 3/16 sheet aluminum for the cabinet housing. Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to be resistant to vandalism or theft. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 190

201 Verify the Requirement Requirement ID Requirement Title Cabinet Surface Presentation Requirement Text The TFCS surfaces shall be prepared per Paragraph Justification for the Requirement: 1. The user needs the TFCS to be constructed using quality standards for workmanship, electronic design and manufacturing. 2. The user needs the TFCS housing to have an external finish that is resistant to graffiti and bill posting. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 191

202 Verify the Requirement Requirement ID Requirement Title Operating Ambient Temperature Requirement Text The TFCS s shall have an operating ambient temperature range from -37 degrees Celsius to +74 degrees Celsius. Justification for the Requirement: 1. The user needs the TFCS to operate under extreme hot, cold and humid environmental conditions. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Ambient Temperature Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 192

203 Verify the Requirement Requirement ID Requirement Title Storage Temperature Range Requirement Text The TFCS shall be capable of withstanding an ambient storage temperature range of -45 degrees Celsius to +85 degrees Celsius. Justification for the Requirement: 1. The user needs the TFCS to operate under extreme hot, cold and humid environmental conditions. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Ambient Temperature Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 193

204 Verify the Requirement Requirement ID Requirement Title Operational Relative Humidity Requirement Text The TFCS operating shall be capable of operation with a relative humidity shall not exceeding 95 percent non-condensing over the temperature range of -37 degrees Celsius to +74 degrees Celsius. Justification for the Requirement: 1. The user needs the TFCS to operate under extreme hot, cold and humid environmental conditions. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Humidity Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 194

205 Verify the Requirement Requirement ID Requirement Title Electronic Emissions Requirement Text The TFCS shall adhere to the Code of Federal Regulations, Title 47 Telecommunication, Chapter 1 Federal Communications Commission, Part 15. Justification for the Requirement: 1. The user needs the TFCS to have limited electronic emissions that cause radio frequency interference (RFI) and electromagnetic interference (EMI). Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Requires further investigation as to the FCC requirements for roadside electrical cabinet equipment. Need to define meaning of adhere in this context. Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard Electronic Emissions Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 195

206 Verify the Requirement Requirement ID Requirement Title Electrostatic Discharge (ESD) Requirement Text The TFCS shall adhere to applicable sections of International Electrotechnical Commission (IEC) Standard :2008 Electromagnetic compatibility (EMC) Part 4-2: Testing and Measurement Techniques Electrostatic Discharge Immunity Test. Justification for the Requirement: 1. The user needs the TFCS to be resistant to electrostatic discharge (ESD). Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Investigate further, specifically, what was done in the DMS standards, what compliance level is required, and who certifies compliance to the standard. Also need to specify the term adhere to and whether installed or as an assembly out of the box. Need to be specific. Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard Electrostatic Discharge Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 196

207 Verify the Requirement Requirement ID Requirement Title Noise Level Requirement Text The TFCS shall have no element that emits an audible noise level exceeding a peak level of 55 dba when measured with all doors open at a distance of one meter away from the TFCS. Justification for the Requirement: 1. The user needs the TFCS to have limited audible noise. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Audible noise is attenuated of the enclosure packaging materials and door openings Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 197

208 Verify the Requirement Requirement ID Requirement Title Shock Requirement Text The elements of the TFCS shall suffer neither permanent mechanical deformation nor any damage that renders the unit inoperable, when subjected to a shock of 10 g applied in each of three mutually perpendicular planes. Justification for the Requirement: 1. The user needs the TFCS to withstand vibration and shock. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Shock (Impact) Test (DAT) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 198

209 Verify the Requirement Requirement ID Requirement Title Vibration Requirement Text The elements of the TFCS shall continue their defined functions and maintain physical integrity when subjected to a vibration of 5 to 30 Hz up to 0.5 g applied in each of three mutually perpendicular planes. Justification for the Requirement: 1. The user needs the TFCS to withstand vibration and shock. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Vibration Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 199

210 Verify the Requirement Requirement ID Requirement Title No Sharp Edges Requirement Text The TFCS shall have all sharp edges and corners rounded and free of burrs. Justification for the Requirement: 1. The user needs the TFCS to be safe for use by field personnel. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 1, packaging is not controlled by the standard. 2. Figure 3, Note 1, packaging is not controlled by the standard. Finishing of the enclosure packaging materials Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 200

211 Verify the Requirement Requirement ID Requirement Title NEC Best Practices Requirement Text The TFCS shall adhere to the best practices of the National Electrical Code (NEC) for wire sizing, ampacity and user safety. Justification for the Requirement: 1. The user needs the TFCS to be safe for use by field personnel. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Investigate verification methods. For example, inspection of wire sizes and materials or testing. Related Design Elements 1. Section 12 WIRE REQUIREMENTS Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 201

212 Verify the Requirement Requirement ID Requirement Title Power Factor Requirement Text The TFCS shall maintain an overall power factor (PF) of 0.8 or greater, as measured at the service entry, when operating from AC power and isolated from the Application Computer for any such measurement. Justification for the Requirement: 1. The user needs the TFCS to be energy efficient. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements AC Line Input General General Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 202

213 Verify the Requirement Requirement ID Requirement Title Power Supply Efficiency Requirement Text The TFCS s power supplies shall be designed to operate with an average efficiency of 80 percent or greater at load. Justification for the Requirement: 1. The user needs the TFCS to be energy efficient. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements AC Line Input Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 203

214 Verify the Requirement Requirement ID Requirement Title No Liquid Mercury Requirement Text The TFCS shall contain no elements that use liquid mercury. Justification for the Requirement: 1. The user needs the TFCS to be designed so that it uses no devices containing liquid mercury. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Mercury Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 204

215 Verify the Requirement Requirement ID Requirement Title High Density Inputs Requirement Text The TFCS shall provide a high-density input assembly capable of directly supporting 12 current-technology four-channel NEMA TS-2 detector modules using half-width front panels in each single-width slot. Justification for the Requirement: 1. The user needs the TFCS to be of a design that reduces the time required for maintenance personnel to perform maintenance actions in the field. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2 Typical Input Functionality (Note 1) 2. Figure 3 Typical Input Functionality (Note 1) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 205

216 Verify the Requirement Requirement ID Requirement Title Externally Accessible V and I Requirement Text Load Switch voltage and current values shall be externally accessible Justification for the Requirement: 1. The user needs the TFCS to be designed to support diagnostic testing. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Accessible not as test points, but rather accessible digital data representing the V I. Related Design Elements Electrical 2. SB#1 / SB#2 Interface shall consist of the following interface links conforming to the requirements of the Electronic Industries Association EIA-485 Standard for Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems, dated April 1983: SB#1 of two interface links (SB#1 TXD ± and SB#1 RXD ±) SB#2 of two interface links (SB#2 TXD ± and SB#2 RXD ±) LINE SYNC of one interface link (LINE SYNC ±) NRESET of one interface link (NRESET ±) POWER DOWN of one interface link (POWERDOWN ±) Where differences occur between the EIA-485 standard and this document, this document shall govern SB#1 / SB#2 Interface shall also include the following power conductors: +5 VDC ISO positive bias for Terminator Unit depicted in Figure 5 ISO GND negative bias for Terminator Unit depicted in Figure 5 EQ GND Equipment Ground 3. SB#3 Interface 4. Table 66: SB#3 Type 129 Response ATC5301v0202_ Page 206

217 Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 207

218 Verify the Requirement Requirement ID Requirement Title Diagnostic Display Local Display Requirement Text The TFCS shall contain a Diagnostic Display Unit (DDU) which supports local display of both historical and current cabinet status and log data collected by the monitoring subsystem. Justification for the Requirement: 1. The user needs the TFCS to be of a design that reduces the time required for maintenance personnel to perform maintenance actions in the field. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Model 2220 Auxiliary Display Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 208

219 Verify the Requirement Requirement ID Requirement Title Utilizes a Monitor Assembly Requirement Text The TFCS shall utilize a monitor assembly (MA) to monitor the operation of the TFCS and provide diagnostic information. Justification for the Requirement: 1. The user needs the TFCS to be of a design that reduces the time required for maintenance personnel to perform maintenance actions in the field. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Model 2212 Cabinet Monitor Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 209

220 Verify the Requirement Requirement ID Requirement Title Commonly-Deployed Input Devices Requirement Text The TFCS s Input Assembly shall be compatible with field input devices that are commonly deployed such as inductive loops, pedestrian detectors, vehicle preemption devices, and transit signal priority devices that utilize a contact closure type of interface. Justification for the Requirement: 1. The user needs the TFCS to support the use of commonly deployed field sensors. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Sensors external to the cabinet Related Design Elements Sensor Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 210

221 Verify the Requirement Requirement ID Requirement Title NEMA TS 2 Four-Channel Detector Modules Requirement Text The TFCS s Input Assembly shall be able to utilize current-technology four-channel NEMA TS 2 detector modules with half-width front panels in each single-width slot. Justification for the Requirement: 1. The user needs the TFCS to support the use of commonly deployed field sensors. 2. The user needs the TFCS to support input devices that have higher channel density than commonly deployed field input devices. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: See NEMA TS , including output and status for each channel. Related Design Elements Sensor Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 211

222 Verify the Requirement Requirement ID Requirement Title Four-Channel Isolator Modules Requirement Text The TFCS input assembly shall provide an option for the use of four-channel isolator modules. Justification for the Requirement: 1. The user needs the TFCS to support the use of commonly deployed field sensors. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: See NEMA TS Related Design Elements Sensor Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 212

223 Verify the Requirement Requirement ID Requirement Title Controller Subsystem Communications Interfaces Requirement Text The TFCS s Controller Subsystem shall receive field input data from the Input Assembly or Input/Output Assembly via the serial bus. Justification for the Requirement: 1. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 2. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements Poll Raw Inputs Data Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 213

224 Verify the Requirement Requirement ID Requirement Title Receives Detector Status Information Requirement Text The TFCS s Controller Subsystem shall receive detector status information from the input assembly or Input/Output Assembly via the serial bus, at a minimum open, shorted and changes in inductance by more than 25%. Justification for the Requirement: 1. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 2. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements 1. Table 20 shows the SIU pins for detector Status that is reported to the CU via SB#1. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 214

225 Verify the Requirement Requirement ID Requirement Title Sends Field Output Commands Requirement Text The TFCS s Controller Subsystem shall send field output commands to the output assembly or Input/Output Assembly. Justification for the Requirement: 1. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 2. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements 1. Table 46: Set Outputs Command Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 215

226 Verify the Requirement Requirement ID Requirement Title Sends Switch Pack Driver Information to the Monitor Assembly Requirement Text The TFCS s Controller Susbsystem shall send the switch pack driver information (the state of the switch packs commanded by the Controller Subsystem) to the Monitor Assembly. Justification for the Requirement: 1. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 2. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements 1. Table 54: CMU Type 67 Command Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 216

227 Verify the Requirement Requirement ID Requirement Title Sends Flash Command to the Monitor Assembly Requirement Text The TFCS s Controller Susbsystem shall send a flash command to the Monitor Assembly. Justification for the Requirement: 1. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 2. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements 1. Table 52 Type 62 Command Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 217

228 Verify the Requirement Requirement ID Requirement Title Receives CMU Programming Information from Monitor Assembly Requirement Text The TFCS s Controller Susbsystem Monitor Subsystem shall receive CMU programming information from the Monitor Assembly. Justification for the Requirement: 1. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 2. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements 1. Table 54: CMU Type 67 Command Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 218

229 Verify the Requirement Requirement ID Requirement Title Signal Control Priority Requirement Text The TFCS shall provide an interface for signal control priority. Justification for the Requirement: 3. The user needs the TFCS to have an application computer that supports the cabinet interfaces defined in this standard. 4. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 3. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.2 Related Design Elements General provides an interface for Preemptor or Isolator for Priority input. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 219

230 Verify the Requirement Requirement ID Requirement Title Intersection Control Applications Requirement Text The TFCS Controller Subsystem shall support Intersection Control Applications developed for the ITS Cabinet V1 without modifications. Justification for the Requirement: 1. The user needs the TFCS to have configurations suitable for intersection control applications. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Model 2218 Serial Interface Unit (SIU) Model 2202 High Density Switch Pack / Flasher Unit (HDSP/FU) Field Signal Control Inputs Field Signal Control Input Model 2212 Cabinet Monitor Unit Sensor Unit Serial Bus Flash Programming Blocks Flash Transfer Relay Field Wire Sense Field Wire Interface Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 220

231 Verify the Requirement Requirement ID Requirement Title Ramp Meter Control Applications Requirement Text The TFCS Controller Subsystem shall support Ramp Meter Applications developed for the ITS Cabinet V1 without modifications. Justification for the Requirement: 1. The user needs the TFCS to have configurations suitable for ramp metering applications. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Model 2218 Serial Interface Unit (SIU) Model 2202 High Density Switch Pack / Flasher Unit (HDSP/FU) Field Signal Control Inputs Field Signal Control Input Model 2212 Cabinet Monitor Unit Sensor Unit Serial Bus Flash Programming Blocks Flash Transfer Relay Field Wire Sense Field Wire Interface Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 221

232 Verify the Requirement Requirement ID Requirement Title Sends Field Input Data Requirement Text The TFCS s Input Assembly shall send field input data to the Controller Subsystem via the Serial Bus. Justification for the Requirement: 1. The user needs the TFCS to have configurations suitable for roadside data collection applications. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Poll Raw Inputs Data Poll Filtered Input Data Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 222

233 Verify the Requirement Requirement ID Requirement Title Sends Detector Status Information Requirement Text The TFCS s Input Assembly shall send detector status information to the Controller Subsystem via the Serial Bus. Justification for the Requirement: 1. The user needs the TFCS to have configurations suitable for roadside data collection applications. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2, Note 2 2. Figure 3, Note General 4. Table 20: INPUT SIU 1 to IN SLOT Signal Mapping Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 223

234 Verify the Requirement Requirement ID Requirement Title Two Output Channels per HDSP120 Requirement Text The HDSP120 shall have two output channels. Justification for the Requirement: 1. The user needs the TFCS to support the use of output devices that have higher channel density than the commonly deployed field output devices. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Model 2202 High Density Switch Pack / Flasher Unit (HDSP/FU) Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 224

235 Verify the Requirement Requirement ID Requirement Title Two Output Channels per HDSP120 Requirement Text TFCS shall support the Six Pack and Twelve Pack regular density output files of the ITS Cabinet V1. Justification for the Requirement: 1. The user needs the TFCS to support the use of output devices that have higher channel density than the commonly deployed field output devices. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Requirement deleted during Walkthrough. Related Design Elements 1. Requirement deleted during walkthrough Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 225

236 Verify the Requirement Requirement ID Requirement Title Amperes per HDSP120 Channel Requirement Text The SP120 shall be able to support output devices up to 2 Amps per channel. Justification for the Requirement: 1. The user needs the TFCS to support the use of output devices that have higher channel density than the commonly deployed field output devices. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Field Signal Outputs Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 226

237 Verify the Requirement Requirement ID Requirement Title CMU Display Unit Requirement Text The TFCS shall contain a CMU Display Unit (CDU) which provides a user display for the CMU. Justification for the Requirement: 1. The user needs the TFCS to provide a configurable capability to independently monitor each field display to ensure that the actual state of the field display matches the state of its corresponding application computer output, and indicates an anomaly when they do not match. 2. The user needs the TFCS to provide a display for the maintenance personnel to view the malfunction, anomaly, or status information. 3. The user needs the TFCS to provide system reports and logs that include the output of system monitoring. Source for Justification: 1. UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Model 2220 Auxiliary Display Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 227

238 Verify the Requirement Requirement ID Requirement Title Low Voltage Switch Pack Modules Requirement Text The following power limitations shall apply to the Low Power / Low Voltage cabinet option - Less than 30 Volts RMS - Less than 42 Volts Peak - Less than 60 Volts DC Justification for the Requirement: 1. The user needs the TFCS to provide for field wiring that is at voltage and current levels below those dangerous to humans. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Field Signal Voltage Sense Inputs Field Signal Outputs LV+MAINS LV+SIGNAL Flasher Channel Status Thresholds (HDFU-LV mode) HDFU Flasher Thresholds CMU Power Failure LV Field Signal Voltage Inputs Main Contactor Secondary Status MAINS Power Power Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 228

239 Verify the Requirement Requirement ID Requirement Title Channel-Programmable Flasher Outputs Requirement Text The TFCS Field Termination Assembly shall provide the means for selecting the specific flasher output (red, yellow, or no indication) used for each channel s display when in flashing operation. Justification for the Requirement: 1. The user needs the TFCS to support configurable continued operation based on the specifics of the element failures. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 21: Termination Interface for 2 Switch Pack Channels Flash Programming Blocks Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 229

240 Verify the Requirement Requirement ID Requirement Title Four Fused Output Channels Requirement Text The TFCS s monitor assembly shall provide for a flasher unit with four fused output channels. Justification for the Requirement: 1. The user needs the TFCS to support configurable continued operation based on the specifics of the element failures. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements General Flasher Unit Output Failed Standard states shall be limited to meaning by a fuse or limiting device not specified by the standard, plus ability to identify failure. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 230

241 Verify the Requirement Requirement ID Requirement Title Cabinet Monitor Unit Requirement Text The TFCS Monitor Assembly shall provide for a Cabinet Monitor Unit (CMU) with minimum functionality of ITS Cabinet V1 CMU Justification for the Requirement: 1. The user needs the TFCS to provide a status monitoring capability. 2. The user needs the TFCS to provide a configurable field output monitoring capability. 3. The user needs the TFCS to be capable of a configurable response to each malfunction or anomaly detected as part of system monitoring. 4. The user needs the TFCS to have a non-volatile method of maintaining the system reports and logs. Source for Justification: 1. UN ID UN ID UN ID UN ID Requirement Text (Comments/Changes) Guidance: Monitors system, bus and specific conditions. Fault and report coverage must be at least the same as the V1 CMU. Related Design Elements Model 2212 Cabinet Monitor Unit Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 231

242 Verify the Requirement Requirement ID Requirement Title Send Voltage Levels to Monitor Assembly (AC Voltage) Requirement Text The TFCS s Output Assembly shall send the voltage level per output channel to the Monitor Assembly via the Monitor Bus. Justification for the Requirement: 1. The user needs the TFCS to provide a configurable field output monitoring capability. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: For both High Voltage and Low Voltage operation. Related Design Elements Voltage / Current Encoding HDSP/FU Status 3. Table 66: SB#3 Type 129 Response 4. Table 68: SB#3 Type 130 Response Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 232

243 Verify the Requirement Requirement ID Requirement Title Serial Bus Communications Architecture Requirement Text The TFCS shall utilize a Serial Bus (SB) communications architecture for communication between the elements of the TFCS. Justification for the Requirement: 1. The user needs the TFCS to monitor internal communications. 2. The user needs the TFCS to have an internal communications capability that can be used to communicate between its subsystems and assemblies. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: SB2 has a defined method to detect communications corruption and loss of communications. Related Design Elements SB#1 / SB#2 Interface Electrical 3. SB#1 / SB#2 Interface shall consist of the following interface links conforming to the requirements of the Electronic Industries Association EIA-485 Standard for Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems, dated April 1983: SB#1 of two interface links (SB#1 TXD ± and SB#1 RXD ±) SB#2 of two interface links (SB#2 TXD ± and SB#2 RXD ±) LINE SYNC of one interface link (LINE SYNC ±) NRESET of one interface link (NRESET ±) POWER DOWN of one interface link (POWERDOWN ±) Where differences occur between the EIA-485 standard and this document, this document shall govern SB#1 / SB#2 Interface shall also include the following power conductors: +5 VDC ISO positive bias for Terminator Unit depicted in Figure 5 ISO GND negative bias for Terminator Unit depicted in Figure 5 EQ GND Equipment Ground 4. SB#3 Interface Requirement Criteria Yes No 1 Is the justification/basis for the requirement clear X and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X 6 If verifiable, by which method? X Insp. Anal. Test Demo. ATC5301v0202_ Page 233

244 Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. Verify the Requirement Requirement ID Requirement Title Ethernet Communications Requirement Text CMU shall have an Ethernet interface Justification for the Requirement: 1. The user needs the TFCS to provide a display for the maintenance personnel to view the malfunction, anomaly, or status information. 2. The user needs the TFCS to be capable of providing system reports locally or to a remote system using a standardized interface and protocol. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Terminal Port Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 234

245 Verify the Requirement Requirement ID Requirement Title Receives Switch Pack Driver Information from the Controller Subsystem Requirement Text The TFCS s Monitor Assembly shall receive switch pack driver information from the Controller Subsystem. Justification for the Requirement: 1. The user needs the TFCS to be capable of a configurable response to each malfunction or anomaly detected as part of system monitoring. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: The state of the switch packs commanded by the controller subsystem. Related Design Elements Type 67 Command Switch Pack Drivers 2. Table 54: CMU Type 67 Command Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 235

246 Verify the Requirement Requirement ID Requirement Title Service Power Input Options Requirement Text The TFCS shall provide manufacturing options to operate on different nominal service power sources. Justification for the Requirement: 1. The user needs the TFCS to be accept a nominal service power of 120 volts alternating current (VAC) at 60 hertz (Hz). Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements Cabinet Power Supply Requirements, High Voltage Versions 2. Figure 2: High Level Functional Block Diagram, High Voltage Version 3. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 236

247 Verify the Requirement Requirement ID Requirement Title High Voltage Service Assembly Requirement Text The TFCS shall include a Service Assembly option for 120 VAC nominal service power input. Justification for the Requirement: 1. The user needs the TFCS to be accept a nominal service power of 120 volts alternating current (VAC) at 60 hertz (Hz). Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 237

248 Verify the Requirement Requirement ID Requirement Title Clean Power Input Requirement Text The TFCS Cabinet Power Supply shall accept clean power from clean power bus assembly. Justification for the Requirement: 1. The user needs the TFCS to distribute clean power within the cabinet, i.e., power that is protected against surges and spikes and is filtered to regulate electrical noise. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 238

249 Verify the Requirement Requirement ID Requirement Title VDC Output Power Requirement Text The TFCS shall distribute 24 VDC output power to subassemblies Justification for the Requirement: 1. The user needs the TFCS to distribute output power externally to field displays. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: 12 VDC output power is optional. Standard will include procurement guidance for users that have equipment powered by 12 VDC. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Outputs Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 239

250 Verify the Requirement Requirement ID Requirement Title VDC Output Power Requirement Text The TFCS Cabinet Power Supply shall provide 24 VDC for the elements of the TFCS. Justification for the Requirement: 1. The user needs the TFCS to convert power for use by internal devices.. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Outputs Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 240

251 Verify the Requirement Requirement ID Requirement Title VDC Output Power Requirement Text The TFCS Cabinet Power Supply shall provide 12 VDC for the elements of the TFCS as an option Justification for the Requirement: 1. The user needs the TFCS to convert power for use by internal devices.. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: 12 VDC output power is optional per procurement specifications. Standard will include procurement guidance for users that have equipment powered by 12 VDC. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Outputs Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 241

252 Verify the Requirement Requirement ID Requirement Title Low Voltage Service Assembly Requirement Text The TFCS shall include a Service Assembly option for 48 VDC nominal service power input. Justification for the Requirement: 1. The user needs the TFCS to convert power for use by internal devices.. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 242

253 Verify the Requirement Requirement ID Requirement Title Backup Power Subsystem Interface Requirement Text The TFCS shall include standardized connector and signals from the standby source to the TFCS DC power source. Justification for the Requirement: 1. The user needs the TFCS to convert power for use by internal devices. 2. The user needs the TFCS to provide a method for continued operations when there are service power interruptions. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version. 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version. Standard controls the names and electrical characteristics of signals, but not the form factor of the backup system Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 243

254 Verify the Requirement Requirement ID Requirement Title Backup Power Subsystem Switchover Requirement Text The TFCS shall provide switching to and from standby power in the event of a main power failure. Justification for the Requirement: 1. The user needs the TFCS to convert power for use by internal devices. 2. The user needs the TFCS to provide a method for continued operations when there are service power interruptions. Source for Justification: 1. UN ID UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version. 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version. Standard controls the names and electrical characteristics of signals, but not the form factor of the backup system. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 244

255 Verify the Requirement Requirement ID Requirement Title External Antenna Requirement Text The TFCS shall provide, for all types of cabinet housings, a method to mount an external antenna without invalidating the certification. Justification for the Requirement: 1. The user needs the TFCS to accommodate a variety of communications equipment and media for communications external to the system. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Anticipate antenna mounting in the cabinet design before submitting for approval. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version Standard controls the names and electrical characteristics of signals, but not antenna mounting. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 245

256 Verify the Requirement Requirement ID Requirement Title Legacy Housing Requirement Text The TFCS shall have overall sizes compatible with legacy cabinet models 342, 346, and 340 from the ITS Cabinet V1 Standard. Justification for the Requirement: 1. The user needs the TFCS housing to have mounting capabilities which accommodate existing transportation industry base, pedestal, and pole mountings. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Interpreted as mounting bolt hole pattern, and within legacy dimensions. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version, Note 1 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version, Note 1 EIA-310 dimensions are within the legacy dimensions of 342, 346 and 340 sizes of V1 standard Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 246

257 Verify the Requirement Requirement ID Requirement Title Small Size Cabinet Requirement Text The TFCS shall be available in a single door model 306 small-sized cabinet. Justification for the Requirement: 1. The user needs the TFCS housing to have mounting capabilities which accommodate existing transportation industry base, pedestal, and pole mountings. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version, Note 1 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version, Note 1 EIA-310 dimensions are within the legacy dimensions of 306 size. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 247

258 Verify the Requirement Requirement ID Requirement Title Video Monitor Requirement Text The TFCS shall provide space and electrical power for a small video monitor as an option. Justification for the Requirement: 1. The user needs the TFCS housing to provide space and electrical connections for a small video monitor. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Possibly handheld Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version, Note 1 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version, Note 1 EIA-310 dimensions allow standard mounting of standard displays. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 248

259 Verify the Requirement Requirement ID Requirement Title Backup Power Source Requirement Text The TFCS design shall include a cabinet configuration that provides internal space for the housing of a backup power source. Justification for the Requirement: 1. The user needs the TFCS to provide internal space for housing batteries commonly used to provide backup power. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Not all backup power sources are batteries. Requirement stated accordingly. Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version, Note 1 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version, Note 1 EIA-310 dimensions allow mounting of standard backup sources. Mechanical configuration is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 249

260 Verify the Requirement Requirement ID Requirement Title Law Enforcement Access Requirement Text The TFCS shall provide protected access by law enforcement personnel to the following cabinet functions: Signals ON/OFF FLASH / AUTO operation Manual Control Enable (MCE) Interval Advance (IA) Justification for the Requirement: 1. The user needs the TFCS to provide law enforcement personnel limited access to the TFCS to the extent necessary for direct control of the field location while restricting access to the remainder of the cabinet. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version, Note 1 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version, Note Form Factor 4. Table 26: Definitions of Terms relating to switches in the Police Panel 5. Table 27: CDC Connector Pin Assignments Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 250

261 Verify the Requirement Requirement ID Requirement Title Limited Enclosure Access Requirement Text The TFCS shall provide doors with keylocks for installation, removal and service of major assemblies, plus a door with keylocks for access to police panel. Justification for the Requirement: 1. The user needs the TFCS to provide law enforcement personnel limited access to the TFCS to the extent necessary for direct control of the field location while restricting access to the remainder of the cabinet. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Related Design Elements 1. Figure 2: High Level Functional Block Diagram, High Voltage Version, Note 1 2. Figure 3: High Level Design Functional Block Diagram, Low Voltage Version, Note 1 EIA-310 dimensions allow mounting of standard backup sources. Mechanical configuration is not controlled by the standard. Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 251

262 Verify the Requirement Requirement ID Requirement Title Receives Field Output Commands Requirement Text The TFCS s Output Assembly shall send field output commands from the Controller Subsystem via the Serial Bus. Justification for the Requirement: 1. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.4 Related Design Elements Set Outputs 2. Table 46: Set Outputs Command Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 252

263 Verify the Requirement Requirement ID Requirement Title Send current levels to the monitor assembly Requirement Text The TFCS s Output Assembly shall send the level of electrical current per output channel to the Monitor Assembly via the Monitor Bus. Justification for the Requirement: 1. The user needs the TFCS to provide uniform internal interfaces and protocols. Source for Justification: 1. UN ID Requirement Text (Comments/Changes) Guidance: Broken out from compound requirement 5.4 Related Design Elements Type 129 Response HDSP Status 2. Table 66: SB#3 Type 129 Response Type 130 Response HDFU Status 4. Table 68: SB#3 Type 130 Response Requirement Criteria Yes No 1 Is the justification/basis for the requirement X clear and valid? 2 Is the requirement well-formed? X 3 Is the requirement unambiguous? X 4 Is the requirement feasible? X 5 Is the requirement verifiable? X Insp. Anal. Test Demo. 6 If verifiable, by which method? X Note: An answer of no requires a comment or change in the Comments/Change field of the Requirement Text section above. ATC5301v0202_ Page 253

264 15 NON FUNCTIONAL REQUIREMENTS To resolve conflicting Requirements, Table 78 of Non-Functional Requirements (NFR) of Cabinet Attributes was developed during the ITS Cabinet Workshop in November The resulting 22 ITS Cabinet Attributes were included in a survey to rank the importance when resolving conflicting Requirements. All of the attributes were considered important but those higher in rank were generally considered more important when compared to those lower in rank. On a given project, an attribute that is lower in rank may actually be the most critical to the project such as "external dimensions" for a CBD (central business district) deployment. The ranking shown for all of the respondents was not significantly different from the ranking when only voting members of the WG were considered. This is not a claim on being representative of the entire industry (note that there were 22 respondents) but it is representative of the ITS Cabinet WG. Table 78: ATCC Cabinet V2 Attribute Ranking Rank Attribute Definition 1 Reliability Consistency and stability of performance 2 Operational Safety Failsafe operation of the cabinet 3 Maintainability Easy to perform maintenance on the cabinet system 4 Technician Safety Design is such that the safety of the technician is the priority 5 Interchangeability Can mix units/components from different vendors 6 Ease of Use Easy for humans to use the cabinet system 7 Testability Cabinet system is easy to test 8 Life Expectancy Cabinet system is designed for long life 9 Initial / Intrinsic Cost The cost of the cabinet system 10 Modularity Internal structure is such that there is separation in the functions of the cabinet system and flexibility in the way they are combined 11 Application Scalability The cabinet system makes sense for simple operations as well as complex ones 12 Expandability The cabinet system s capability can be expanded 13 Product Life Cost Anticipated costs over the life of the cabinet system 14 Availability Ease of acquisition of the components/technology today 15 Versatility The cabinet system can be used in a variety of ways or modes 16 Physical Security Intrusion prevention from unauthorized access 17 Ease of Specification Cabinet system can easily be specified by users 18 Manufacturability Ease at which the design can be produced 19 Communications Security Communications within the cabinet design are designed with security in mind 20 Backwards Support for legacy issues / equipment Compatibility 21 External Dimensions The size of the cabinet system should be small 22 Internal Dimensions / Compactness Components of the cabinet system should be small ATC5301v0202_ Page 254

265 16 ATCC POWER SIGNAL NAMING CONVENTIONS ATCC Power Signal Naming Conventions v3 posted to the ATC Cabinet WG Community on 10/02/2017. Figure 23: Naming Conventions: ATCC HV & LV Versions Figure 24: Naming Conventions: ATCC HV Version ATC5301v0202_ Page 255

266 Figure 25: Naming Conventions: ATCC LV Version Figure 26: Naming Conventions: ATCC Hybrid LV Version, Option #1, Page 1 ATC5301v0202_ Page 256

267 Figure 27: Naming Conventions: ATCC Hybrid LV Version, Option #1, Page 2 Figure 28: Naming Conventions: ATCC Hybrid LV Version, Option #2 ATC5301v0202_ Page 257