Overvoltage protection of solid state switch simulation and analysis

Transcription

1 Overvoltage protection of solid state switch simulation and analysis Mariusz Stosur Tomasz Kuczek Tomasz Chmielewski Adam Ruszczyk ABB Corporate Research Center Starowislna 13A Str., Krakow, Poland Kacper Sowa AGH University of Science and Technology Mickiewicza 30 Av., Krakow, Poland Abstract - This paper presents simulation and analyses of solid-state switch overvoltage protection. The switching device is composed of two antiparallel connected forced commutated semiconductor valves and in analyzed case has been used as a low voltage solid-state bypass switch of UPS system. The main aim is to identify the value of overvoltage induced on switch terminals and surge energy during an instance of current turn-off in line with inductive impedance. Afterward determine optimal solution that protects such a power electronics device. As a protection solution several types of surge arresters have been analyzed. All simulations have been conducted using EMTP-ATP software package on the model especially prepared for this purpose. Keywords: overvoltage protection, surge arrester, solid-state switch, EMTP-ATP, modeling, simulation 1 ntroduction The growing demand for fast operating switches with precisely controlled switching time instant is observed [1]. Really fast transition time measured in microseconds is achievable only by so called solid-state switches (SSS) composed of semiconductor valves [2], [3]. Due to the lowest conduction losses thyristors were the most popular ones. Their application is limited only to AC circuits where a turn-off moment is not critical in comparison to mechanical solutions [4]. Simple thyristors cannot be turned-off by their gate signal. Their turning-off process requires that the load current has to drop below its latching current. However, there are some applications where fully controllable or force commutated valves have to be used. These could be transistors (i.e. MOSFET or GBT) or force commutated devices (i.e. GTO or GCT). Type of device that can be used depends mostly on expected voltage and current ratings. Apart from fast switching benefits, semiconductor valves have drawbacks in form of relatively high conduction losses and the overvoltage transients induced during turn-off process. The fast current interruption, even in a circuit with very small inductance, may cause hazardous overvoltage peaks. Unlike in electromechanical switch, where a significant part of energy gathered in inductances of interrupted circuit is dissipated in electric arc, in semiconductors this energy is transferred to parasitic capacitance of a semiconductor junction. n most cases it creates significant overvoltage that is dangerous for power electronics switch. This paper describes the analysis and simulation model of metal oxide varistor (MOV) device used to protect solid-state switch against its catastrophic failure caused by overvoltages. The bypass switch in UPS system has been taken as a reference application for solid-state switch,

2 as illustrated in Figure 1. This type of application is more challenging for MOV devices, due to the fact that bypass switch (SSS) with MOV can see the difference of feeder voltage and UPS output voltage. When these voltages are in opposite phase the MOV can operate in condition of doubled voltage. Fig. 1 Single line diagram of analyzed system 2 Theoretical background 2.1 Principles of current breaking For the conservative scenarios, where current is interrupted by a typical circuit breaker, transients are associated with an effect of chopping current and energy trapped in an oscillatory circuit formed out of the capacitance, inductance and resistance of the branch that is switched off. The transient oscillations caused by chopping current during inductive current breaking are illustrated in Fig. 2. The excessive overvoltages are hazardous for insulation of working apparatus and machines due to high peak values and significant steepness. a) i(t) i ch t b) U u(t) U p f 0 t Fig. 2 Breaking of inductive current without arc re-ignitions; (a) current, (b) voltage at the terminals of switched off compartment (inductive character); i(t) current, u(t) voltage, ich chopping current, Up peak voltage after de-energization, f0 frequency of oscillations

3 n the studied case, the current under interruption is not a pure resistive one. Since analyzed type of the load PC supplies appear as a resistive load, some inductance is provided by presence of the LV cables, which may be significant, taking into account the fact that negligible resistance is introduced by the analyzed type of load (PC supplies). The entire concept is presented in the diagram in Figure 4, whereas electrical values of system components are described in Table 1. t should be noted that overvoltages in analyzed circuit are caused due to opening operation in circuit where RLC elements are present. Their value is strictly connected with the energy stored in L and C elements, according to formulas below: = (1) = (2) where: Up value of overvoltage; ich value of chopped current. The key issue in the analyzed case is breaking of the load current by means of the solid-state switch (SSS). The solid state switch operating principles are different than the operation of mechanical circuit breaker. n the solid-state switches the physical movement of contacts is not present and electric arc is not created during the current interruption process, hence the reaction of solid-state switch could be considered as immediate. However, the dynamic behavior of the solid state switch is considered in the model by means of nonlinear resistance of semiconductor junction, very low for closed state and high for open state. Modeling details are described in section Surge arresters selection n order to suppress the excessive overvoltages generated during current breaking the surge arresters have to be installed in parallel to the solid-state switch. The principle of operation of the surge arrester consist in its V- characteristics. n a steady state conditions when there is no excessive voltage across its terminals, the surge arrester operates in linear region. As the voltage significantly rises, it resistance decreases. This specific property makes it suitable for overvoltage mitigation. However, one should bear in mind that due to limited energy dissipation capability the surge arrester can operate in a nonlinear region for limited time. Hence, only short pulse overvoltages resulting from switching or lightning events can be suppressed using surge arresters. The alternative or (as in this case) complementary solution is application of RC snubbers [5] that change the frequency response of the circuit during transient states. As a consequence they effectively decrease steepness and amplitude of the generated overvoltages. The detailed guidelines regarding the surge selections can be found in standards [6] and [7]. The general description of this process is shown in Figure 3. The main steps of surge arrester selection include obtaining basic information on the system ratings and identification of possible abnormal conditions such as temporary overvoltages. Exposure to a long duration events such as temporary overvoltages (TOV) during faults may result in overheating of the surge arrester, which can potentially lead to a physical damage including even an explosion. Therefore it is crucial to establish the sufficient margins for TOV in the considered system. The short circuit capability ensures a safe operation in case when the surge arrester fails and it conducts short circuit current. n such situation the device should be able to withstand the resulting pressure and do not explode. Energy capability concerns the dissipation of energy during transients. Higher energy class should be considered for application where the exposure

4 to transient events is more frequent (e.g. due to switching operations). Finally the surge arrester locations and optimal connection and grounding should be designed. Special attention should be paid to keeping the length of connection leads as short as possible in order to reduce the voltage drop across their inductance during high frequency transients. This voltage drop essentially decreases the overvoltage limitation capabilities. The surge arrester selection should be then verified using calculations or transient simulations conducted in software, such as EMTP-ATP. Based on obtained results one may introduce necessary changes if required. However, the guidelines provided by international standards do not include surge arresters selection for all special application. As can be seen in Figure 3, there are certain special considerations in the application proposed in this paper i.e. solid-state breaker (they are marked accordingly in the diagram). First one concerns the possible TOV that may appear between the contacts and second is the energy capability. Fig. 3 Procedure for surge arrester selection n the current application, in worst case scenario the maximum voltage that can appear across the surge arrester may be as high as 2 p.u. if the converter terminal voltage is 180 degrees shifted to the grid voltage (lack of synchronization to the grid voltage). Secondly, the utilized semiconductor device allows switching off at any current value, which may result in significant energy surplus and possible high overvoltages. Based on herein presented procedure the parameters of surge arresters for parallel operation to the solid state circuit breaker were selected. Ratings of selected device are presented in section 3.5.

5 3 EMTP-ATP modeling details 3.1 Network diagram Schematic of studied network is depicted in Figure 4. As it can be seen, 3-phase load is powered via cable connection. Each phase is equipped with two antiparallel connected forced commutated valves. All parts (subsystems of the model) will be analyzed in detail in sections below. Fig. 4 Circuit diagram of studied network 3.2 Network source LV feeder data Short circuit level of studied network (maximum value of current which may occur during short-circuit conditions, at the point of connection) is equal to 100 ka at the 400 V phase-tophase voltage. Based on this data other parameters of feeder, required for proper system modeling were obtained, according to [8], as presented in Table 1. Table 1 Feeder parameters Sk 70 [MVA] Un 400 [V] fn 50 [Hz] k 100 [ka] XL/RL 10 [-] ZL 2.31 [mω] XL 2.30 [mω] RL 0.23 [mω] LL 7.31 [µh]

6 3.3 Load The analyzed type of load is a representative of switched-mode power supplies [9]. According to EU standard [10] such non-linear loads must include passive or active power factor correction (PFC). Thanks to that, power factor (PF) of such devices have to be close to unity factor and can be considered as resistive load. Hence, PC suppliers were modelled as delta connected resistances (3-phase system, without neutral wire, where PF=1). n analyzed case rated current is equal to 3 ka (RMS value). 3.4 Solid state switch n analyzed topology the solid-state switch in every phase is composed of two anti-parallel connected forced commutated devices (like GCT). That allows current flow in both directions. Such a connection has been modelled by using the time-dependent resistor TYPE 91 as shown in Figure 5a. Elaborated model has been also equipped with parasitic capacitance (assumed value 10 nf). Based on [2] and [11], turn-off characteristic of valve has been modelled as illustrated in Figure 5b, where typical turn-off time of is equal to about 10 µs. a) b) 7000 [A] 6000 t off 3500 [V] Voltage 2500 MODEL rvft U T 2000 Current [us] 30 Fig. 5 EMTP-ATP realization of solid-state switch (a); turn-off characteristic modelled in EMTP-ATP (b) 3.5 Surge arresters Selection of the arrester requires determination of the maximum continuous operating voltage UC. t is necessary to ensure that under normal circumstances the arrester cannot be overloaded, due to the voltage at power frequency. n this way, the arrester meets the requirements of the operating system. Therefore, UC of the arrester is chosen in such a way that the arrester cannot become instable either through the continuous applied voltage coming from the system, or through temporary overvoltages that may occur [12]. The maximum operating voltage at the arrester terminals can be calculated with the help of the maximum system voltage. The worst case may occur when UGRD and UUPS will be in opposite phase. Due to that the continuous operating voltage of surge arresters should not been lower than: > (3) > 575 [V] (4) where: k - correction factor for maximal voltage condition according to standard [13] (equal to 1.25).

7 Hence, the closest value of UC available on the market of surge arresters, which satisfy the condition from formula (4) will be selection of 660 V (0.66) series. Based on procedure presented in Figure 3 the following surge arrester has been found (MVR 0.66 [14], illustrated in Figure 6a). t is suitable for suppressing the possible transient overvoltages providing sufficient protection for semiconductor devices. Electrical parameters of chosen component are provided in Table 2. a) c) 1.8E3 b) MVR_0.66 PE MOV U [V] 1.6E3 1.4E3 1.2E3 1E E3-1.2E3-1.4E3-1.6E3-1.8E3 Fig. 6 Surge arrester MVR 0.66 (a); ATP realization with leads inductance (b); implemented V- characteristic (c) [A] Table 2 Electrical data of MVR [14] UC continuous operating voltage AC UC continuous operating voltage DC Residual voltage Ures at 30/60 µs current impulse 125 A 250 A 500 A [kv] [kv] [kv] [kv] [kv] Surge arresters have been modelled by means of exponential current-dependent resistor TYPE 92, illustrated in Figure 6b. The most significant aspect is proper definition of the voltage-current characteristic of the element. Example of surge arresters V- characteristics [15] used during studies is presented in Figure 6c. The model of the arrester presented in Figure 6b has been also supplemented with parasitic inductance (leads), connected in series. The element cannot be neglected, since it has significant impact on surge arrester voltage damping performance. The value of inductance effectively (adversely) limits the rate of current steepness (di/dt) in surge arrester branch. Current cannot be instantaneously commutated from thyristors to surge arrester branch, hence the value of generated overvoltage is not limited at demanded level and the surge arrester does not start to operate in non-linear region of V- characteristic.

8 Thus, the most important aspect in order to minimalize leads inductance between surge arrester and protected power electronics devices, is to place surge arrester as close as possible to the thyristors, which in analyzed case is easiest due to housing type of selected surge arrester and valves. Approximately estimated value of such inductance is equal to 200 nh and results from the length of the path consisting of surge arrester (SA), valves housing (hokey-puck type) and aluminum leads (bus bars). Two possible options resulting from different paths for positive and negative sine half-wave are illustrated in Figure7. Fig. 7 Cross-section of solid-state switch of phase (a); equivalent electrical diagram illustrating origin of leads inductance paths; where: LN>LP due to paths length (b) 3.6 Low voltage cables Cable connection has been modeled as three-phase π-section line, where the resistance, inductance, and capacitance are represented as lumped element parameters [16]. n analyzed case only one section has been used. Such approach guarantees sufficient accuracy level and minimum complexity of the model during modeling of analyzed phenomena. The parameters ware calculated for 300 mm 2 three wires cable depicted in Fig. 8, according to [17]. Table 3 Power cable parameters [17] YKYFoy - 0.6/1 kv RC [Ω/km] LC 1.0 [mh/km] CC 10.0 [nf] Fig. 8 Selected power cable - copper in the plasticized PVC coating reinforced with steel, 0.6/1 kv

9 4 Simulations and study cases 4.1 EMTP-ATP circuit Simulations were carried out in EMTP-ATP circuit presented in Figure 9. Opening operation occurred in the time instance when the current in phase A is at its maximum value, as illustrated in Figure 10. MODEL rvft U T MVR_0.66 MOV MODEL rvft T V MVR_0.66 MOV MODEL rvft T MVR_0.66 MOV Fig. 9 Circuit diagram of EMTP-ATP model A B C SSS opening time instant Fig. 10 Current waveforms in all phases during SSS opening operations

10 4.2 Simulation results Figure 11a presents overvoltage waveforms across thyristors in SSS branch. Without surge arresters overvoltage peak value is equal to 11.1 kv, which exceeds the maximum allowed limit across the semiconductor devices (2.5 kv). Thanks to installed MVR 0.66 maximum voltage value across valves was decreased to 2.15 kv, which is well below the limit, as shown in Figure 11b (cable length: 100 m). a) b) 12 [kv] 9 U max 2500 [V] 1875 A B A C [ms] 2.0 (file MVR_0.66_1_kabel_tomek.pl4; x-var t) v :SECA -CABLEA v :SECB -CABLEB v :SECC -CABLEC [ms] 2.0 Fig. 11 Overvoltage on SSS terminals; lack of surge arresters (a); with MVR 0.66 surge arresters (b) Additionally impact of turn-off instance of overvoltage value has been examined. The results are presented in Figure 12 and Table 4. Turn-off time instants correspond to the instantaneous values of interrupted current in phase A. t equals to 3 ka (RMS) or 4.24 ka (peak). As it can be seen, lower values of turn-off current correspond to lower values of overvoltage. This due to the higher energy trapped in the oscillatory circuit, which is in line with equation (2) B C Table 4 mpact of turn-off instance on overvoltage value Peak value of turn-off current Overvoltage value on SSS terminals [ka] [kv] Fig. 12 mpact of turn-off peak current value on overvoltage value generated on SSS terminals

11 An essence for the studied issue is system configuration, hence several lengths of the cable connection have been tested. The results are presented in Table 5 and Figure 13. As the cable length increases, the overvoltage across the switch also rises. However, in Figure 13 one can observe that this change is not linear. This is related to change of both capacitance and inductance of the cable. Table 5 mpact of cable length on overvoltage value (for 4.24 ka of interrupted current peak value) Overvoltage Cable length value on SSS terminals [m] [kv] Fig. 13 mpact cable connection length on overvoltage value - generated on SSS terminals 5 Conclusions The idea of protection of a solid-state switch during current interruption with a surge arrester was presented in this paper. t has been shown that the incorporation of semiconductor device for current breaking is suitable even in case of high currents. However, the simulation results presented herein clearly show that possible overvoltages should be accounted for. t was identified that system configuration (i.e. total inductance and capacitance of the load) and turnoff time instance have the critical impact on the overvoltage magnitude. The authors proposed installation of MOV surge arresters across the semiconductor device. The guidelines to selection of appropriate surge arrester for this special application were provided. t is noteworthy that not only the surge arresters ratings are relevant for sufficient limitation of transient overvoltages. Another aspect that should be investigated is surge arresters connection to the protected element. One should bear in mind that due to significant voltage drop in high frequency region across connection leads impedance, their lengths should be kept as short as possible.

12 6 References [1] Wen W. et al.: Research on Operating Mechanism for Ultra-Fast 40.5-kV Vacuum Switches, EEE Transactions on Power Delivery, Vol. 30, No. 6, 2015, pp [2] Vemulapati U., Arnold M., Rahimo M., Antoniazzi A. and Pessina D.: Reverse blocking GCT optimised for 1 kv DC bi-directional solid state circuit breaker, ET Power Electronics, Vol. 8, No. 12, 2015, pp [3] Pusorn W., Srisongkram W., Chiangchin K. and Bhumkittipich K.: Solid State Circuit Breaker using insulated gate bipolar transistor for distribution system protection, Electrical Engineering Congress (ieecon), Chonburi, 2014, pp.1-4 [4] Kamtip S. and Bhumkittipich K.: Comparison between mechanical circuit breaker and solid state circuit breaker under abnormal conditions for low voltage systems, 18th nternational Conference on Electrical Machines and Systems (CEMS), Pattaya, 2015, pp [5] Barlik R., Nowak M.: Power electronics: elements components systems, Oficyna Wydawnicza Politechniki Warszawskiej (in polish), 2014 [6] EEE Standard C : EEE Guide for the Application of Metal-Oxide Surge Arresters for Alternating-Current Systems, 2009 [7] EC Standard :2013: EC Guide for Surge arresters - Part 5: Selection and application recommendations, 2013 [8] Collective Work, Electrical Engineering Handbook, Vol. 2, 2rd Edition, WNT Warszawa, 2009 [9] Billings K., Morey T.: Switchmode Power Supply Handbook, McGraw-Hill Education, 3rd Edition, 2011 [10] EC Standard : : EC Guide for Electromagnetic compatibility (EMC) - Part 3-2: Limits - Limits for harmonic current emissions (equipment input current 16 A per phase), [11] Vemulapati U., Arnold M., Rahimo M., Antoniazzi A., Pessina D.: 2.5kV RB-GCT Optimized for Solid State Circuit Breaker Applications, nternational Seminar on Power Semiconductors (SPS), Prague, Czech Republic, 2014 [12] ABB Application guidelines: Overvoltage protection Metal oxide surge arresters in medium voltage systems, 2011 [13] EC Standard : Varistors for use in electronic equipment - Part 2: Sectional specification for surge suppression varistors, 2007 [14] ABB Data sheet: Surge arrester MVR K10, 1HC E01 ABB, 2013 [15] Oramus P., Florkowski M.: Simulations of lightning overvoltages in HV electric power system for various surge arrester and transmission lines models, Electrical Review, R. 90, No. 10, 2014 [16] EC Standard : nsulation co-ordination Part 4: Computational guide to insulation co-ordination and modelling of electrical networks, 2004 [17] Telefonika: Kable i przewody elektroenergetyczne, Second Edition (in polish), 2016