Hardware- assisted Virtualization

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1 Hardware- assisted Virtualization Pra$k Shah (pcshah) Rohan Pa$l (rspa$l) Opera,ng System Prac,cum Carnegie Mellon University 1

2 Agenda Introduc)on to VT- x CPU virtualiza)on with VT- x VMX VMX Transi$ons Virtual Machine Control Structure (VMCS) MMU Virtualiza)on with VT- x Virtual Processor IDen$fier (VPID) Sidebar: Virtualizing memory in sofware Nested / Extended Page Tables (EPT) References Q & A 2

3 VT- x Intel Vanderpool Technology, referred to as VT- x, represents Intel s virtualiza)on technology on the x86 plahorm. 3

4 VT- x : Motivation To solve the problem that the x86 instruc)ons architecture cannot be virtualized. Simplify VMM somware by closing virtualiza)on holes by design. Ring Compression Non- trapping instruc$ons Excessive trapping Eliminate need for somware virtualiza)on (i.e paravirtualiza)on, binary transla)on). 4

5 CPU Virtualization with VT- x 5

6 VMX Virtual Machine Extensions define processor- level support for virtual machines on the x86 plahorm by a new form of opera)on called VMX opera)on. Kinds of VMX opera)on: root: VMM runs in VMX root opera)on non- root: Guest runs in VMX non- root opera)on Eliminate de- privileging of Ring for guest OS. 6

7 Pre VT- x Post VT- x VMM ring de- privileging of guest OS Guest OS aware its not at Ring 0 VMM executes in VMX root- mode Guest OS de- privileging eliminated Guest OS runs directly on hardware 7 Source: [2]

8 VMX Transitions Transi)ons between VMX root opera)on and VMX non- root opera)on. Kinds of VMX transi)ons: VM Entry: Transi)ons into VMX non- root opera)on. VM Exit: Transi)ons from VMX non- root opera)on to VMX root opera)on. Registers and address space swapped in one atomic opera)on. 8

9 VM 1 VM 2 VM n VMX Non- Root Opera$on Ring 3 Ring 3 Ring 3 Ring 0 Ring 0 Ring 0 VM Entry VM Exit VMCS VMCS VMCS VMX Root Opera$on vmlaunch / vmresume Ring 3 Ring 0 VMX Transitions 9

10 VMCS: VM Control Structure Data structure to manage VMX non- root opera)on and VMX transi)ons. Specifies guest OS state. Configured by VMM. Controls when VM exits occur. 10

11 VMCS: VM Control Structure The VMCS consists of six logical groups: Guest- state area: Processor state saved into the guest- state area on VM exits and loaded on VM entries. Host- state area: Processor state loaded from the host- state area on VM exits. VM- execu,on control fields: Fields controlling processor opera)on in VMX non- root opera)on. VM- exit control fields: Fields that control VM exits. VM- entry control fields: Fields that control VM entries. VM- exit informa,on fields: Read- only fields to receive informa)on on VM exits describing the cause and the nature of the VM exit. 11

12 CPU Virtualization with VT- x 12 Source: [2]

13 MMU Virtualization with VT- x 13

14 VPID: Motivation First genera)on VT- x forces TLB flush on each VMX transi)on. Performance loss on all VM exits. Performance loss on most VM entries Guest page tables not modified always Be]er VMM sofware control of TLB flushes is beneficial. 14

15 VPID: Virtual Processor Identifier 16- bit virtual- processor- ID field in the VMCS. Cached linear transla)ons tagged with VPID value. No flush of TLBs on VM entry or VM exit if VPID ac)ve. TLB entries of different virtual machines can all co- exist in the TLB. 15

16 Virtualizing Memory in Software Three abstrac)ons of memory: 0 4GB Current Guest Process Guest OS Virtual Address Spaces 0 4GB Virtual RAM Virtual Frame Buffer Virtual Devices Virtual ROM Physical Address Spaces 0 4GB RAM Devices Frame Buffer ROM Machine Address Space 16 Source: [6]

17 Shadow Page Tables VMM maintains shadow page tables that map guest- virtual pages directly to machine pages. Guest modifica$ons to V- >P tables synced to VMM V- >M shadow page tables. Guest OS page tables marked as read- only. Modifica$ons of page tables by guest OS - > trapped to VMM. Shadow page tables synced to the guest OS tables 17

18 Virtual CR3 Guest Page Table Guest Page Table Guest Page Table Real CR3 Shadow Page Table Shadow Page Table Shadow Page Table Set CR3 by guest OS (1) 18 Source: [6]

19 Virtual CR3 Guest Page Table Guest Page Table Guest Page Table Real CR3 Shadow Page Table Shadow Page Table Shadow Page Table Set CR3 by guest OS (2) 19 Source: [6]

20 Drawbacks: Shadow Page Tables Maintaining consistency between guest page tables and shadow page tables leads to an overhead: VMM traps Loss of performance due to TLB flush on every world- switch. Memory overhead due to shadow copying of guest page tables. 20

21 Nested / Extended Page Tables Extended page- table mechanism (EPT) used to support the virtualiza)on of physical memory. Translates the guest- physical addresses used in VMX non- root opera)on. Guest- physical addresses are translated by traversing a set of EPT paging structures to produce physical addresses that are used to access memory. 21

22 Nested / Extended Page Tables 22 Source: [2]

23 Nested / Extended Page Tables 23 Source: [4]

24 Advantages: EPT Simplified VMM design. Guest page table modifica)ons need not be trapped, hence VM exits reduced. Reduced memory footprint compared to shadow page table algorithms. 24

25 Disadvantages: EPT TLB miss is very costly since guest- physical address to machine address needs an extra EPT walk for each stage of guest- virtual address transla)on. 25

26 References 1. Intel 64 and IA- 32 Architectures SoFware Developer s Manual (Volume 3C, Part 3) h]p://download.intel.com/products/ processor/manual/ pdf 2. Intel Virtualiza$on Technology Processor Virtualiza$on Extensions and Intel Trusted execu$on Technology repo.meh.or.id/todo/ virtualiza$on.pdf 3. Intel Virtualiza$on Technology Primer by Rich Uhlig sofware.intel.com/file/ Hardware Virtualiza$on blogs by Johan De Gelas at AnandTech h]p:// h]p:// 5. Performance Evalua$on of Intel EPT Hardware Assist h]p:// EPT- eval.pdf 6. Memory Virtualiza$on by Sco] Devine, VMware Labs labs.vmware.com/download/46/ 26

27 Questions 27

28 Thank You 28

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