ProductionLine Testers, Inc. P#: SMU-410 USER GUIDE

Transcription

1 ProductionLine Testers, Inc. P#: SMU-410 USER GUIDE Introduction The SMU-410 board forces and senses both voltages and currents. The interface is the PXI bus and the board may be inserted into CPCI, legacy PXI, and "hybrid" slots. Each of the four channels is independent and electrically isolated from the PXI power supply, chassis and each other. Voltages and currents are generated using 16-bit 's. There are 7 current ranges, in decade steps down from 200mA. The single voltage range is 10V. Measurements are done using an, with a programmable resolution from 18- bits to 24-bits. The SMU is usable in all four quadrants of the IV graph. In addition to the main input/output pin, the DB25 front panel connector includes 2 analog grounds, a Kelvin sense, a ground sense and a driven guard pin for each of the 4 channels. Microcontrollers in each channel use nonvolatile memory to store the and offset and gain calibration constants and the precise values of each of the 7 current range resistors. Synchronous and asynchronous triggering functions are controlled independently using a dedicated and CPLD. (Preliminary) Features 4 isolated SMU channels, for legacy & hybrid PXI 4-quadrant: Voltage = ±10V, Current ±200mA 7 current ranges, ±200nA to ±200mA full scale 24-bit 's, programmable time vs. resolution 16-bit 's, sub-lsb offset & gain adjustments VS DLL's, VB6 DLL's, Front-Panel GUI with Calibration Synchronous & asynchronous triggering functions Excellent accuracy, from ±0.03% ±1mV 1

2 Architecture Data Distribution Data from the PXI bus is decoded and transferred to a local bus via the PLX9030 interface device and a CPLD. A master microcontroller distributes this data to local slave microcontrollers. The slaves communicate among the 's, 's, and various other components. Trigger bus Computer & PXI Chassis PXI bus Interface Logic & Master Microcontroller CPLD ( electrical isolation ) Fig. 1 Overall Block Diagram Power Distribution Most of the power from the PXI bus must come from the 3.3V and 5V rails. There is a regulator on each of these lines to boost the voltages to 12V. The output of one goes to the isolation regulators for Channels 1 and 2 and the output of the other goes to Channels 3 and 4. The isolation regulators change the 12V / GND power to ±15V / AGND_x, where x is the channel number. Single Channel 2

3 Each of the four channels has a dual regulator to generate 3.3V and 5V for the local digital logic. An op amp loop forms a current source with a power buffer, using selectable precision resistors and relays to cover the specified range. The opposite polarity of the programmed current is generated as a clamp. Both polarities of the programmed voltage are also generated in a clamping configuration. Most everything feeds a summing junction. Kelvin Sensing Figure 3 shows an example of the correct connections for the Kelvin sense and ground sense lines for Channel 1. These are labeled "KLVN_1" and "GNDS_1" respectively on the DB25 Front Panel Connector. Fig.2 Single Channel Block Diagram There are 1K resistors in parallel with the cable. Since the cable resistance is normally very small, this parallel resistance is negligible. It makes connection of the sense lines optional, although accuracy decreases if they are not used. Fig. 3 Sense Connections 3

4 Front Panel Connector Figure 4 is the pinout of the DB25 Front Panel Connector. The shield on this connector is grounded to the chassis. The PXI_GND pin is for reference use only and not meant for high currents or low noise. Each channel (chn) is labeled with an underscore, _1, _2, _3, _4. VI_chn = SMU input / output GUARD_chn = for driven shields KLVN_chn = Kelvin sense line GNDS_chn = ground sense line Fig. 4 DB25 Front Panel Connector Software DLL's: The SMU-410 includes Dynamic Link Libraries (DLL's) compatible with Visual Studio 2010 C++ and Visual Basic version 6 (VB6). There are about 30 different functions that may be called from your source code, to directly control the PXI board. A description and examples of these functions are include in the pdf file "SMU-410 DLL Functions" that is included on the installation disk. To use the DLL's, the drivers must be installed in the correct directory (usually Windows\System32 or Windows\SysWOW64) and properly registered with the operating system. After the installation has successfully completed, if problems are encountered, make sure that both the PlxApi650.dll and PLT_SMU_DLL.dll files are in these directories. (NOTE: It is not sufficient to simply copy the files, since they must also be added to the Windows Registry.). Front Panel GUI: Also included on the installation disk is the "Front Panel" Graphical User's Interface (GUI). This is a simple way to use the 4 SMU's individually or simultaneously. This same GUI has a Calibration section that allows the user to adjust the calibration constants in an easy step-by-step manner to fine-tune the SMU's to the user's specific environment. 4

5 5 Figure 5 Front Panel GUI

6 This screen shot was taken with each of the 4 channels driving a 1K load resistor to its local ground. As may be seen in Chn1, if the current and voltage are programmed in such a way that the current clamps before reaching the programmed voltage, then the SMU acts like a current source and the voltage is the compliance value. For the other 3 channels, the voltage and currents are selected in such a way that these act as voltage sources, with the current maintaining the compliance. Although this example shows only positive currents and voltages, it works equally well in the other 3 quadrants also. Calibration: The dedicated microcontroller for each channel contains the calibrations constants. These are saved in FLASH EEPROM and are automatically loaded when the board is powered-up. The board is already calibrated when it is shipped from the factory, but the user may recalibrate, using a DMM and several very precise resistor loads. These calibration constants are not meant to null system values. They are intended only to compensate for internal offsets and cabling resistance. Each channel includes 7 range resistors for forcing and measuring current. The calibration constants for these are the difference in nominal value, and are set at the factory. Another 4 constants, each 1 byte, save the encoded calibration values, and 6 more, each 3 bytes, save the calibration values. Only the and constants may be recalibrated by the user. When the "Enable Calibration" box is checked, as it is in the previous demo screen, the user enters the Calibration Mode. The first pulldown menu on the bottom left selects the channel, and the next one over to the right selects one of the eight constants that may be adjusted. After one of these constants is chosen, the "Conditions" box tells the user what to do. In this example, to calibrate the I offset voltage for SMU Chn1, the user is instructed to "Force 2.1mA, 10V, 1.000K Load." This means the user should: program 10V and 2.1mA in the upper left text boxes for SOURCE Chn1 (the area with green text), connect a 1K load between VI_1 and AGND_1 on the DB25, connect KLVN_1 to VI_1, connect GNDS_1 to AGND_1, connect an external high-precision DMM across the 1K, check the "Connect" box, press the "Set 1" button. 6

7 The 1K load should be as exact as possible. A +/-0.1% resistor will give you only +/-0.1% results. If the DMM has an internal pulldown resistor, for example 10M, this must also be taken into account (not so important for the 1K loads, but very important for the 100K loads). The next thing that happens is the voltage and current are applied. The external meter will register the exact voltage results, which may then be transformed into the required "ua" current, and entered into the "Ext. DMM" text box. After this data has been entered, hit the "Enter" button. The software will calculate the new calibration constant and report it in the box below. The "Enter" button will change to a "Save" button. If you wish to save this new constant, press the "Save" button. If not, then hit the "Abort" button. 7