^1 HARDWARE REFERENCE MANUAL

Transcription

1 ^1 HARDWARE REFERENCE MANUAL ^2 PMAC STD ^3 Programmable Multi-Axis Controller ^4 4Ax xHxx ^5 January 28, 2003 Single Source Machine Control Power // Flexibility // Ease of Use Lassen Street Chatsworth, CA // Tel. (818) Fax. (818) //

2 Copyright Information 2003 Delta Tau Data Systems, Inc. All rights reserved. This document is furnished for the customers of Delta Tau Data Systems, Inc. Other uses are unauthorized without written permission of Delta Tau Data Systems, Inc. Information contained in this manual may be updated from time-to-time due to product improvements, etc., and may not conform in every respect to former issues. To report errors or inconsistencies, call or Delta Tau Data Systems, Inc. Technical Support Phone: (818) Fax: (818) Website: Operating Conditions All Delta Tau Data Systems, Inc. motion controller products, accessories, and amplifiers contain static sensitive components that can be damaged by incorrect handling. When installing or handling Delta Tau Data Systems, Inc. products, avoid contact with highly insulated materials. Only qualified personnel should be allowed to handle this equipment. In the case of industrial applications, we expect our products to be protected from hazardous or conductive materials and/or environments that could cause harm to the controller by damaging components or causing electrical shorts. When our products are used in an industrial environment, install them into an industrial electrical cabinet or industrial PC to protect them from excessive or corrosive moisture, abnormal ambient temperatures, and conductive materials. If Delta Tau Data Systems, Inc. products are exposed to hazardous or conductive materials and/or environments, we cannot guarantee their operation.

3 Table of Contents PMAC STD BOTTOM BOARD JUMPER DESCRIPTIONS... 1 W1 - W4: Host Interrupt Signal Select... 1 W6 - W10: Address Mapping Select... 1 W11 - W14: PMAC STD Bus Address Select (Coarse)... 2 W15 - W22: PMAC STD Bus Address Select (Fine)... 2 PMAC STD BUS ADDRESSING... 3 From Jumper Configuration to Address... 3 From Address to Jumper Configuration... 3 HOST PC-AT I/O ADDRESS MAP... 5 BUS BOTTOM BOARD E-POINT JUMPER DESCRIPTIONS... 7 W23 - W32: Configuration Jumpers... 7 W33 - W39: Configuration Jumpers... 8 W40 - W44: Front Panel Signal Select... 8 W45 - W57: Serial Interface Handshake Control... 9 W50 - W57: Serial Interface Handshake Control... 9 W58 - W64: PMAC STD Bus Memory Select SW1-1 - SW1-4: Software Address Control SW1-5 - SW1-8: Communications Control PMAC STD E-POINT JUMPER DESCRIPTIONS Top Circuit Board and Option 1S Board E3 - E6: Servo Clock Frequency Control E17A - E17D: Amplifier Enable Polarity Control E22 - E23: Control Panel Handwheel Enable E24 - E27: Encoder Single-Ended/Differential Control E28: Warning Following Error/Watchdog Timer Signal Control E29 - E33: Phase Clock Frequency Control MHZ MASTER CLOCK E34 - E39: Encoder Sampling Clock Frequency Control E48: Ram Wait State Control E49: Serial Communications Parity Control E50: EAROM Save Enable/Disable E51: Normal/Re-Initializing Power-Up E72 - E73: Panel Analog Time Base Signal Enable...17 E74 - E75: Clock Output Control for External Interpolation E85: Host-Supplied Analog Power Source Enable E87 - E88: Host-Supplied Analog Power Source Enable E90: Host-Supplied Switch Pull-Up Enable E93 - E94: Board Channel Select E98: DAC/ADC Clock Frequency Control PMAC STD MATING CONNECTORS Bottom Board Connectors J1 (JRS232)/RS232 Serial Communications J2 (Not Used) J3 (JRS422)/RS422 Serial Communications J4 (JOPT)/OPTO I/O Piggyback Board Connectors (First and Option 1S)...19 J1 (JDISP)/Display and General I/O J2 (JPAN)/Control Panel and General I/O...19 J3 (JTHW)/Multiplexer Port and General I/O J4 (JMACH1/JMACH2)/Machine Connectors J5 (JS1/JS2)/A-D Inputs Table of Contents i

4 J7 (JEQU1/JEQU2)/Position Compare...20 PMAC STD CONNECTOR PINOUTS J1 JRS232 (5-Pin Connector) J3 JRS422 (20-Pin Connector) J4 JOPT (26-Pin Connector) J1 JDISP (14-Pin Connector) J2 JPAN (26-Pin Connector) J3 JTHW Connector (26-Pin Connector)...25 J4 JMACH1 (60-Pin Header) J5 JS1 (16-Pin Header) J7 JEQU (6-Pin Header) J1 (14-Pin Connector) J2 (26- Pin Connector) J3 JTHW Connector (26-Pin Connector)...30 J4 JMACH2 (60-Pin Header) J5 JS2 (16-Pin Header) J7 JEQU (6-Pin Header) PMAC BASIC SPECIFICATIONS Physical Specifications Electrical Specifications Memory Specifications CPU Specifications Performance Specifications I/O Specifications Software Specifications Options Option Option Option Option Option 4A Option 5A Option 5B Option 5C Option Option Option Option 9L Option Option Option Accessories Accessory 1: +5V Power Supplies and Batteries Accessory 2: +/-15V Power Supplies Accessory 3: Serial Communications Cable...43 Accessory 4: Additional Instruction Manual Accessory 6: Handwheel Encoder Accessory 8: Terminal Block Accessory 9: IBM PC Software Accessory 12: Liquid Crystal/Vacuum Fluorescent Display Accessory-14: I/O Expansion Board Accessory 16D: Control Panel and Display Box Accessory 17: PMACAD Cad Conversion Software Accessory 18: Thumbwheel Multiplexer Board Accessory 20: Hand-Held Terminal ii Table of Contents

5 Accessory 21: I/O Simulators and Cables Accessory 22: Extended Warranty Accessory 24: Axis Expansion Board Accessory 25: Extended Servo Algorithm Tuning Software Accessory 26A: Serial Communications Converter Accessory 27: Optically Isolated I/O Board Accessory 28: A/D Conversion Board Accessory 29: Magnetostrictive Linear Displacement Transducer Interface Board Accessory 31: PMAC Demonstration Box Unit Accessory 32: PMAC Software Upgrade/Update Kit Accessory 33: PMAC-NC Software Library Accessory 34: Multiplexed I/O Expansion Board Accessory 35: Multiplexer Port Line Driver and Receiver Accessory 36: Analog To Digital Converter Board Accessory 39: Handwheel Encoder Converter Board Accessory 40: On-Site Field Service And Training Accessory 41: Servo Training Systems Future Accessories Table of Contents iii

6 iv Table of Contents

7 PMAC STD BOTTOM BOARD JUMPER DESCRIPTIONS W1 - W4: Host Interrupt Signal Select E Point and Location Description Default Physical Layout W1 B1 Jump pin 1 to 2 to allow PMAC-Interrupt to host CPU on INTRQ. Jumper installed W2 B1 Jump pin 1 to 2 to allow PMAC- Interrupt to host CPU on INTRQ1. W3 B1 Jump pin 1 to 2 to allow PMAC- Interrupt to host CPU on INTRQ2. No jumper installed No jumper installed W4 B1 Not used with PMAC. No jumper installed W5 B1 Jump pin 1 to 2 to allow SA for STD80. Remove jumper for EA for STD32. Jumper installed W6 - W10: Address Mapping Select E Point and Location Description Default Physical Layout W6 B1 Jump pin 1 to 2 to allow to allow use of 16- Bit address I/O. Jumper installed W7 B2 Jump pin 1 to 2 to allow to allow use of 8-Bit address I/O. No jumper installed W8 B2 Not used with PMAC. No jumper installed W9 B2 Jump pin 1 to 2 to allow PMAC to boot up from PROM (U11). Remove jumper to allow PMAC to boot up from host computer. W10 B2 Jump pin 1 to 2 to allow PMAC to run with 20 MHz clock. Remove jumper to allow PMAC to run at 29 MHz (must install 29 MHz crystal and 35 nsec RAM. Jumper installed Jumper installed Bottom Board Jumper Descriptions 1

8 W11 - W14: PMAC STD Bus Address Select (Coarse) These jumpers work with W15 and W22 to set the base address of PMAC STD on the STD bus. See PMAC STD Bus Addressing below for details on how to set these jumpers. E Point and Location Description Default Physical Layout W11 W12 W13 W14 C2 W11 - Bit 15 STD bus base address W12 - Bit 14 STD bus base address W13 - Bit 13 STD bus base address W14 - Bit 12 STD bus base address No jumpers installed Note: ON = 0 and OFF = 1 for E66 - E71. W15 - W22: PMAC STD Bus Address Select (Fine) These jumpers work with W11 and W14 to set the base address of PMAC STD on the STD bus. See PMAC STD Bus Addressing below for details on how to set these jumpers. E Point and Physical Layout W15 W16 W17 W18 W19 W20 W21 W22 Location is C3 for all Note: ON = 0 and OFF = 1 for E66 - E71. Description W15 - Bit 11 STD bus base address W16 - Bit 10 STD bus base address W17 - Bit 9 STD bus base address W18 - Bit 8 STD bus base address W19 - Bit 7 STD bus base address W20 - Bit 6 STD bus base address W21 - Bit 5 STD bus base address W22 - Bit 4 STD bus base address Default As shown in physical layout diagram. 2 Bottom Board Jumper Descriptions

9 PMAC STD BUS ADDRESSING Jumpers W11, W12, W13, W14, W15, W16, W17, W18, W19, W20, W21, and W22 on the PMAC STD determine the base address of the card in the I/O space of the host STD s expansion bus. Together, they form a binary number that specifies the 16 consecutive addresses on the bus where the card can be found. The jumpers form the base address in the following fashion: Jumper W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 Bit # Dec Value Hex Value If a jumper is ON, the value it contributes to the base address is zero. If a jumper is OFF, the value it contributes to the base address is given in the table above. On the PMAC STD, the jumpers are physically arranged in the same order they are presented in the above table. From Jumper Configuration to Address To determine the address specified by a given jumper configuration, use the following formula: (Decimal) Address = 32768*W *W *W *W *W *W *W *W *W *W *W *W22 (Hexadecimal) Address = $8000*W11 + $4000*W12 + $2000*W13 + $1000*W14 + $800*W15 + $400*W16 + $200*W17 + $100*W18 + $80*W19 + $40*W20 + $20*W21 + $10*W22 In each case, Wxx = 1 if the jumper is OFF; Wxx = 0 if the jumper is ON. Example: On a PMAC card, the jumpers are in the following configuration: W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 OFF OFF OFF OFF ON ON OFF OFF ON ON ON ON The address can be computed as: Decimal Address = = Hex Address = $ $ $ $ $200 + $ = $F300 From Address to Jumper Configuration Once an I/O address on the STD expansion port has been selected, the following procedure can be used for setting the address jumpers. 1. Convert the address to a 4-digital hexadecimal value ($0000 to $FFFF, representing 0 to 65535). If the value does not fit in this range, you will not be able to set PMAC for this address. Make sure the last digit is 0; only addresses divisible by 16 are permitted as PMAC base addresses. 2. Take the first hex digit and convert it to binary. The binary digits represent bits 15 through 12 of the base address. Assign each binary digit to jumpers as follows: PMAC STD Bus Addressing 3

10 Bit # 15(MSB) (LSB) Jumper W11 W12 W13 W14 Digit Value Setting for 1 OFF OFF OFF OFF Setting for 0 ON ON ON ON 3. Take the second hex digit and convert it to binary. The binary digits represent bits 11 through 8 of the base address. Assign each binary digit to jumpers as follows: Bit # 11(MSB) (LSB) Jumper W15 W16 W17 W18 Digit Value Setting for 1 OFF OFF OFF OFF Setting for 0 ON ON ON ON 4. Take the third hex digit and convert it to binary. The binary digits represent bits 7 through 4 of the base address. Assign each binary digit to jumpers as follows: Bit # 7(MSB) 6 5 4(LSB) Jumper W19 W20 W21 W22 Digit Value Setting for 1 OFF OFF OFF OFF Setting for 0 ON ON ON ON Example 1: To set up the card to be at base address 992 decimal on the STD expansion bus. 992 decimal is equal to 03E0 hexadecimal. The first digit of 0 is binary This sets W11 ON, W12 ON, W13 ON, and W14 ON. The second digit of 3 is binary This sets W15 ON, W16 ON, W17 OFF, and W18 OFF. The third digit of E is binary This sets W19 OFF, W20 OFF, W21 OFF, and W22 OFF. Example 2: To set up the card to be at base address decimal on the STD expansion bus decimal is equal to F300 hexadecimal. The first digit of F is binary This sets W11 OFF, W12 OFF, W13 OFF, and W14 OFF. The second digit of 3 is binary This sets W15 ON, W16 ON, W17 OFF, and W18 OFF. The third digit of 0 is binary This sets W19 ON, W20 ON, W21 ON, and W22 ON. Example 3: To set up the card to be at base address 544 decimal on the STD expansion bus. 544 decimal is equal to 0220 hexadecimal. The first digit of 0 is binary This sets W11 ON, W12 ON, W13 ON, and W14 ON. The second digit of 2 is binary This sets W15 ON, W16 ON, W17 OFF, and W18 ON. The third digit of E is binary This sets W19 ON, W20 ON, W21 OFF, and W22 ON. 4 PMAC STD Bus Addressing

11 HOST PC-AT I/O ADDRESS MAP HEX Range DEC Range Usage F 0-31 DMA Controller A F Interrupt Controller A F Timer F (Keyboard) F Real-time clock, NMI mask F DMA Page Registers 0A0-0BF Interrupt Controller A 0C0-0DF DMA Controller A-5 0F0-0FF Math CO processor 1F0-1F Fixed Disk F Game Control Expansion Unit (usually open) F Parallel Printer: LPT2 2B0-2DF Alternate EGA 2F8-2FF Asynchronous Common: COM F Prototype Card (usually open) F PC Network F Parallel Printer: LPT F SDLC Communications Cluster 3A0-3A SDLC Communications 1 3B0-3BF IBM Monochrome Display/Printer 3C0-3CF Enhanced Graphics Adapter 3D0-3DF Color/Graphics 3F0-3F Diskette Controller 3F8-3FF Asynchronous Common: COM1 x2e1 GPIB Adapter x390-x393 Cluster Adapter *Note: It is highly recommended that the addresses marked below with * not be used by PMAC STD bus in conjunction with an IBM PC-XT compatible STD bus host computer. See above chart for possible contention with existing I/O. If a contention occurs, try a new unused address. Contention is exhibited by: Total Malfunction Partial Function, Input O.K., Output bad or vice versa. Intermittent operation Host PC at I/O Address Map 5

12 6 Host PC at I/O Address Map

13 BUS BOTTOM BOARD E-POINT JUMPER DESCRIPTIONS W23 - W32: Configuration Jumpers E Point and Location Description Default Physical Layout W23 C3 Jump pin 1 to 2 to latch MD [0..23] (Use for SBX module, not used by PMAC). No jumper installed W24 C4 Jump pin 1 to 2 to disable latch of MD [0..23]. Transparent latch for PMAC. W25 C4 Jump pin 1 to 2 to allow PHASE signal to interrupt PMAC. W26 C4 Jump pin 1 to 2 to allow J5-24 to be signal MA6 installed. W27 C4 Jump pin 1 to 2 to allow J5-24 to be signal SBX-INIT. Jumper installed Jumper installed No jumper installed Jumper installed W28, W29 Do not exist. W30 B5 Jump pin 1 to 2 for battery backed SRAMS. Note: Install only W31 or W30. Jumper installed W31 B5 Jump pin 1 to 2 for +5V to power SRAMS. No jumper installed W32 B5 Jump pin 1 to 2 to clear memory (not used by PMAC). No jumper installed PMAC STD Bus Bottom Board E-Point Jumper Descriptions 7

14 W33 - W39: Configuration Jumpers E Point and Location Description Default Physical Layout W33 B6 Jump pin 1 to 2 to enable Watchdog timer. Jumper installed Remove jumper to disable Watchdog timer (for test purposes only). W34 B6 Jump pin 1 to 2 to enable Watchdog interrupt. No jumper installed Remove jumper to disable Watchdog interrupt (not used for PMAC). W35 B6 Jump pin 1 to 2 to allow the serial data input to PMAC to come from the RS422/485 connector J3. Do not install if W48 is installed (see W48). No jumper installed W36 B6 Jump pin 1 to 2 to allow the serial handshake input to PMAC to come from the RS422/485 connector J3. Do not install if W49 is installed (see W49). W37 B6 Jump pin 1 to 2 to add 100 OHM terminator to the RS422/485 serial data input lines on J3. No jumper installed No jumper installed W38 B6 Jump pin 1 to 2 to add 100 OHM terminator to the RS422/485 serial handshake input lines on J3. No jumper installed W39 Does not exist W40 - W44: Front Panel Signal Select E Point and Location Description Default Physical Layout W40 D6 Jump pin 1 to 2 to allow PMAC-interrupt on IRQ1 No jumper installed of J2. W41 D6 Jump pin 1 to 2 to allow PMAC-interrupt on IRQ3 No jumper installed of J2. W42 D6 Jump pin 1 to 2 to allow PMAC-interrupt on IRQ5 No jumper installed of J2. W43 D6 Jump pin 1 to 2 to allow PMAC-interrupt on IRQ6 No jumper installed of J2. W44 D6 Jump pin 1 to 2 to allow PMAC-interrupt on IRQ7 of J2. No jumper installed 8 PMAC STD Bus Bottom Board E-Point Jumper Descriptions

15 W45 - W57: Serial Interface Handshake Control E Point and Location Description Default Physical Layout W45 D6 Jump W45-1 to W45-2 to allow RXD to be input Jumper installed on J1-1. W46 C7 Jump W46-1 to W46-2 to allow TXD to be output Jumper installed on J1-2. Jump W45-1 to W46-1 to allow RXD to be output. W47 C7 Jump pin 1 to 2 to tie the CTS handshake, input on No jumper installed J1-4 to VCC thru a 330 ohm resistor. W48 C7 Jump pin 1 to 2 to allow serial data input to PMAC Jumper installed to come from the RS232 connector J1. Do not install if W35 is installed (see W35). W49 B7 Jump pin 1 to 2 to allow serial handshake input to PMAC to come from the RS232 connector J1. Jumper installed W50 - W57: Serial Interface Handshake Control W50 to W57 jumpers control whether the RS-422 serial port will be in DCE or DTE format. The default configuration permits straight-across connection to a PC DB-25 serial port. E Point and Location Description Default Physical Layout W50 W51 B7 Jump, W50-1 to W50-2 to allow RD- to be 1-2 Jumper installed input on J3-11; Jump W51-1 to W51-2 to allow SD- to be output on J3-13. Jump W50-1 to W51-1 to allow RD- to be output on J3-11; Jump W50-2 to W51-2 to allow SD- to be input on J3-13. W52 W53 B7 Jump W52-1 to W52-2 to allow RD+ to be input on J3-12; jump W53-1 to W53-2 to allow SD+ to be output on J Jumper installed W54 W55 B7 Jump W54-1 to W54-2 to allow CS+ to be input on J3-16; Jump W55-1 to W55-2 to allow RS+ to be output on J3-18. Jump W54-1 to W55-1 to allow CS+ to be output on J3-16; Jump W54-2 to W55-2 to allow RS+ to be input on J3-18. W56 W57 B7 Jump W56-1 to W56-2 to allow CS- to be input on J3-15; Jump W57-1 to W57-2 to allow RSto be output on J3-17. Jump W56-1 to W57-1 to allow CS- to be output on J3-15; Jump W56-2 to W57-2 to allow RS- to be input on J Jumper installed 1-2 Jumper installed PMAC STD Bus Bottom Board E-Point Jumper Descriptions 9

16 W58 - W64: PMAC STD Bus Memory Select E Point and Location Description Default Physical Layout W58, W59 Do not exist. W60 A1 Jump pin 1 to 2 for 32K SRAM (not used for No jumper installed PMAC). W61 A1 Jump pin 1 to 2 for 128K SRAM. Jumper installed W62 A1 Jump pin 1 to 2 for 32K SRAM (not used for No jumper installed PMAC). W63 A2 Jump pin 1 to 2 for 128K SRAM. Jumper installed W64 A2 Jump pin 1 to 2 for "INTEL FLASH" memory (not used for PMAC). No jumper installed SW1-1 - SW1-4: Software Address Control Jumpers SW1-1 - SW1-4 control the software address of the card, for serial addressing and for sharing the servo clock over the serial connector. sends the clock and receive the clock. Card Address Control E Points Default and Physical Layout SW1-1 SW1-2 SW1-3 SW1-4 SW1-1 SW1-2 SW1-3 SW1-4 Card Address Location All B5 OFF OFF ON OFF OFF OFF ON OFF ON ON OFF OFF OFF ON ON OFF ON OFF ON ON ON ON ON OFF OFF OFF ON OFF OFF OFF ON OFF ON ON OFF OFF OFF ON ON OFF ON OFF ON ON ON ON ON Note: The card must either be set up or receiving clock signals over the serial port from another card that is set up or the Watchdog timer will trip (red light ON) and the card will shut down. 10 PMAC STD Bus Bottom Board E-Point Jumper Descriptions

17 SW1-5 - SW1-8: Communications Control Jumpers SW1-5 - SW1-8 control what baud rate to use for serial communications. Any character received over the bus causes PMAC to use the bus for its standard communications. The serial port is disabled if SW1-5 - SW1-8 are all off. Default and Baud Rate Control E Points Baud Rate Physical Layout SW1-5 SW1-6 SW1-7 SW MHz MHz SW1-5 Master Clock Master Clock SW1-6 OFF OFF OFF OFF Disabled Disabled SW1-7 ON OFF OFF OFF SW1-8 OFF ON OFF OFF ON ON OFF OFF OFF OFF ON OFF ON OFF ON OFF OFF ON ON OFF ON ON ON OFF OFF OFF OFF ON ON OFF OFF ON Default OFF ON OFF ON ON ON OFF ON OFF OFF ON ON ON OFF ON ON OFF ON ON ON ON ON ON ON PMAC STD Bus Bottom Board E-Point Jumper Descriptions 11

18 12 PMAC STD Bus Bottom Board E-Point Jumper Descriptions

19 PMAC STD E-POINT JUMPER DESCRIPTIONS Top Circuit Board and Option 1S Board If the Option 1S is purchased, one circuit board must be set up for channels 1-4; the other must be set up for channels 5-8. Many of the jumpers on the board are only used when the board is configured for channels 1-4. As shipped from the factory the topmost board is set up for channels 1-4. Note: The PMAC STD top circuit board and the Option 1S circuit board contain identical hardware. Jumpers E93 and E94 determine whether the circuit board is used as the top circuit board, containing channels 1-4, or the Option 1S board, containing channels 5-8. If Option 1S is not purchased, the circuit board must be set up for channels 1-4. E3 - E6: Servo Clock Frequency Control The servo clock (which determines the servo update rate) is derived from the phase clock (see E98, E29 - E33) through a "divide-by-n" counter. Jumpers E3-E6 control this dividing function. These jumpers are only used on the board configured for channels 1-4. E3 E4 E5 E6 Servo Clock = Phase Clock Divided by N Default and Physical Layout E6 E5 E4 E3 ON ON ON ON N = Divided by 1 Location: D2 D2 D2 D2 OFF ON ON ON N = Divided by 2 ON OFF ON ON N = Divided by 3 OFF OFF ON ON N = Divided by 4 Only E5 and E6 ON ON OFF ON ON N = Divided by 5 OFF ON OFF ON N = Divided by 6 Only E4 and E6 ON (Opt 5 only) ON OFF OFF ON N = Divided by 7 OFF OFF OFF ON N = Divided by 8 ON ON ON OFF N = Divided by 9 OFF ON ON OFF N = Divided by 10 ON OFF ON OFF N = Divided by 11 OFF OFF ON OFF N = Divided by 12 ON ON OFF OFF N = Divided by 13 OFF ON OFF OFF N = Divided by 14 ON OFF OFF OFF N = Divided by 15 OFF OFF OFF OFF N = Divided by 16 Note: The setting of I-variable I10 should be adjusted to match the servo interrupt cycle time set by E98, E3 -- E6, E29 -- E33, and the crystal clock frequency. I10 holds the length of a servo interrupt cycle, scaled so that 8,388,608 equals one millisecond. Since I10 has a maximum value of 8,388,607, the servo interrupt cycle time should always be less than a millisecond (unless you want to make your basic unit of time on PMAC something other than a millisecond). If you wish a servo sample time greater than one millisecond, the sampling may be slowed in software with variable Ix60. Frequency can be checked on J3 pins 7 and 8. It can also be checked from software by typing RX:0 in the PMAC terminal at 10-second intervals and dividing the difference of successive responses by The resulting number is the approximate Servo Clock frequency in khz. PMAC STD E-Point Jumper Descriptions 13

20 Note: If E40-E43 are set up so that the card has a software address other the servo clock signal must be received over the serial port from so these jumpers have no effect. All versions of the PMAC except Option 5 (30MHz), have a MHz (20MHz) clock crystal, even the 40 and 60 MHz CPU versions. E17A - E17D: Amplifier Enable Polarity Control E Point and Location Description Default Physical Layout E7-E16 Not Used E17A B2 Jump 1-2 for high TRUE AENA Jumper installed Remove jumper for low TRUE AENA1. E17B B2 Jump 1-2 for high TRUE AENA Jumper installed Remove jumper for low TRUE AENA2. E17C B2 Jump 1-2 for high TRUE AENA Jumper installed Remove jumper for low TRUE AENA3. E17D B2 Jump 1-2 for high TRUE AENA4. Remove jumper for low TRUE AENA Jumper installed Note: Low-true enable is the fail-safe option because of the sinking (open-collector) ULN2803A output driver IC. E22 - E23: Control Panel Handwheel Enable E Point and Location Description Default Physical Layout E22 A7 Jump pin 1 to 2 to obtain handwheel encoder signal from front panel at J2-16 for CHB2 (ENC2-B). No jumper E23 A7 Jump pin 1 to 2 to obtain handwheel encoder signal from front panel at J2-22 for CHA2 (ENC2-A). No jumper Note: With these jumpers ON, no encoder should be wired into ENC2 on JMACH1. Jumper E26 must connect pins 1-2, because these are single-ended inputs. This function is unrelated to the encoder brought in through Acc- 39 on J2. 14 PMAC STD E-Point Jumper Descriptions

21 E24 - E27: Encoder Single-Ended/Differential Control E Point and Location Description Default Physical Layout E24 D5 ENC 4 through 1: Jump pin 1 to 2 to tie complementary encoder inputs to 2.5V. 1-2 Jumper installed for E24 - E27. E25 C5 Jump pin 2 to 3 to tie complementary encoder inputs to 5V. For no encoder connection: Jump pin 1 to 2. E26 C5 For single-ended encoders: Jump pin 1 to 2. For differential line-driver encoders: Do not care. E24: ENC 4 E25: ENC 3 E26: ENC 2 E27: ENC 1 E27 C5 For complementary open-collector encoders: Jump pin 2 to 3. E28: Warning Following Error/Watchdog Timer Signal Control E Point and Location Description Default Physical Layout E28 A6 Jump pin 1 to 2 to allow warning following error (Ix12) for the selected coordinate system to control FEFCO/ on J4-57. Jump pin 2 to 3 to cause Watchdog timer output to control FEFCO/. Low TRUE output in either case. 2-3 Jumper installed E29 - E33: Phase Clock Frequency Control Jumpers E29 through E33 control the speed of the phase clock, and, indirectly, the servo clock, which is divided down from the phase clock (see E3 - E6). No more than one of these five jumpers may be on at a time. These jumpers are only used if the board is configured for channels 1-4. Phase Clock Frequency Default and Physical Layout E29 E30 E31 E32 E MHz MHz E33 E32 E31 E30 E29 Master Clock Master Clock ON OFF OFF OFF OFF 2.26 khz 3.39 khz Location: D2 - D3 OFF ON OFF OFF OFF 4.52 khz 6.78 khz OFF OFF ON OFF OFF 9.04 khz khz OFF OFF OFF ON OFF khz khz OFF OFF OFF OFF ON khz khz Note: If jumper E98 has been changed to connect pins 2-3 (default is 1-2), the phase clock frequency is exactly 1/2 that shown in the above table. If E40-E43 are set so that the card has a software address other the phase clock signal must be received over the serial port from so these jumpers have no effect. PMAC STD E-Point Jumper Descriptions 15

22 E34 - E39: Encoder Sampling Clock Frequency Control Jumpers E34 - E38 control the encoder sampling clock (SCLK) used by the gate array ICs. No more than one of these five jumpers may be on at a time. These jumpers are only used if the board is configured for channels 1-4. SCLK Clock Frequency Default and Physical Layout E34 E35 E36 E37 E38 E MHz MHz E39 E38 E37 E36 E35 E34 Master Clock Master Clock ON OFF OFF OFF OFF OFF MHz MHz Location: D2 - D3 OFF ON OFF OFF OFF OFF MHz MHz OFF OFF ON OFF OFF OFF MHz MHz OFF OFF OFF ON OFF OFF MHz MHz OFF OFF OFF OFF ON OFF MHz MHz OFF OFF OFF OFF OFF ON External clock 1 TO 30 MHz maximum input on CHC4 and CHC4/ E48: Ram Wait State Control E Point and Location Description Default Physical Layout E48 B5 Jump pin 1 to 2 for one wait state operation; remove jumper for ZERO wait state operation (unless OPT4 or OPT5) Jumper installed Note: This jumper is used only if the board is configured for channels 1-4 with E93 and E94. E49: Serial Communications Parity Control E Point and Location Description Default Physical Layout E49 C5 Jump pin 1 to 2 for ODD serial parity; remove jumper for NO serial parity. No jumper installed This jumper is used only if the board is configured for channels 1-4 with E93 and E94. E50: EAROM Save Enable/Disable E Point and Location Description Default Physical Layout E50 C5 Jump pin 1 to 2 to disable save to EAROM; remove jumper to enable save to EAROM. No jumper installed This jumper is used only if the board is configured for channels 1-4 with E93 and E94. E51: Normal/Re-Initializing Power-Up E Point and Location Description Default Physical Layout E51 C5 Jump pin 1 to 2 for normal power-up/reset. Remove jumper to re-initialize on powerup/reset. Jumper installed This jumper is used only if the board is configured for channels 1-4 with E93 and E PMAC STD E-Point Jumper Descriptions

23 E72 - E73: Panel Analog Time Base Signal Enable E Point and Location Description Default Physical Layout E72 D3 Jump pin 1 to 2 to allow V to F converter No jumper installed FOUT derived from Wiper input on J2 to connect to CHA4. E73 D3 Jump pin 1 to 2 to allow V to F converter FOUT/ derived from Wiper input on J2 to connect to CHA4/. No jumper installed Note: With these jumpers on, no encoder should be wired into ENC4 on JMACH1. E27 must connect pins 1 to 2 because these are single-ended inputs. Variable I915 should be set to 4 to create a positive voltage (frequency) number in PMAC. E74 - E75: Clock Output Control for External Interpolation E Point and Location Description Default Physical Layout E74 D2 Jump pin 1 to 2 to allow SCLK/ to output on CHC4/. No jumper installed E75 D2 Jump pin 1 to 2 to allow SCLK to output on CHC4. No jumper installed Note: SCLK out permits synchronous latching of analog encoder interpolators such as Acc-8D Opt 8. E85: Host-Supplied Analog Power Source Enable E Point and Location Description Default Physical Layout E85 A2 Jump pin 1 to pin 2 to allow A+14V to come from STD bus (ties amplifier and PMAC STD power supply together. Defeats OPTO coupling.) Note that if E85 is changed, E88 and E87 must also be changed. Also, see E90. No jumper E87 - E88: Host-Supplied Analog Power Source Enable E Point and Location Description Default Physical Layout E87 A6 Jump pin 1 to pin 2 to allow AGND to come No jumper from STD bus (ties amplifier and PMAC STD GND together. Defeats OPTO coupling.) Note that if E87 is changed, E85 and E88 must also be changed. Also, see E90. E88 B2 Jump pin 1 to pin 2 to allow A-14V to come from STD bus (ties amplifier and PMAC STD power supply together. Defeats OPTO coupling.) Note that if E88 is changed; E87 and E85 must also be changed. Also, see E90. No jumper PMAC STD E-Point Jumper Descriptions 17

24 E90: Host-Supplied Switch Pull-Up Enable E Point and Location Description Default Physical Layout E90 C11 Jump pin 1 to 2 to use A+15V from J4 (top board) pin 59 as supply for input flags (E89 ON) {flags should be tied to AGND} or A+15V/OPT+V from J4 (bottom board) pin 59 as supply for input flags (E89 OFF) {flags should be tied to separate 0V reference}. Jump pin 2 to 3 to use +12V from STD bus connector P1-pin B09 as supply for input flags {flags should be tied to GND}. See also E85, E87, E88 and PMAC Optoisolation diagram 1-2 Jumper installed E93 - E94: Board Channel Select E Point and Location Description Default Physical Layout E93 A6 Jump 1-2 to select second 4-axis board 2-3 Jumper installed (Option 1S), channels 5-8. Jump 2-3 to select first 4-axis board, channels 1-4. E94 A5 Jump 1-2 to select first 4-axis board, channels 1-4. Jump 2-3 to select second 4-axis board (Option 1S), channels Jumper installed E98: DAC/ADC Clock Frequency Control E Point and Location Description Default Physical Layout E98 D3 Jump 1-2 to provide a 2.45 MHz (3.67 MHz for Option 5) DCLK signal to DACs and ADCs. Jump 2-3 to provide a 1.22 MHz (1.83 MHz for Option 5) DCLK signal to DACs and ADCs. Important for high accuracy A/D conversion on Acc Jumper installed Note: This also divides the phase and servo clock frequencies in half. See E29-E33, E3-E6, I10 18 PMAC STD E-Point Jumper Descriptions

25 PMAC STD MATING CONNECTORS This section lists several options for each connector. Choose an appropriate one for an application. Bottom Board Connectors J1 (JRS232)/RS232 Serial Communications 1. 5-pin SIP female connector J2 (Not Used) J3 (JRS422)/RS422 Serial Communications 1. Two 20-pin female flat cable connector Delta Tau P/N 014-R00F26-0K0 T&B Ansley P/N T&B Ansley standard flat cable stranded 20-wire 3. Phoenix varioface module type FLKM 20 (male pins) P/N J4 (JOPT)/OPTO I/O 1. Two 26-pin female flat cable connector Delta Tau P/N 014-R00F26-0k0 T&B Ansley P/N T&B Ansley standard flat cable stranded 26-wire 3. Phoenix varioface module type FLKM 26 (male pins) P/N Piggyback Board Connectors (First and Option 1S) J1 (JDISP)/Display and General I/O 1. Two 14-pin female flat cable connector 40 x 2 LCD display Delta Tau P/N 014-R00F14-0K0 T&B Ansley P/N T&B Ansley standard flat cable stranded 5-wire 3. Phoenix varioface modules type FLKM5 (male pins) P/N J2 (JPAN)/Control Panel and General I/O 1. Two 26-pin female flat cable connector Delta Tau P/N 014-R00F26-0K0 T&B Ansley P/N T&B Ansley standard flat cable stranded 26-wire 3. Phoenix varioface module type FLKM 26 (male pins) P/N J3 (JTHW)/Multiplexer Port and General I/O 1. Two 26-pin female flat cable connector Delta Tau P/N 014-R00F26-0K0 T&B Ansley P/N T&B Ansley standard flat cable stranded 26-wire 3. Phoenix varioface module type FLKM 26 (male pins) P/N J4 (JMACH1/JMACH2)/Machine Connectors 1. Two 60-pin female flat cable connector Delta Tau P/N 014-R00F60-0K0 T&B Ansley P/N available as Acc-8P or 8D T&B Ansley standard flat cable stranded 60-wire 3. Phoenix varioface module type FLKM 60 (male pins) P/N Note: Normally, the piggyback board J4 is used with Acc 8P or 8D with Option P, which provides complete terminal strip fan-out of all connections. PMAC STD Mating Connectors 19

26 J5 (JS1/JS2)/A-D Inputs 1. Two 16-pin female flat cable connector Delta Tau P/N 014-R00F16-0K0 T&B Ansley P/N T&B Ansley standard flat cable stranded 16-wire 3. Phoenix varioface module type FLKM 16 (male pins) P/N J7 (JEQU1/JEQU2)/Position Compare 1. 6-pin SIP female connector 20 PMAC STD Mating Connectors

27 PMAC STD CONNECTOR PINOUTS J1 JRS232 (5-Pin Connector) Bottom Board Top View Pin # Symbol Function Description Notes 1 RXD Input Receive Data 2 TXD Output Send Data 3 GND Common PMAC Common 4 CTS Input Clear to Send 5 SERC Output SYNC Clock Not used for asynchronous RS232 This connector provides the PMAC STD32 with a serial link to a host computer or a terminal (see Jumper description for W45 to W49). J3 JRS422 (20-Pin Connector) Bottom Board Front View Pin # Symbol Function Description Notes 1 SCK- Bidirect Sample Clock Diff. I/O Low True 2 SCK+ Bidirect Sample Clock Diff. I/O High True 3 SCIO- Bidirect Special Ctrl Diff. I/O Low True 4 SCIO+ Bidirect Special Ctrl Diff. I/O High True 5 PHASE- Bidirect Phase Clock Diff. I/O Low True *** 6 PHASE+ Bidirect Phase Clock Diff. I/O High True *** 7 SERVO- Bidirect Servo Clock Diff. I/O Low True *** 8 SERVO+ Bidirect Servo Clock Diff. I/O High True *** 9 SDIO- Bidirect Special Data Diff. I/O Low True 10 SDIO+ Bidirect Special Data Diff. I/O High True 11 RD- Input Receive Data Diff. I/O Low True ** 12 RD+ Input Receive Data Diff. I/O High True * 13 SD- Output Send Data Diff. I/O Low True ** 14 SD+ Output Send Data Diff. I/O High True * 15 CS+ Input Clear To Send Diff. I/O High True ** 16 CS- Input Clear To Send Diff. I/O Low True * 17 RS+ Output Req. To Send Diff. I/O High True ** 18 RS- Output Req. To Send Diff. I/O Low True * 19 GND Common PMAC Common 20 INIT/ Input PMAC Reset Low is "Reset" The JRS422 connector provides the PMAC with the ability to talk serially to a host computer over an RS- 422 interface, and to daisy chain interconnect multiple PMACs for synchronized operation. * Note: Required for communications to an RS-422 host port ** Note: Required for communications to an RS-422 or RS-232 host port *** Note: Output on input on other cards. These pins are for synchronizing multiple PMACs together by sharing their phasing and servo clocks. The PMAC designated as card 0 (@0) by its jumpers SW1-1 to SW1-4 outputs its clock signals. Other PMACs designated as cards 1-15 (@1-@F) by their jumpers SW1-1 to SW1-4 take these signals as inputs. If synchronization is desired, these lines should be connected even if serial communications is not used. See Also: Serial Communications Synchronizing PMAC to other PMACs PMAC STD Connector Pinouts 21

28 J4 JOPT (26-Pin Connector) Bottom Board Front View Pin # Symbol Function Description Notes 1 MOD23/ I/O Machine I/O 23 Low is true 2 MOD10/ I/O Machine I/O 10 Low is true 3 MOD22/ I/O Machine I/O 22 Low is true 4 MOD09/ I/O Machine I/O 09 Low is true 5 MOD21/ I/O Machine I/O 21 Low is true 6 MOD08/ I/O Machine I/O 08 Low is true 7 MOD20/ I/O Machine I/O 20 Low is true 8 MOD07/ I/O Machine I/O 07 Low is true 9 MOD19/ I/O Machine I/O 19 Low is true 10 MOD06/ I/O Machine I/O 06 Low is true 11 MOD18/ I/O Machine I/O 18 Low is true 12 MOD05/ I/O Machine I/O 05 Low is true 13 MOD17/ I/O Machine I/O 17 Low is true 14 MOD04/ I/O Machine I/O 04 Low is true 15 MOD16/ I/O Machine I/O 16 Low is true 16 MOD03/ I/O Machine I/O 03 Low is true 17 MOD15/ I/O Machine I/O 15 Low is true 18 MOD02/ I/O Machine I/O 02 Low is true 19 MOD14/ I/O Machine I/O 14 Low is true 20 MOD01/ I/O Machine I/O 01 Low is true 21 MOD13/ I/O Machine I/O 13 Low is true 22 MOD00/ I/O Machine I/O 00 Low is true 23 MOD12/ I/O Machine I/O 12 Low is true 24 FUSED +5V Output +5V Power Out 25 MOD11/ I/O Machine I/O 11 Low is true 26 GND Output PMAC Common This connector provides means for 24 general-purpose inputs or outputs. It can be made OPTO-22 compatible when used with a ZT2225 cable adapter board (i.e., a 50-pin ribbon cable format), or a ZT90068 cable, available from Ziatech Corp. 22 PMAC STD Connector Pinouts

29 J1 JDISP (14-Pin Connector) Top Board (First Piggyback Board) Front View Pin # Symbol Function Description Notes 1 Vdd Output +5V Power Power supply out 2 Vss Common PMAC Common 3 Rs Output Read Strobe TTL signal out 4 Vee Output Contrast Adjust. Vee 0 to +5Vdc * 5 E Output Display Enable High is enable 6 R/W Output Read or Write TTL signal out 7 DB1 Output Display Data 1 8 DB0 Output Display Data 0 9 DB3 Output Display Data 3 10 DB2 Output Display Data 2 11 DB5 Output Display Data 5 12 DB4 Output Display Data 4 13 DB7 Output Display Data 7 14 DB6 Output Display Data 6 The JDISP connector is used to drive the 2-line x 24-character (Acc-12), 2 x 40 (Acc-12A) LCD, or the 2 x 40 vacuum fluorescent (Acc 12C) display unit. The DISPLAY command may be used to send messages and values to the display. Note: Controlled by potentiometer R1. See Also: Program Commands: DISPLAY Accessories; Acc-12, 12A, 12C, Acc-16D Memory Map: Y:$ $07D1 PMAC STD Connector Pinouts 23

30 J2 JPAN (26-Pin Connector) Top Board (First Piggyback Board) Front View Pin # Symbol Function Description Notes 1 +5V Output +5V Power For remote panel 2 GND Common PMAC Common 3 FPD0/ Input Motor/C.S. Select Bit 0 Low is true 4 JOG-/ Input Jog In Neg Dir. Low is jog - 5 FPD1/ Input Motor /C.S. Select Bit 1 Low is true 6 JOG+/ Input Jog In Pos Dir. Low is jog + 7 PREJ/ Input Ret. To Prejog Position Low is return equiv to J= CMD 8 STRT/ Input Start Program Run Low is start equiv to R CMD 9 STEP/ Input Step Through Program Low is step equiv to S or Q 10 STOP/ Input Stop Program Run Low is stop Equiv to A 11 HOME/ Input Home Search Command Low is go home Equiv to HM 12 HOLD/ Input Hold Motion Low Is Hold Equiv To H 13 FPD2/ Input Motor /C.S. Select Bit 2 Low Is True 14 FPD3/ Input Motor /C.S. Select Bit 3 Low Is True 15 INIT/ Input Reset PMAC Low Is Reset Equiv to $$$ 16 HWCA Input Handwheel Enc. A Channel 5V TTL sq. pulse must use E23 (CHA2) 17 IPLD/ Output In Position Ind. (C.S.) Low lights LED 18 BRLD/ Output Buffer Request Ind. Low lights LED 19 ERLD/ Output Fatal Follow Err (C.S.) Low lights LED 20 WIPER Input Feed Pot Wiper 0 to +10V input must use E72, E73 (CHA4) 21 (SPARE) N.C. 22 HWCB Input Handwheel Enc. B Channel 5V TTL sq. pulse must use E22 (CHB2) 23 F1LD/ Output Warn Follow Err (C.S.) Low lights LED 24 F2LD/ Output Watchdog Timer Low lights LED 25 +5V Output +5V Power For remote panel 26 GND Common PMAC Common The JPAN connector can be used to connect the Accessory 16 (Control Panel), or customer-provided I/O, to the PMAC, providing manual control of PMAC functions via simple toggle switches. If the automatic control panel input functions are disabled (I2=1), the inputs become general-purpose TTL inputs, and the coordinate system (C.S.) specific outputs pertain to the host-addressed coordinate system. See Also: Control panel inputs Accessories: Acc-16, Acc-39 I-variables: I2, Ix06 I/O and Memory Map Y:$FFFB - Y:$FFFD 24 PMAC STD Connector Pinouts

31 J3 JTHW Connector (26-Pin Connector) Top Board (First Piggyback Board) Front View Pin # Symbol Function Description Notes 1 GND Common PMAC Common 2 GND Common PMAC Common 3 DAT0 Input Data-0 Input Data input from thumbwheel switches 4 SEL0 Output Select-0 Output Scanner output for reading TW switches 5 DAT1 Input Data -1 Input Data input from thumbwheel switches 6 SEL1 Output Select -1 Output Scanner output for reading TW switches 7 DAT2 Input Data -2 Input Data input from thumbwheel switches 8 SEL2 Output Select -2 Output Scanner output for reading TW switches 9 DAT3 Input Data -3 Input Data input from thumbwheel switches 10 SEL3 Output Select -3 Output Scanner output for reading TW switches 11 DAT4 Input Data -4 Input Data input from thumbwheel switches 12 SEL4 Output Select -4 Output Scanner output for reading TW switches 13 DAT5 Input Data -5 Input Data input from thumbwheel switches 14 SEL5 Output Select -5 Output Scanner output for reading TW switches 15 DAT6 Input Data -6 Input Data input from thumbwheel switches 16 SEL6 Output Select -6 Output Scanner output for reading TW switches 17 DAT7 Input Data -7 Input Data input from thumbwheel switches 18 SEL7 Output Select -7 Output Scanner output for reading TW switches 19 N.C. N.C. No Connection 20 GND Common PMAC Common 21 BRLD/ Output BUFFER REQUEST Low is buffer req. 22 GND Common PMAC Common 23 IPLD/ Output In Position Low is in position 24 GND Common PMAC Common 25 +5V Output +5Vdc Supply Power supply out 26 INIT/ Input PMAC Reset Low is reset The JTHW multiplexer port provides eight inputs and eight outputs at TTL levels. While these I/O can be used in unmultiplexed form for 16 discrete I/O points, most users will utilize PMAC software and accessories to use this port in multiplexed form to greatly multiply the number of I/O that can be accessed on this port. In multiplexed form, some of the SELn outputs are used to select which of the multiplexed I/O are to be accessed. See also: I/O and Memory Map Y:$FFC1, Y:$FFF9 Suggested M-variables M40 - M58 M-variable formats TWB, TWD, TWR, TWS Acc-8D Opt 7, Acc-8D Opt 9, Acc-18, Acc-34x, NC Control Panel PMAC STD Connector Pinouts 25

32 J4 JMACH1 (60-Pin Header) Front View Top Board (First Piggyback Board) Pin # Symbol Function Description Notes 1 +5V Output +5V Power For encoders, V Output +5V Power For encoders, 1 3 GND Common Digital Common 4 GND Common Digital Common 5 CHC3 Input Encoder C CH. Positive 2 6 CHC4 Input Encoder C CH. Positive 2 7 CHC3/ Input Encoder C CH. Negative 2,3 8 CHC4/ Input Encoder C CH. Negative 2,3 9 CHB3 Input Encoder B CH. Positive 2 10 CHB4 Input Encoder B CH. Positive 2 11 CHB3/ Input Encoder B CH. Negative 2,3 12 CHB4/ Input Encoder B CH. Negative 2,3 13 CHA3 Input Encoder A CH. Positive 2 14 CHA4 Input Encoder A CH. Positive 2 15 CHA3/ Input Encoder A CH. Negative 2,3 16 CHA4/ Input Encoder A CH. Negative 2,3 17 CHC1 Input Encoder C CH. Positive 2 18 CHC2 Input Encoder C CH. Positive 2 19 CHC1/ Input Encoder C CH. Negative 2,3 20 CHC2/ Input Encoder C CH. Negative 2,3 21 CHB1 Input Encoder B CH. Positive 2 22 CHB2 Input Encoder B CH. Positive 2 23 CHB1/ Input Encoder B CH. Negative 2,3 24 CHB2/ Input Encoder B CH. Negative 2,3 25 CHA1 Input Encoder A CH. Positive 2 26 CHA2 Input Encoder A CH. Positive 2 27 CHA1/ Input Encoder A CH. Negative 2,3 28 CHA2/ Input Encoder A CH. Negative 2,3 29 DAC3 Output Analog Out Positive DAC4 Output Analog Out Positive DAC3/ Output Analog Out Negative 3 4,5 32 DAC4/ Output Analog Out Negative 4 4,5 33 AENA3/DIR3 Output AMP-ENA/DIR AENA4/DIR4 Output AMP-ENA/DIR FAULT3 Input AMP-Fault FAULT4 Input AMP- Fault LIM3 Input Negative End Limit 3 8,9 38 +LIM4 Input Negative End Limit 4 8,9 39 -LIM3 Input Positive End Limit 3 8,9 26 PMAC STD Connector Pinouts

33 J4 JMACH1 (60-Pin Header) Continued Front View Pin # Symbol Function Description Notes 40 -LIM4 Input Positive End Limit 4 8,9 41 HMFL3 Input Home-Flag HMFL4 Input Home-Flag DAC1 Output Analog Out Positive DAC2 Output Analog Out Positive DAC1/ Output Analog Out Negative 1 4,5 46 DAC2/ Output Analog Out Negative 2 4,5 47 AENA1/DIR1 Output AMP-ENA/DIR AENA2/DIR2 Output AMP-ENA/DIR FAULT1 Input AMP- Fault FAULT2 Input AMP- Fault LIM1 Input Negative End Limit 1 8,9 52 +LIM2 Input Negative End Limit 2 8,9 53 -LIM1 Input Positive End Limit 1 8,9 54 -LIM2 Input Positive End Limit 2 8,9 55 HMFL1 Input Home-Flag HMFL2 Input Home-Flag FEFCO/ Output FE/Watchdog Out Indicator/Driver 58 AGND Input Analog Common 59 A+15V/OPT+V Input Analog +15V Supply 60 A-15V Input Analog -15V Supply The J4 connector is used to connect the PMAC to the second 4 channels (Channels 5, 6, 7, and 8) of servo amps, flags, and encoders. Note 1: In standalone applications, these lines can be used as +5V power supply inputs to power PMAC's digital circuitry. However, if a terminal block is available on your version of PMAC, it is preferable to bring the +5V power in through the terminal block. Note 2: Referenced to digital common (GND). Maximum of + 12V permitted between this signal and its complement. Note 3: Leave this input floating if not used (i.e. digital single-ended encoders). In this case, jumper (E18-21, E24-27) for channel should hold input at 2.5V. Note 4: + 10V, 10mA max, referenced to analog common (AGND). Note 5: Leave floating if not used; do not tie to AGND. In this case, AGND is the return line. Note 6: Functional polarity controlled by jumper(s) E17. Choice between AENA and DIR use controlled by Ix02 and Ix25. Note 7: Functional polarity controlled by variable Ix25. Must be conducting to 0V (usually AGND) to produce a '0' in PMAC software. Automatic fault function can be disabled with Ix25. Note 8: Pins marked -LIMn should be connected to switches at the positive end of travel. Pins marked +LIMn should be connected to switches at the negative end of travel. Note 9: Must be conducting to 0V (usually AGND) for PMAC to consider itself not into this limit. Automatic limit function can be disabled with Ix25. Note 10: Functional polarity for homing or other trigger use of HMFLn controlled by Encoder/Flag Variable 2 (I902, I907, etc.) HMFLn selected for trigger by Encoder/Flag Variable 3 (I903, I908, etc.). Must be conducting to 0V (usually AGND) to produce a '0' in PMAC software. PMAC STD Connector Pinouts 27

34 J5 JS1 (16-Pin Header) Top Board (First Piggyback Board) Front View Pin # Symbol Function Description Notes 1 DCLK Output D to A, A to D Clock DAC and ADC clock for Chan 1, 2, 3, 4 2 BDATA1 Output D to A Data DAC data for Chan 1, 2, 3, 4 3 ASEL0/ Output Chan Select Bit 0 Select for Chan 1, 2, 3, 4 4 ASEL1/ Output Chan Select Bit 1 Select for Chan 1, 2, 3, 4 5 CNVRT01 Output A to D Convert ADC convert sig. Chan 1, 2, 3, 4 6 ADCIN1 Input A to D Data ADC data for Chan 1, 2, 3, 4 7 OUT1/ Output Amp Enable/Dir. Amp Enable/Dir. for Chan 1 8 OUT2/ Output Amp Enable/Dir. Amp Enable/Dir. for Chan 2 9 OUT3/ Output Amp Enable/Dir. Amp Enable/Dir. for Chan 3 10 OUT4/ Output Amp Enable/Dir. Amp Enable/Dir. for Chan 4 11 HF41 Input Amp Fault Amp Fault Input for Chan 1 12 HF42 Input Amp Fault Amp Fault Input for Chan 2 13 HF43 Input Amp Fault Amp Fault Input for Chan 3 14 HF44 Input Amp Fault Amp Fault Input for Chan V Output +5V Supply Power supply out 16 GND Common PMAC Common Serial I/O Interface to Acc-23, Acc-28 Analog-to-Digital Converter Boards. J7 JEQU (6-Pin Header) Top Board (First Piggyback Board) Toward J2 Top View Pin # Symbol Function Description Notes 1 +5V Output +5V Power 2 EQU1/ Output Enc 1 Comp EQU 3 EQU2/ Output Enc 2 Comp EQU 4 EQU3/ Output Enc 3 Comp EQU 5 EQU4/ Output Enc 4 Comp EQU 6 GND Common PMAC Common This connector brings out the four compare-equal signals generated from the first DSPGATE on PMAC STD32. J1 (14-Pin Connector) Option 1S (Second Piggyback Board) Front View Pin # Symbol Function Description Notes 1 VDD Output +5V Power Power supply out 2 VSS Common PMAC Common 3 MOD65/ I/O Machine I/O 65 Low is true 4 NC Not Used 5 MOD67/ I/O Machine I/O 67 Low is true 6 MOD66/ I/O Machine I/O 66 Low is true 7 MOD25/ I/O Machine I/O 25 Low is true 8 MOD24/ I/O Machine I/O 24 Low is true 9 MOD27/ I/O Machine I/O 27 Low is true 10 MOD26/ I/O Machine I/O 26 Low is true 11 MOD29/ I/O Machine Low is true 12 MOD28/ I/O Machine I/O 28 Low is true 13 MOD31/ I/O Machine I/O 31 Low is true 14 MOD30/ I/O Machine I/O 30 Low is true J1 connector on PMAC STD32 Option 1S provides 11 bits of general purpose I/O. 28 PMAC STD Connector Pinouts