OLED-DISPLAYS INCL. CONTROLLER 8-BIT AND 4-BIT
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1 Issue OLD-DISPLAYS INCL. CONTROLLR 8-BIT AND 4-BIT Part-Number Row x Column TCNICAL DATA * INTGRATD CONTROLLR (D44780-LIK) * INPUT 4- OR 8-BIT DATA-BUS, 3 CONTROL-WIRS(,, RS) * SPI INTRFAC MOSI, MISO, CLK, CS * ASCII-CAR ST AND SPCIAL SYMBOLS STORD IN CARACTR-ROM * UP TO 8 CARACTRS (ASCII-COD 0..7) CAN B DFINID BY USR * DIFFRNT FUNCTIONS WIT ON INSTRUCTION: - CLAR DISPLAY, CURSOR OM, CURSOR ON/OFF, BLINKING CURSOR - SIFT DISPLAY, SIFT CURSOR, RAD/WRIT DISPLAY DATA, TC. * SIMPL SUPPLY (3.3..V). * LOW POWR CONSUMPTION (1..0 ma) * OPRATING TMPRATUR C * 4 INTGRATD FONTS ACCSSORIS * FRAMS (S TABL) Char height OLD Module size Viewing Area Accessories (Frames) W D W ints A W082-XLG 2x yellow/green 8 Drawing page A W12-X3LW 2x1. A 017-2U icewhite A W12-X3LG 2x1. A 017-2U yellow/green 9 A W12-XLG 2x A 017-2U yellow/green 10 A W12-X9LG 2x A 017-2U yellow/green 11 A W12-XBLW 2x1 8.9 A U icewhite A W12-XBLG 2x1 8.9 A U yellow/green 12 A W202-XLG 2x A 017-7U yellow/green 13 A W202-XDLG 2x yellow/green 14 A W204-XLG 4x A 017-9U yellow/green 1 Zeppelinstr. 19 D-8220 Gilching Phone Fax info@lcd-module.de
2 OLD-DISPLAYS Page 2 Specifications may be changed without CARACTR ST
3 Specifications may be changed without OLD-DISPLAYS Page 3 It is possible to choose one of the shown char sets. The nglish/japanese char set is setted by default. You have to set the bits FT1/FT0 of function set register: FT 1 FT 0 Description 0 0 nglisch Japanese character font table 0 1 Western uropean character font table nglish Russian character font table 1 1 Western uropean character font table 2 It must be noted that the character font setting must be performed at the head of the program before executing any instructions other than the Busy Flag and Address Instruction. Otherwise, the Function Set Instruction cannot be executed unless the interface data length is changed. SLF DFINID CARACTR All these character display modules got the feature to create 8 own characters (ASCII Codes 0..7) in addition to the ROM fixed codes. 1.) The command CG RAM Address Set defines the ASCII code (Bit 3,4,) and the dot line (Bit 0,1,2) Adresse imcg RAMsetzen Daten des Zeichens Bit of the new character. xample demonstrates Adresse ex ex creating ASCII code $ $ $ $ $04 2.) Doing 8 times the write command Data Write $ $04 defines line by line the new character. 8th. byte $ $ X X X $ $1 stands for the cursor line $ $0 3.) The new defined character can be used as a $ $ $ $00 normal ASCII code (0..7); use with DD RAM Address Set and Data Write.
4 OLD-DISPLAYS Page 4 Specifications may be changed without INSTRUCTION ST Instruction Code RS DB7 DB DB DB4 DB3 DB2 DB1 DB0 Description Max. execution time when fsp or fosc=20kz Clear Display Clears entire Display, Sets DDRAM-address 0 into addresscounter.2ms Return ome ntry Mode Set I/D S Display On/Off Control D C B Sets DDRAM-address 0 into addresscounter. Returns shifted display to original position. DDRAM contents remain unchanged. Sets cursor move direction and specifies display shift.(these operations are performed during data w rite and read.) Sets entire Display (D) ON/OFF. Sets Cursor (C) ON/OFF. Sets Blinking (B) of Cursor Position Character. 0ms 0ms 0ms Cursor/Display Shift/Mode/Pw r Function Set DL N F FT1 FT0 S/C R/L 0 0 Moves cursor and shifts display w ithout changing DDRAMcontents. 0ms G/C (0) PWR 1 1 Sets Graphic/Character Mode Sets internal pow er on/off 0ms Sets interface data length (DL). Sets number of display lines (N). Sets Character Font (F). Sets Font Table (FT). Set CGRAM Address ACG ACG ACG ACG ACG ACG Sets CGRAM Address. CGRAM data is sent and received after this setting. 0ms 0ms Set DDRAM Address ADD ADD ADD ADD ADD ADD ADD Sets DDRAM Address. The DDRAM data Is sent and received after this setting. 0ms Read Busy Flag and Address 0 1 BF AC AC AC AC AC AC AC Write data into the CGRAM or DDRAM Read data from the CGRAM or DDRAM Reads Busy Flag (BF) indicating that internal operation is being performed. Reads Address Counter contents. 1 0 Write Data Writes data into the CGRAM or DDRAM 0ms 1 1 Read Data Reads data from the CGRAM or DDRAM 0ms Notes on the instruction set: 1. After the CGRAM/DDRAM Read or Write Instruction has been executed, the RAM Address Counter is incremented or decremented by 1. After the Busy Flag is turned OFF, the RAM Address is updated. 2. I/D=Increment/Decrement Bit I/D= 1": Increment I/D= 0": Decrement 3. S=Shift ntire Display Control Bit. S= 0, shift function disable. S= 1, shift function enable. 4. BF=Busy Flag BF= 1": Internal Operating in Progress BF= 0": No Internal Operation is being executed, next instruction can be accepted.. R/L=Shift Right/Left R/L= 1": Shift to the Right R/L= 0": Shift to the Left. S/C=Display Shift/Cursor Move S/C= 1": Display Shift S/C= 0": Cursor Move 7. G/C=Graphic/Character mode selection. G/C= 0, Character mode is selected. G/C= 1, Graphic mode is selected. 8. PWR=Internal DCDC on/of control. PWR= 1, DCDC on. PWR= 0, DCDC off. 9. DDRAM=Display Data RAM 10. CGRAM=Character Generator RAM 11. ACG=CGRAM Address 12. ADD=Address Counter Address (corresponds to cursor address) 13. AC=Address Counter (used for DDRAM and CGRAM Addresses) 14. F=Character Pattern Mode F= 1": x 10 dots F= 0": x 8 dots 1. N=Number of Lines Displayed N= 1": 2- and 4-Line Display N= 0": 1-Line Display 0ms
5 Specifications may be changed without OLD-DISPLAYS Page INITIALISATION XAMPLS Initialisation example: 8-Bit / SPI RS DB7 DB DB DB4 DB3 DB2 DB1 DB0 X Description $39 Function Set, western european character set, 8-Bit $08 Display off $ $17 ntry mode set, increment cursor by 1 not shifting display Character mode and internel power on (have to turn on internel power to get the best brightness) $01 Clear display $02 Return home $0C Display on void initdisplay (void) { RS_DD=1; //RS Pin as output RW_DD=1; //RW Pin as output N_DD=1; //N Pin as output WriteIns(0x39); //function set european chararacter set WriteIns(0x08); //display off WriteIns(0x0); //entry mode set increment cursor by 1 not shifting display WriteIns(0x17); //Character mode and internel power on } WriteIns(0x01); //clear display WriteIns(0x02); //return home WriteIns(0x0C); //display on Initialisation example: 4-Bit void WriteIns(char instruction) { CheckBusy(); DATA_PORT_DD=0xFF; //Dataport as Output RS = 0; RW = 0; DATA_PORT = instruction; //set Data on Outputport } N = 1; Wait(10); N = 0; RS DB7 DB DB DB4 DB3 DB2 DB1 DB0 X Description //set nable to high //wait 1us (stabilize Outputport) //reset nable to low $28 Function Set, nglish/japanese char set, 4-Bit Note: Western uropean charset not available $08 Display off $ $17 ntry mode set, increment cursor by 1 not shifting display Character mode and internel power on (have to turn on internel power to get the best brightness) $01 Clear display $02 Return home $0C Display on void initdisplay(void) { RS_DD=1; //RS-Pin as Output N_DD=1; //N-Pin as Output RW_DD=1; //RW-Pin as Output RS = 0; //RS-Pin to low RW = 0; //RW-Pin to low N = 0; //N-Pin to low send_nibble(0x03); //Be sure to send_nibble(0x03); //be in send_nibble(0x03); //8-Bit-Mode send_nibble(0x02); //Switch to 4 Bit Wait(0); //Wait us WriteIns(0x28);//4-Bit-Mode WriteIns(0x08);//display off WriteIns(0x0);//entry mode set increment cursor by 1 not shifting display WriteIns(0x17);//Character mode and internel power on WriteIns(0x01);//clear display WriteIns(0x02);//return home WriteIns(0x0C); //display on void send_nibble (char data) { DATA_PORT = data; //output data N=1; Wait(10); //wait 1us (stabilize outupt) N=0; Wait(10); //wait 1us (stabilize outupt) } void WriteIns(char instruction) { CheckBusy(); DATA_PORT_DD=0x0F; //Dataport as Output RS = 0; RW = 0; send_nibble((instruction&0xf0)>>4); //ighbyte send_nibble(instruction&0x0f); //Lowbyte }
6 OLD-DISPLAYS Page Specifications may be changed without TIMING 8-BIT INTRFAC LCTRICAL CARACTRISTICS Item Symbol Test Condition Standard Value min. typ. max Unit Input "high" voltage Input "low" voltage Output "high" voltage Output "low" voltage Power supply current VI VDD - VDD V VIL - GND VDD V VO IO=-0.mA 0.8 VDD - VDD V VOL IOL=0.mA GND VDD V ICC VDD=V 1..0mA A ABSOLUT MAXIMUM RATINGS VCC=,0V, Ta=2 C Item Power supply voltage for logic Standard Value Symbol Unit min. max VDD-GND V It must be noted: Supplied with 3.3V reduces brightness compered to V Input Voltage VI -0.3 VDD V Operating temperature Storage Temperature TOP C TST C
7 Specifications may be changed without OLD-DISPLAYS Page 7 SPI INSTRUCTION DIAGRAM SPI DATA TRANSMISSION DIAGRAM TIMING SPI INTRFAC
8 OLD-DISPLAYS Page 8 Specifications may be changed without A W082-XLG INTRFAC 4-/8-BIT, 800/ Z80 Pinout for 8-Bit Interface Pinout for 4-Bit Interface / L : Read / L: Write / L : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional 4-/8-Bit 800 (default) SPI INTRFAC Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI
9 Specifications may be changed without OLD-DISPLAYS Page 9 A W12-X3LW (ICWIT) FRAM A W12-X3LG (YLLOW/GRN) A 017-2U INTRFAC 4-/8-BIT, 800/ Z80 4-/8-Bit 800 (default) Pinout for 8-Bit Interface / L : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional Pinout for 4-Bit Interface / L : Read / L: Write : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional SPI INTRFAC Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI
10 OLD-DISPLAYS Page 10 Specifications may be changed without A W12-XLG (YLLOW/GRN) FRAM A 017-2U INTRFAC 4-/8-BIT, 800/ Z80 Pinout for 8-Bit Interface Pinout for 4-Bit Interface / L : Read / L: Write / L : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional 4-/8-Bit 800 (default) SPI INTRFAC Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI
11 Specifications may be changed without OLD-DISPLAYS Page 11 A W12-X9LG FRAM A 017-2U INTRFAC 4-/8-BIT, 800/ Z80 4-/8-Bit 800 (default) SPI INTRFAC Pinout for 8-Bit Interface / L Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional Pinout for 4-Bit Interface / L : Read / L: Write : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI
12 OLD-DISPLAYS Page 12 Specifications may be changed without A W12-XBLW (ICWIT) FRAM A W12-XBLG (YLLOW/GRN) A U INTRFAC 4-/8-BIT, 800/ Z80 Pinout for 8-Bit Interface Pinout for 4-Bit Interface / L : Read / L: Write / L : Read / L: Write : nable : nable D0..D7 / L Data Bus, bidirectional DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional 4-/8-Bit 800 (default) SPI INTRFAC Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI
13 Specifications may be changed without OLD-DISPLAYS Page 13 A W202-XLG FRAM A 017-7U INTRFAC 4-/8-BIT, 800/ Z80 4-/8-Bit 800 (default) Pinout for 8-Bit Interface / L : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional SPI INTRFAC In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI Pinout for 4-Bit Interface / L : Read / L: Write : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select
14 OLD-DISPLAYS Page 14 Specifications may be changed without A W202-XDLG INTRFAC 4-/8-BIT, 800/ Z80 SPI INTRFAC 4-/8-Bit 800 (default) Pinout for 4-Bit Interface Pinout for 8-Bit Interface / L / L : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional : Read / L: Write : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7. SPI Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select
15 Specifications may be changed without OLD-DISPLAYS Page 1 A W204-XLG FRAM A 017-9U INTRFAC 4-/8-BIT, 800/ Z80 4-/8-Bit 800 (default) Pinout for 8-Bit Interface / L : Read / L: Write : nable D0..D7 / L Data Bus, bidirectional Pinout for 4-Bit Interface / L : Read / L: Write : nable DNC - Do Not Connect D4..D7 / L Data Bus, bidirectional SPI INTRFAC SPI Pinout for SPI-Bit Interface NC - Not Connected 12 CLK / L L-: Serial Clock 13 MISO / L Serial Data Output 14 MOSI / L Serial Data Input 1 CS L L: Chip Select In delivery state the display can be connected directly to the 4- or 8-Bit data bus (compatible to 800 mode). By changing the solder bridges, the mode Z80 is set. Additionally the SPI interface can be selected. For timing infromation please refer to page and 7.
16 Mouser lectronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: LCTRONIC ASSMBLY: A W082-XLG A W12-X3LG A W12-X3LW A W12-X9LG A W12-XBLG A W12-XBLW A W12-XLG A W202-XLG A W204-XLG A W202-XDLG
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