DOMAIN TECHNOLOGIES INC. Users Guide Version 2.1 SB-USB2-ZSP. Emulator

Transcription

1 INC. Users Guide Version. SB-USB-ZSP Emulator

2 SB-USB-ZSP Emulator Users Guide October 00 Domain Technologies Inc. East Plano Pkwy Suite Phone 9.. Fax SB-USB Users Guide (.)

3 Table of Contents INTRODUCTION.... Features.... Package Contents... INSTALLATION... INTEGRATION WITH VERISILICON S TOOLSET.... Command Line Parameters.... MDI Commands.... Sample SDEBUG Session.... ZView IDE Sample ZView IDE Debug Session... ZSP00 INITIALIZATION WITHOUT MONITOR CODE.... Steps Using ZDBUG.... Steps Using ZViewIDE... JUMPER AND SWITCH INFORMATION... APPENDIX A: SCHEMATICS... SB-USB Installation Guide (.)

4 Introduction The SB-USB emulator enables efficient and productive embedded software debugging. This compact and portable probe utilizes the JTAG interfaces for debug and in-circuit testing supplied with VeriSilicon s ZSP cores. It integrates well with VeriSilicon s ZView Integrated Development Environment (IDE) supporting all stages of ZSP debugging and development. The emulator supports unlimited software breakpoints within all ranges of program memory implemented in RAM.. Features The SB-USB has the following features: Powered by USB port JTAG interface Logic Levels:.V,.V,.V TCK: khz - 0MHz Integrates with VeriSilicon s ZViewIDE. Package Contents The SB-USB ships with the following: Emulator USB cable Drivers for MS Windows Installation Guide For more information contact Domain Technologies or see SB-USB Users Guide (.)

5 Installation Included with the SB-USB emulator is a -ft. USB cable, pin to 0/ pin ribbon cable and an installation CD. Verify all have been delivered with the emulator. The installation CD contains a number of executables and DLLs; these enable the SB-USB emulator to operate with VeriSilicon s ZView Integrated Development Environment (IDE) and ZSP development tools. In addition, the CD contains sample code for ZSP00 and ZSP00, and the JTAG BSDL files. The software installation should be executed before connecting USB emulator to the system. The installation procedure provides information about location of the USB drivers, so Windows can find them automatically. Insert the installation CD into your CD ROM drive. If auto detect is enabled in your system environment setup, then the installation program will automatically launch. Otherwise, double-click the DtiZspInstall.exe file located on the CD drive from within Windows Explorer. Follow the steps through the installation program to perform a complete or partial install of the SB- USB supporting software. Integration with VeriSilicon s Toolset The SB-USB emulator can be used with either VeriSilicon s ZViewIDE or the non-graphical Debugging tool set. To properly activate the debug interface, the appropriate command line parameters must be specified when using ZDBUG.EXE. The initial JTAG TCK operating frequency can be set with the MDI command, after the debugger is started, and before the target processor is stopped with the TARGET JTAG command. SB-USB provides three different levels for different target types. The output voltage can be changed with the MDI command, but since the driver is trying to detect connected devices during program initialization, level should be set through the environment variable before program is started: SET SBUSB_=level SB-USB Installation Guide (.)

6 Where level can be, or for output levels of.v,.v or.v. For the V targets -.V configuration can be used.. Command Line Parameters The following command line parameters are supported with ZDBUG.EXE: Parameter --mdi_library=mdisbusb --mdi_library= mdiserver Description Direct (non-tcp/ip) connection to the emulator. Provides a universal interface that detects the target ZSP type by the value of the JTAG s IDCODE or by measuring the length of the EX JTAG register. TCP/IP connection to the emulator For direct (non-tcp/ip) connection to the SB-USB JTAG emulator the following command line parameter should be used: --mdi_library=mdi sbusb For a remote TCP/IP connection to the SB-USB JTAG emulator, the IP address of the remote computer must be stored in the environment variable EMU_SERVER. Use the following option to indicate a remote connection: --mdi_library=mdiserver To set the environment variable EMU_SERVER, execute the following command from a DOS window: set EMU_SERVER=server_address where server_address can be any format recognized by the operating system. Optionally, the environment variable can also be set by using the System Properties Window found in Microsoft s Control Panel; through the Advanced Tab, environment variables can be created and modified. The target access can fail in case of invalid version of the monitor code in the evaluation board s flash memory. A Flash update is possible with the Boundary Scan Programming procedure described at: SB-USB Users Guide (.)

7 . MDI Commands These MDI commands are supported after the target board is initialized through ZDBUG.EXE: MDI Command Description benchclear [0 ] Set/get benchmark clear on start benchcont [0 Enable continuous benchmark counting during active control benchctrl [pin] Set/get benchmark control pin (..) benchmark [0 ] Set/get benchmark active level benchmark [mode] Get benchmark counter (-abs, -dif, -both) benchsw [0 ] Eenable SW benchmark mode break [0 ] Enable/disable breakpoint callback logic bvlog [filename off] Enables/disables detailed logging feature; used to document a problem with the SB-USB JTAG emulator bvlogmdi [0 ] Control MDI function call logging feature bvlogusb [0 ] Control low level USB logging feature dconfig addr ncsramload DCache configuration address dis_ice Disable hardware emulation mode en_ice Enable hardware emulation mode fastdrupdate [val] Enables fast transition through the JTAG s UpdateDr state, during issue of ADI request (stop in software emulation mode). When enabled, the SB-USB issues clocks with TMS set high, causing the JTAG state machine to go from Pause-DR, through Update-DR, to TestLogic/Reset, and then to RunTest/Idle. Default TCK frequency is MHz, and is controlled with the next parameter between MHz and 00 khz. Only use if the HWFLAG register is cleared during the ADI request (stop in software emulation mode). iconfig addr ncsramload ICache configuration address idcode Read device's IDCODE JTAG register jtag Change JTAG state or shift bits mapfile [name] Assign map filename for hardware emulation mode measure Measure hardware scan length; verifies MAP file matches target device. memcache [0 ] Control memory caching option memcachesize [num] Set size of memory cache buffer (..) reset Performs hardware reset for the target tck [val] Set or get emulators delay counter to slow down the JTAG TCK operation The default value is 0 khz. The frequency value can be entered in format n [MHz khz ]: mdi tck MHz mdi tck khz mdi tck 0000 TCK value will be set to the closes available frequency. SB-USB Installation Guide (.)

8 trst Send JTAG s TRST command to the target vcc [val] Set/Get current output level. Valid options are, and. version Reports emulator revision information zsptype type Specify device type: ZSP00, ZSP0, ZSP0, ZSP00, ZSP0. Sample SDEBUG Session Several sample programs are supplied on the SB-USB JTAG installation CD. The following sample debug session will demonstrate the procedure using SDBUG to debug sample program DEMOSINE00.OUT. The SB-USB JTAG is connected via the USB port to the PC, and connected through its ribbon cable to the target board. In this example the target board is Domain Technologies DT0EB.. Using a Dos Window, enter the following command to start the debugger from the directory containing the sample application. By default the sample applications are placed in \ZSPTools\ZSP00. >sdbug mdi_library=mdizu00 demosine00.out In the above example, the interface type is set by using the mdizu00 command line parameter:. At the debugger prompt type: <sdbug> mdi? A list of the supported MDI commands will be displayed. SB-USB Users Guide (.)

9 . Multiple ZSP JTAG targets are possible, but for the purpose of this example, a single target is used. Connect the debugger to the first target by using the following command: <sdbug> target jtag Upon completion, the start address, load size, and transfer rate will be displayed:. The debugger session is now ready for actions like setting a breakpoint, examining data, viewing the stack, etc. Refer to VeriSilicon s documentation or utilize the help command to continue this debug session: SB-USB Installation Guide (.) 9

10 . ZView IDE VeriSilicon s ZView Integrated Development Environment (IDE) features a high level language ZSP target debugger as part of the Eclipse software development environment. Eclipse is an open, industry-supported, extensible, software development platform. Programmers create, test and debug applications with fast data access and extensive display capabilities. A typical debugging environment consists of the ZView IDE running on a host, the host connected to any Domain Technologies emulator, and the emulator connected to the target ZSP. The SB-USB emulator can be used with ZView IDE when developing for more complex configurations such as debugging with multiple users, multiple ZSP targets, or remote access. This is done through the use of ZServer connectivity software which is shipped with ZView IDE. This multi-core/device connectivity capability allows the user to start/stop/single-step selected devices simultaneously. Access to multiple devices is provided from single or multiple workstations via TCP/IP connection. 0 SB-USB Users Guide (.)

11 . Sample ZView IDE Debug Session Several sample programs are supplied on the installation CD. The following will demonstrate the procedure using ZViewIDE to debug sample project Demosine.. The SB-USB is connected via the USB port to the PC, and connected through its ribbon cable to the target board. In this example the target board is Domain Technologies DT0EB.. Run ZView IDE. Double click on the Demosine folder in the Navigator window. The folder will expand to reveal the project contents. Double click on the Demosine.c file. An Edit window will be opened for file demosine.c:. The DemoSine project was built automatically by the ZView IDE. This feature is enabled through the project's properties. The Console Window displays the results of the build operation. To display the Console window, choose menu option Window->Show View->Console.. Use the ZView IDE's Debug Perspective to enable and control the display windows for debugging the sample project. To change the perspective choose Window->Open Perspective->DSP Debug or select the DSP Debug perspective from the icon bar. The Debug perspective will show the Debug, Variable, Breakpoints, Expressions, Memory, Graph, ZView Console, Stderr, and Stdout windows for your project.. Define and connect the hardware target; in this example it will be the DT0EB. To connect, choose the menu option DSP->Open Connection. Select the Interface Type: SB-USB-ZSP. Select required operating voltage levels. Emulator can operate with different pin out modes, but for standard ZSP connections the auto can be selected. SB-USB Installation Guide (.)

12 Select the Query button to automatically populate the Target Select field based upon the connected device. Select OK to initialize. Note, if the connected target device does not have known JTAG IDCODE to identify it, use JTAG command to configure JTAG scan chain. The Query button only allows auto configuration of known devices. By starting the ZServer software, ZViewIDE supports debugging of remote targets. In the Open Connection dialog, choose radio button TCP/IP and specify the server s IP Address. The Query and Setup buttons can be used to define the Target. For additional information on the Open Connection function, review the online help by selecting Help->Contents from the ZViewIDE main Window.. The DemoSine sample project has a debug session already configured; the configuration is named DemoSine. Select menu option Run- >Debug followed by the named debug configuration; for this example choose DemoSine. When the debugger is started, the application will SB-USB Users Guide (.)

13 stop at the entry to the main function. Local variables are not initialized yet, since the functions pre-amble was not executed:. To set a breakpoint, right click with the mouse in the margin of the source window; choose toggle breakpoint from the displayed list. The Breakpoints window will be updated with the new breakpoint, the breakpoint symbol will be visible in the source window, and the code window will highlight the active breakpoint. Once all desired breakpoints have been set, users may control the debugger behavior through the IDE s Run menu option. ZSP00 Initialization without Monitor Code The SB-USB can load the ZSP00 without ROM monitor code. In order to accomplish the load, users need an application with an interrupt vector including a debug interrupt that contains the debug monitor. The monitor code for software debugging must have an interrupt vector table configured at instruction memory address 0x0000. The following sections will describe the procedure for ZDBUG.EXE and VeriSilicon s ZViewIDE Debugger to: Invoke the debugger Set the register mapfile Enable hardware debug mode Load the program image with the debug monitor Set UVT bit in %smode Turn off hardware debug mode and debug in normal mode SB-USB Installation Guide (.)

14 . Steps Using ZDBUG In the following steps, the user program IMAGE.OUT will be used as the application with an interrupt vector including a debug interrupt that contains the debug monitor. The monitor code for software debugging has an interrupt vector table configured at instruction memory address 0x In a DOS Window, invoke ZDBUG.EXE with the appropriate command line parameter to identify the target ZSP: <zdbug> -mdi_library=mdisbusb image.out. Set the register map file as shown below: <zdbug> mdi mapfile <mapfile of the chip>. Enable hardware debug mode with the following command: <zdbug> mdi en_ice. Connect the debugger to the target board by issuing this command: <zdbug> target jtag. Load the monitor image with the following command: <zdbug> load. Set %smode s UVT bit as shown: <zdbug> set $smode=0x0. Turn off hardware debug mode with the following command: <zdbug> hw return_to_sw_dbg. Continue debugging as normal.. Steps Using ZViewIDE. Run ZViewIDE: Open your project. Change to a Debug Perspective. Initialize the connection to your G target: Select DSP ->Open Connection from the main window Set Interface Type to SBUSB Select Query to populate the Target Select field Select OK to initialize your G target SB-USB Users Guide (.)

15 . With a Debug Configuration, load your project but do not run it: Selecting DSP->Debug from the main window In the Debug dialog, select New to create a new debug configuration Name the configuration and set the project and output file. In the Debugger tab, check the box to Do Not Run after Load Select the Debug button to execute the new configuration. Set a Hardware breakpoint for your G target: Select DSP->Hardware Break Fill the Core Mapfile field with the appropriate mapfile. Several are installed with IDE; they are located at install directory\zsptools\mapfiles. Set the hardware breakpoint options by selecting the associated checkbox: Breakpoint Option Enable HW Debug Mode AHB Clock Stop Enable I/O Clock Stop Enable Description Stop target based on hardware condition When selected and breakpoint hits, memory is no longer accessible by the debugger When selected and breakpoint hits, peripherals will be stopped Configure the hardware breakpoint type in the dialog: Breakpoint Type Description External Bit Break occurs for defined external bit Instruction Break occurs after instruction executes Data Address Break occurs when read / write at defined address; the mask field is SB-USB Installation Guide (.)

16 Data Value Logical Combination applied, the Not checkbox is used to negate the condition Break occurs when read/write of defined value; the mask field is applied, the Not checkbox is used to negate the condition Define a conditional breakpoint; an expression identifies break criteria based upon instruction address, data address, etc. Set an optional counter value. Each hardware breakpoint type supports a counter value. The value of the counter defines the number of times the defined breakpoint can occur without causing the Hardware Break to trigger Define optional executable commands as well as test conditions that will be issued once the break occurs by checking the associated checkbox and defining the field: Command Checkbox Exe Test Description Execute the defined command(s) when the breakpoint occurs Evaluate logical expression (C syntax) to conditionally determine if the break should apply; if the condition is not met, execution continues without user intervention Note, if both the Exe and Test checkboxes are selected, the Exe defined command(s) will be performed prior to the Test defined logical expression(s). Choose the Apply button. In software mode, run the project: Press the green arrow in the IDE debug window or select Run->Resume. The application will stop at the configured hardware breakpoint. When a break occurs, use the status indicator area of the Hardware Breakpoint window to determine the type of break:.. To disable the Hardware debug mode: Uncheck Enable HW Debug Mode in the Hardware Break Window Choose the OK button.. Continue software debugging as normal. SB-USB Users Guide (.)

17 Jumper and Switch Information The following table describes the assignment of switches for the SB-USB s pin IDC connector. Switch is on the top (close to LEDs): Switch Connector Left Right Position Sw I/O Gnd Sw I/O Gnd Sw I/O Gnd Sw I/O Gnd Sw I/O VCIO Sw I/O Gnd Sw I/O Gnd Sw 0 I/O Gnd Sw9 I/O VCIO Sw0 I/O +V Note the following jumper information: Jumper Location Description J Bottom Side Enable power from external power jack J Under USB Connector - Enable power from USB For the logic analyzer operation, at least one of the switches needs to provide the ground connection - unless the signal ground is provided externally; for example, to pin # of the J. SB-USB Installation Guide (.)

18 ZSP JTAG PINOUT -TRST GND TDI GND TI's JTAG PINOUT A A USB.0 NET Data Addr DSP Data JTAG, EmuPLD OnCE, Logic Addr Cyclone Analyzer TDO GND TMS GND TCK 9 0 GND EVT key -RST VDD_SENSE B B Addr9 Data AM9LV00 MB Flash Actel JTAG PINOUT TCK GND TDO nc TMS VJTAG VPUMP TRST TDI 9 0 GND C C DSP OnCE PINOUT DSI GND DS0 GND DSCK GND -DR key -RST 9 0 nc nc nc nc TMS -TRST TDI GND PD key TDO GND TCKR 9 0 GND TCK GND EMU0 EMU MOT's JTAG PINOUT TDI GND TD0 GND TCK GND nc key -RST 9 0 TMS0 TMS -DE -TRST D D Date Changes Enable. I/O by -TRST and k --00 Add S/N, update blue wires DSP OnCE PINOUT DSI GND DS0 GND DSCK 9 0 GND -DR key -RST nc Optional controls GND GND 9 0 GND./Out0 V/Out E E Domain Technologies, Inc F F Title Block Diagram E Plano Pkwy, #, Plano TX 0 Size Document Number Rev A SB-USB B Date: Wednesday, October, 00 Sheet of

19 A[0..] A[0..] D[0..] LCLKO D[0..] LCLKO UA U TIO0 TIO0 A0 D0 A0 D0 TIO A A0 D0 0 D A A0 DQ0 9 TIO D TIO A A A A D D A A DQ TIO D -PWRDN A A D D A A DQ R 0k D R 0k -BB -PLDRST A A D D A A DQ -PLDRST D -IRQD SCLK A A D R 0k D A A DQ SCLK 9 D R 0k CONF_DONE -IRQB A A D 0 D A A DQ 0 -IRQB 0 D -IRQA -PLD A A D 0 9 R K D A A DQ -PLD D -RD A A D R 0k D A A DQ -RD D MSEL0 -WR A9 A D R 0k D9 A9 A DQ 0 -WR D9 MSEL -PLDTA A0 A9 D9 D0 A0 A9 DQ9 R 0k -PLDTA D0 nce SC00 A A0 D0 R 0k D A A0 DQ0 SC00 D nconfig SC0 A A D R 0k SC0 D A A DQ 9 D -TRST SC0 -TRST SC0 B A A D R 0k D A A DQ 9 9 D SCK0 SCK0 B A A D D A A DQ D SRD0 SRD0 A A D 0 D A A DQ D STD0 STD0 A A D D A A DQ/A- 9 A A D 9 UA D A A nconfig TCK A D D A A RY/BY H CONF_DONE nconfig TCK J TMS D D9 A K nce CONF_DONE TMS J ETDO -RD D9 J D0 nce TDO H TDI -RD -WR RD D0 D -RD BYTE D INIT_DONE TDI H -WR -BG WR D 0 D -PWRDN OE A 9 BG D TP DEV_OE D -WR RST C 9 -BB BR D TP CLKUSR -ROM WE H 9 TP TP nceo ncs C -TA BB CE J nstatus ncso G 9 DATA C TA RAS0,AA0 -USB B -ROM MSEL0 DEV_CLRn DATA0 H ASDI CAS RAS,AA 9 -PLD J MSEL MSEL0 ASDO K DCLK BCLK RAS,AA 9 J BCLK RAS,AA AM9LV00B/TSOP MSEL DCLK K EPC DSPGC U U ncs -TA VDD UB -PLDTA DATA Y A ncs ENAPLD ASDI A B DATA HA0/HAS HAD0,H0 9 ASDI DCLK HA/HA HAD,H E. G0DCK GND DCLK HA/HA9 HAD,H E. COREV D HR/W,HRD HAD,H E. EPCS D LED HCS,HA0 HAD,H -ENABUF ENAPLD HDS,HWR HAD,H -PWRDN HREQ,HTRQ HAD,H 9 C -PLDRST LED HACK,HRRQ HAD,H 0 0n UC J ETDO TDI DSPGC PCAP TDI TDO XTAL TDO TCK + + LCLKO EXTAL TCK -TRST + + -ROM CKOUT TRST TMS -POR + + TP TP 9 TMS PINIT TMS -DE POR DE + + -TRST -POR RESET + + E -IRQA E -IRQB MODA/IRQA TIO0 CON -IRQC MODB/IRQB TIO0 UD TIO SC00 R DNS nce RXD TP TP -IRQD MODC/IRQC TIO 9 TIO Pin # removed SC0 CONF_DONE MODD/IRQD TIO 9 R9 DNS SC00 RXD SC0 SC0 TXD 9 SCLK DSPGC SCK0 SC0 SCLK 0 SRD0 SCK0 9 -PLDRST R 0k STD0 SRD0 A R 0k STD0 Domain Technologies, Inc BG R 0k nconfig SC0 E Plano Pkwy, #, Plano TX 0 ENAPLD R0 0k ncs SC Title F -IRQB R0 k DCLK SC F -IRQC R 0k DATA SCK CPU, Memory ASDI SRD 0 Size Document Number Rev STD A SB-USB B DSPGC Date: Wednesday, December, 00 Sheet of

20 UD TDI/TMS GND/-TRST GND/-TRST TDO/TDI TDO/TDI UB A[0..] N D ION IOG G C D IOC IOL L P TIO BTTCK IOP IOG G B LED0 LED0 A A A0 IOB IOK K P SC0 BRSTA IOP IOG G LED0 G LED LED A IOG IOL L R SC00 BDRA IOR IOF F LED F LED A LCLKO IOF IOL L N -PLDRST BTTDI ION IOF F LED D LED A IOD IOM M N SCLK ION IOF F LED E BRSTB LED A D IOE ION N K -IRQB IOK IOF F LED E LED LED A TIO IOE IOM M K -PLD IOK IOE E LED D TDO/TDI A SC0 IOD ION N N ION IOE E E LED A SCK0 IOE IOM M M IOM IOD D D TDI/TMS BMTDI SRD0 IOD B IOM M M LED IOM B IOD D BMTDI F BTTRST IOF ION N L BTTRST IOL IOE E BTTRST G BTTDI STD0 IOG IOK K M BMTDI IOM IOE E BTTDI F BRSTA B TIO0 IOF IOL L M -RD IOM IOD D BRSTA BDRA D[0..] E IOE IOR R L B -PLDTA DSOB IOL IOH H BDRA G BTTCK D0 IOG IOP P L LED BOUT IOL IOG G BTTCK F BMTMS D IOF IOP P L AOUT IOL IOB B TP TP BMTMS H BEMU0 BEMU0 D IOH ION N K TP TP IOK IOC C H BEMU BEMU D CLK0 IOH IOC C G BDSIB BDSIB D CLK CLK0 DPCLK0 L IOD D H BMCKB BMCKB D CLK DPCLK F K PLL_OUTn J T/TCK BDRB BDRB D PLL_OUTp J PLL_OUTP DPCLK F K -RSTA/TCKR BRSTB BRSTB D PLL_OUTn G CLK DPCLK L H BMTMS0 BMTMS0 D EPC CLK BMTCK BMTCK TDI/TMS D9 EPC C D0 (.) VDDP(.,.,.) C D D UC BOUT BOUT D UE AOUT R -DRA/TDO TCK/PD TCK/PD D -WR -RSTB IOR IOT9 T9 B AOUT AOUT D A IOB IOE9 E9 T AOUT IOT IOP9 P9 A R -DRA/TDO -DRA/TDO D A IOA IOD9 D9 D -DRB IOR ION9 N9 B TCK/PD AOUT AOUT D A IOB IOC9 C9 P BOUT0 IOP IOR0 R0 C R BOUT -RSTA/TCKR -RSTA/TCKR D A IOC IOE E D DSCKB IOR IOT T B T TMS0 TMS0 D9 A IOB IOC C BOUT IOT ION0 N0 A R T/TCK T/TCK D0 A IOA IOD D D IOR IOP0 P0 B P GND/-TRST TMS TMS D A IOB IOA A D IOP IOR R C M -DE/EMU0 D -DE/EMU0 D D IOC IOB B IOM IOP P E N -TRST/EMU -TRST/EMU D IOE IOD D D ION ION N D N DSIB IOD IOC C DSIB D ION ION N D P BOUT B BOUT A0 IOD IOB B D DSIB IOP IOM9 M9 C R DSOB DSOB D0 IOC IOA A IOR IOM M B M BOUT BOUT D IOB IOE E D -TRST/EMU IOM IOP P A T BDRB DSCKB DSCKB D IOA B IOB B D -DE/EMU0 IOT IOR R B0 R BMCKB BOUT0 BOUT0 D9 IOB0 IOC C TMS IOR IOT T C0 P BDSIB -DRB IOC0 IOD D IOP IOR R -DRB D0 N BEMU AOUT AOUT SC00 IOD0 IOD D ION IOR R -RSTB SC00 E0 R -RSTB SC0 D IOE0 IOE E D TMS0 IOR IOP P BEMU0 AOUT SC0 A9 T AOUT E SC0 D0 IOA9 IOC C D IOT IOT T BMTMS SC0 B9 N E SCK0 IOB9 IOB B D ION IOR R SCK0 P SRD0 IOA A D IOP SRD0 M STD0 IOB B D9 IOM BMTMS0 STD0 E M0 LCLKO DPCLK IOC C D0 AOUT IOM0 DPCLK M BMTCK LCLKO E R9 TIO0 DPCLK IOB B IOR9 DPCLK M TIO0 TIO EPC EPC TIO TIO TIO -PLDRST -PLDRST SCLK U0 SCLK -IRQB Domain Technologies, Inc SC0 E Plano Pkwy, #, Plano TX 0 -IRQB -PLD R.K SC0 DATA NC Title -PLD F -RD NC F -RD -WR NC FPGA -WR -PLDTA GND NC Size Document Number Rev -PLDTA DS0-TSOC A SB-USB B Date: Wednesday, December, 00 Sheet of

21 xtdi/tms LED0 U A0 B0 xgnd/-trst 9 xbout A B VBUF 9 BE 0 U A B A B 9 A B LED TDI/TMS GND/-TRST R 00 LD TDO/TDI A B xtdo/tdi LED R0 00 LD DA DB BOUT A B xbout LED R9 00 LD VDDP TCK/PD A B xtck/pd A LED A R 00 LD BicolorLed BicolorLed BOUT A B xbout LED -DRA/TDO A B x-dra/tdo A B D BOUT LD LD LED LED MA -ENABUF C C VBUF DA DB -RSTA/TCKR x-rsta/tckr BicolorLed BicolorLed TMS0 A0 B0 xtms0 T/TCK A B R xt/tck TMS A B 0k xtms u u -DE/EMU0 A B x-de/emu0 A B B B LD LD -TRST/EMU x-trst/emu DSIB xdsib BOUT xbout VDDP TDI/TMS R 0k BMTDI TDO/TDI R 0k DSOB xdsob BMTDI U BTTRST -DRA/TDO BOUT A0 B0 R 0k xbout BTTRST BTTDI -RSTA/TCKR DSCKB A B R 0k xdsckb BTTDI BRSTA -DRB T/TCK BOUT0 A B R 0k R 0k xbout0 BRSTA C BDRA -RSTB TCK/PD -DRB A B R 0k R 0k x-drb C BDRA BTTCK -TRST/EMU BOUT A B R 0k xbout BTTCK BMTMS -DE/EMU0 -RSTB A B R 0k x-rstb BMTMS BEMU0 BOUT A B xbout BEMU0 9 BEMU JA A B JF BEMU BDSIB BMTDI R 0 TDI/TMS xgnd/-trst xbout VBUF BDSIB BMCKB BTTRST GND/-TRST OUT -ENABUF 9 R 0 OUT BE 0 BMCKB BDRB BTTDI R 0TDO/TDI BDRB BRSTB BMTCK R0 0 TCK/PD BRSTB BMTMS0 SW0x SW0x BMTMS0 BMTCK BMTCK TDI/TMS JB JG D TDI/TMS D GND/-TRST AOUT R9 0 BOUT xbout xbout GND/-TRST TDO/TDI AOUT R 0 BOUT OUT OUT TDO/TDI J BOUT BDRA R 0 -DRA/TDO xtdi/tms OUT BOUT TCK/PD BRSTA R 0 -RSTA/TCKR xtdo/tdi OUT TCK/PD AOUT SW0x SW0x xtck/pd OUT AOUT -DRA/TDO x-dra/tdo OUT -DRA/TDO AOUT JC JH x-rsta/tckr xtms0 AOUT -RSTA/TCKR BMTMS0 R 0 TMS0 xbout xbout0 OUT 9 0 xtms -RSTA/TCKR TMS0 BTTCK R 0 T/TCK OUT OUT0 x-de/emu0 x-trst/emu TMS0 T/TCK BMTMS R 0 TMS xdsib OUT T/TCK TMS BEMU0 R 0 -DE/EMU0 xdsob OUT TMS E -DE/EMU0 SW0x SW0x xdsckb OUT0 -DE/EMU0 E -TRST/EMU x-drb 9 0 OUT -TRST/EMU DSIB JD JI x-rstb OUT DSIB BOUT BEMU R 0 -TRST/EMU xbout xbout BOUT DSOB BDSIB R0 0 DSIB OUT OUT DSOB CON BOUT BMCKB R9 0 DSCKB BOUT VDDP DSCKB DSCKB BOUT0 SW0x SW0x BOUT0 -DRB -DRB AOUT JE JJ AOUT Domain Technologies, Inc RSTB BDRB R 0 -DRB xt/tck xbout E Plano Pkwy, #, Plano TX 0 -RSTB AOUT AOUT R 0 BOUT OUT OUT Title AOUT F BRSTB R 0 -RSTB F VDDP +V AOUT R 0 BOUT I/O buffers SW0x SW0x Size Document Number Rev A SB-USB B -ENABUF 9 BE OnCE JTAG/OnCE PIC PIC PIC 0 VBUF Date: Wednesday, December, 00 Sheet of

22 .V.V L TP TP -USB A TP9 TP -RD TP TP A -WR A uh TP0 TP D[0..] LCLKO U A[0..] A0 D0 A LA0 LD0 9 D A LA LD 0 0 D A LA LD 9 D A LA LD D LA LD D LD D -POR B R 0k RESET# LD D ALE LD B D -USB CS# LD D9 -RD 9 IOR# LD9 9 D0 -WR 0 R 0k IOW# LD0 0 D R 0k DMARD# LD D R9 0k DMAWR# LD D J R 0k DACK LD D EOT LD D LD 9 Pin # removed TEST.V 0 LCLKO R 9. TRST LCLKO C no mount TMC DREQ CON L C IRQ# -IRQA VBUS XIN RSDM R0 9. XOUT RSDM 9 DM CmFerr J USB DM DP VBUS RREF DP USB RSDP R 9. Y VBUS RSDP D- RPU R k USBGND R9 RPU D+ USBGND k SHIELD 0MHz N SHIELD L C0 C R R C0 USB AGND 9k M 0n D 0p 0p D uh P C C C Required E A E PWR U9 for C IN OUT C U C C0 LM0MP C R0 +V u AGND V, A, SOT- 0u 0k IN OUT 0u u u IN OUT u External power connector for OC OUT m 0u more then 00 ma configurations Gnd J CON EN TPS0D Domain Technologies, Inc Pinout: 00 ma current Panasonic E Plano Pkwy, #, Plano TX 0 limiter EEV-HA0J0UP Title F F 0 VSSC VSSC VSSIO VSSIO VSSIO GND GND AVSS AVSS COM VDDC VDDC VDDIO VDDIO VDDIO VDD VDD AVDD PVDD USB Interface Size Document Number Rev A SB-USB B Date: Wednesday, December, 00 Sheet of

23 C DSP core supply.a/00us for +V COREV +V VDDP +V VDDP +V VDDP U U0 U9 A A U R E. EN BYP E. E. ENAVD IN OUT 0k EN BYP EN BYP C ENA RST C C -POR PQTMZP 0p PQTMZP 0p PQTMZP 0p TPS TPS - -.V TPS -,L0 -.V +V UG TPS V V power on reset A +V to charge mf cap GND GND J A VDDP R GND GND J9 A GND GND K UF U 0k A B +V Logic supply ENAVC GND GND K A F B GND GND K0 IO C -RST A0 F GND GND L IO G U GND G F9 Pinout: GND GND L IO P GND G0 F GND GND L9 IO A IN OUT H G ENAVD GND GND L IO F0 DS/V/SOT H9 G9 GND GND T IO F EN BYP J G GND GND T IO A J0 H GND GND T IO P C K H0 GND GND T IO K PQTMZP 0p K9 IO C T EPC IO T UE T0 IO L C +V USB core supply S D COREV COREV IO L0 C.V S D _PLL IO T _PLL QH D 9 UF U 99 QH D H A_PLL A_PLL H QH A 0 QL P 0 IN OUT 00 J GNDA_PLL GNDA_PLL J J ENAVD H A QL 9 GNDG_PLL GNDG_PLL J EN BYP 0 C A QL GNDP QL GNDP 9 EPC C C DSPGC PQTMZP 0p DSPGC IN OUT IN OUT L _PLL D D +V Cyclone core supply +V 0nH 0u u U M HOLE H C C M HOLE H M HOLE u u 0u R ENAVC IN OUT 0k ENAVD ENA RST.V I/O required for.v TPS JTAG emulator C C C C E E E. R 0k E. R9 0k E. R 0k u 0u u H C0 C C C9 VDDP C C COREV C Domain Technologies, Inc F F u C9 u C u C u 0u 0u u C u C u C u 0u 0u Title C H IN OUT C9 u C9 u u C u Power, LEDs M HOLE E Plano Pkwy, #, Plano TX 0 Size Document Number Rev A SB-USB B Date: Tuesday, January 0, 00 Sheet of

24 Domain Technologies Inc. East Plano Pkwy Suite Phone 9.. Fax SB-USB Installation Guide (.) 9